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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 22:55:06 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-01 22:55:06 -0400
commit68e24ba70465b82ad24e0774ceab5360180d4627 (patch)
tree5d2b8e22e556360f353b2d1c73a19aaf6c5becd9 /arch/arm/mach-pxa
parentb4beb4bf9934d151bf4581a54ae028927374cb2a (diff)
parent5725aeae5ff2e39f3815bbef788ee326c9afea2c (diff)
Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits) ARM: pxa/cm-x300: properly set bt_reset pin ARM: mmp: rename SHEEVAD to GPLUGD ARM: imx: Fix typo 'MACH_MX31_3DS_MXC_NAND_USE_BBT' ARM: i.MX28: shift frac value in _CLK_SET_RATE plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired ARM: mx5: fix clock usage for suspend ARM: pxa: use correct __iomem annotations ARM: pxa: sharpsl pm needs SPI ARM: pxa: centro and treo680 need palm27x ARM: pxa: make pxafb_smart_*() empty when not enabled ARM: pxa: select POWER_SUPPLY on raumfeld ARM: pxa: pxa95x is incompatible with earlier pxa ARM: pxa: CPU_FREQ_TABLE is needed for CPU_FREQ ARM: pxa: pxa95x/saarb depends on pxa3xx code ARM: pxa: allow selecting just one of TREO680/CENTRO ARM: pxa: export symbols from pxa3xx-ulpi ARM: pxa: make zylonite_pxa*_init declaration match code ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available ARM: at91: add defconfig for at91sam9g45 family ARM: at91: remove dependency for Atmel PWM driver selector in Kconfig ...
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/Kconfig38
-rw-r--r--arch/arm/mach-pxa/Makefile2
-rw-r--r--arch/arm/mach-pxa/balloon3.c10
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c4
-rw-r--r--arch/arm/mach-pxa/cm-x300.c8
-rw-r--r--arch/arm/mach-pxa/include/mach/addr-map.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio-pxa.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h9
-rw-r--r--arch/arm/mach-pxa/include/mach/lpd270.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/mtd-xip.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/palm27x.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa27x.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa95x.h7
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h13
-rw-r--r--arch/arm/mach-pxa/include/mach/smemc.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/zeus.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/zylonite.h4
-rw-r--r--arch/arm/mach-pxa/irq.c4
-rw-r--r--arch/arm/mach-pxa/lpd270.c2
-rw-r--r--arch/arm/mach-pxa/palmtreo.c8
-rw-r--r--arch/arm/mach-pxa/palmtx.c8
-rw-r--r--arch/arm/mach-pxa/pxa25x.c2
-rw-r--r--arch/arm/mach-pxa/pxa27x.c2
-rw-r--r--arch/arm/mach-pxa/pxa3xx-ulpi.c2
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/saarb.c1
-rw-r--r--arch/arm/mach-pxa/z2.c3
-rw-r--r--arch/arm/mach-pxa/zeus.c8
31 files changed, 112 insertions, 60 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index cd19309fd3b..61d3c72ded8 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -2,6 +2,27 @@ if ARCH_PXA
2 2
3menu "Intel PXA2xx/PXA3xx Implementations" 3menu "Intel PXA2xx/PXA3xx Implementations"
4 4
5config ARCH_PXA_V7
6 bool "ARMv7 (PXA95x) based systems"
7
8if ARCH_PXA_V7
9comment "Marvell Dev Platforms (sorted by hardware release time)"
10config MACH_TAVOREVB3
11 bool "PXA95x Development Platform (aka TavorEVB III)"
12 select CPU_PXA955
13
14config MACH_SAARB
15 bool "PXA955 Handheld Platform (aka SAARB)"
16 select CPU_PXA955
17endif
18
19config PXA_V7_MACH_AUTO
20 def_bool y
21 depends on ARCH_PXA_V7
22 depends on !MACH_SAARB
23 select MACH_TAVOREVB3
24
25if !ARCH_PXA_V7
5comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" 26comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
6 27
7config ARCH_LUBBOCK 28config ARCH_LUBBOCK
@@ -41,19 +62,11 @@ config MACH_TAVOREVB
41 select PXA3xx 62 select PXA3xx
42 select CPU_PXA930 63 select CPU_PXA930
43 64
44config MACH_TAVOREVB3
45 bool "PXA95x Development Platform (aka TavorEVB III)"
46 select CPU_PXA950
47
48config MACH_SAAR 65config MACH_SAAR
49 bool "PXA930 Handheld Platform (aka SAAR)" 66 bool "PXA930 Handheld Platform (aka SAAR)"
50 select PXA3xx 67 select PXA3xx
51 select CPU_PXA930 68 select CPU_PXA930
52 69
53config MACH_SAARB
54 bool "PXA955 Handheld Platform (aka SAARB)"
55 select CPU_PXA955
56
57comment "Third Party Dev Platforms (sorted by vendor name)" 70comment "Third Party Dev Platforms (sorted by vendor name)"
58 71
59config ARCH_PXA_IDP 72config ARCH_PXA_IDP
@@ -414,6 +427,7 @@ config MACH_CENTRO
414 bool "Palm Centro 685 (GSM)" 427 bool "Palm Centro 685 (GSM)"
415 default y 428 default y
416 depends on ARCH_PXA_PALM 429 depends on ARCH_PXA_PALM
430 select MACH_PALM27X
417 select PXA27x 431 select PXA27x
418 select IWMMXT 432 select IWMMXT
419 select PALM_TREO 433 select PALM_TREO
@@ -425,6 +439,7 @@ config MACH_TREO680
425 bool "Palm Treo 680" 439 bool "Palm Treo 680"
426 default y 440 default y
427 depends on ARCH_PXA_PALM 441 depends on ARCH_PXA_PALM
442 select MACH_PALM27X
428 select PXA27x 443 select PXA27x
429 select IWMMXT 444 select IWMMXT
430 select PALM_TREO 445 select PALM_TREO
@@ -436,15 +451,18 @@ config MACH_RAUMFELD_RC
436 bool "Raumfeld Controller" 451 bool "Raumfeld Controller"
437 select PXA3xx 452 select PXA3xx
438 select CPU_PXA300 453 select CPU_PXA300
454 select POWER_SUPPLY
439 select HAVE_PWM 455 select HAVE_PWM
440 456
441config MACH_RAUMFELD_CONNECTOR 457config MACH_RAUMFELD_CONNECTOR
442 bool "Raumfeld Connector" 458 bool "Raumfeld Connector"
459 select POWER_SUPPLY
443 select PXA3xx 460 select PXA3xx
444 select CPU_PXA300 461 select CPU_PXA300
445 462
446config MACH_RAUMFELD_SPEAKER 463config MACH_RAUMFELD_SPEAKER
447 bool "Raumfeld Speaker" 464 bool "Raumfeld Speaker"
465 select POWER_SUPPLY
448 select PXA3xx 466 select PXA3xx
449 select CPU_PXA300 467 select CPU_PXA300
450 468
@@ -598,7 +616,7 @@ config MACH_ZIPIT2
598 bool "Zipit Z2 Handheld" 616 bool "Zipit Z2 Handheld"
599 select PXA27x 617 select PXA27x
600 select HAVE_PWM 618 select HAVE_PWM
601 619endif
602endmenu 620endmenu
603 621
604config PXA25x 622config PXA25x
@@ -688,6 +706,8 @@ config SHARPSL_PM
688config SHARPSL_PM_MAX1111 706config SHARPSL_PM_MAX1111
689 bool 707 bool
690 select HWMON 708 select HWMON
709 select SPI
710 select SPI_MASTER
691 select SENSORS_MAX1111 711 select SENSORS_MAX1111
692 712
693config PXA_HAVE_ISA_IRQS 713config PXA_HAVE_ISA_IRQS
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index cc39d17b2e0..be0f7df8685 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -19,7 +19,7 @@ endif
19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o 19obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o 20obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o 21obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
22obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o 22obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o
23obj-$(CONFIG_CPU_PXA300) += pxa300.o 23obj-$(CONFIG_CPU_PXA300) += pxa300.o
24obj-$(CONFIG_CPU_PXA320) += pxa320.o 24obj-$(CONFIG_CPU_PXA320) += pxa320.o
25obj-$(CONFIG_CPU_PXA930) += pxa930.o 25obj-$(CONFIG_CPU_PXA930) += pxa930.o
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 7765d677adb..fc0b8544e17 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -591,7 +591,7 @@ static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ct
591 BALLOON3_NAND_CONTROL_REG); 591 BALLOON3_NAND_CONTROL_REG);
592 if (balloon3_ctl_set) 592 if (balloon3_ctl_set)
593 __raw_writel(balloon3_ctl_set, 593 __raw_writel(balloon3_ctl_set,
594 BALLOON3_NAND_CONTROL_REG | 594 BALLOON3_NAND_CONTROL_REG +
595 BALLOON3_FPGA_SETnCLR); 595 BALLOON3_FPGA_SETnCLR);
596 } 596 }
597 597
@@ -608,7 +608,7 @@ static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
608 __raw_writew( 608 __raw_writew(
609 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | 609 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
610 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3, 610 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
611 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); 611 BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
612 612
613 /* Deassert correct nCE line */ 613 /* Deassert correct nCE line */
614 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip, 614 __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
@@ -626,7 +626,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
626 int ret; 626 int ret;
627 627
628 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT, 628 __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
629 BALLOON3_NAND_CONTROL2_REG | BALLOON3_FPGA_SETnCLR); 629 BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR);
630 630
631 ver = __raw_readw(BALLOON3_FPGA_VER); 631 ver = __raw_readw(BALLOON3_FPGA_VER);
632 if (ver < 0x4f08) 632 if (ver < 0x4f08)
@@ -649,7 +649,7 @@ static int balloon3_nand_probe(struct platform_device *pdev)
649 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 | 649 BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
650 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 | 650 BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
651 BALLOON3_NAND_CONTROL_FLWP, 651 BALLOON3_NAND_CONTROL_FLWP,
652 BALLOON3_NAND_CONTROL_REG | BALLOON3_FPGA_SETnCLR); 652 BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
653 return 0; 653 return 0;
654 654
655err2: 655err2:
@@ -807,7 +807,7 @@ static void __init balloon3_init(void)
807 807
808static struct map_desc balloon3_io_desc[] __initdata = { 808static struct map_desc balloon3_io_desc[] __initdata = {
809 { /* CPLD/FPGA */ 809 { /* CPLD/FPGA */
810 .virtual = BALLOON3_FPGA_VIRT, 810 .virtual = (unsigned long)BALLOON3_FPGA_VIRT,
811 .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS), 811 .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS),
812 .length = BALLOON3_FPGA_LENGTH, 812 .length = BALLOON3_FPGA_LENGTH,
813 .type = MT_DEVICE, 813 .type = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 6bf479d9b5a..ebd9259f5ac 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -26,7 +26,7 @@
26 26
27#include <asm/hardware/it8152.h> 27#include <asm/hardware/it8152.h>
28 28
29unsigned long it8152_base_address; 29void __iomem *it8152_base_address;
30static int cmx2xx_it8152_irq_gpio; 30static int cmx2xx_it8152_irq_gpio;
31 31
32static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 32static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index 349896c53ab..f2e4190080c 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -39,7 +39,7 @@ extern void cmx270_init(void);
39#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40) 39#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
40 40
41/* virtual addresses for statically mapped regions */ 41/* virtual addresses for statically mapped regions */
42#define CMX2XX_VIRT_BASE (0xe8000000) 42#define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
43#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) 43#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
44 44
45/* physical address if local-bus attached devices */ 45/* physical address if local-bus attached devices */
@@ -482,7 +482,7 @@ static void __init cmx2xx_init_irq(void)
482/* Map PCI companion statically */ 482/* Map PCI companion statically */
483static struct map_desc cmx2xx_io_desc[] __initdata = { 483static struct map_desc cmx2xx_io_desc[] __initdata = {
484 [0] = { /* PCI bridge */ 484 [0] = { /* PCI bridge */
485 .virtual = CMX2XX_IT8152_VIRT, 485 .virtual = (unsigned long)CMX2XX_IT8152_VIRT,
486 .pfn = __phys_to_pfn(PXA_CS4_PHYS), 486 .pfn = __phys_to_pfn(PXA_CS4_PHYS),
487 .length = SZ_64M, 487 .length = SZ_64M,
488 .type = MT_DEVICE 488 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index d2da301619f..3a7387f93c3 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -775,7 +775,6 @@ static struct gpio cm_x300_wi2wi_gpios[] __initdata = {
775 775
776static void __init cm_x300_init_wi2wi(void) 776static void __init cm_x300_init_wi2wi(void)
777{ 777{
778 int bt_reset, wlan_en;
779 int err; 778 int err;
780 779
781 if (system_rev < 130) { 780 if (system_rev < 130) {
@@ -791,12 +790,11 @@ static void __init cm_x300_init_wi2wi(void)
791 } 790 }
792 791
793 udelay(10); 792 udelay(10);
794 gpio_set_value(bt_reset, 0); 793 gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0);
795 udelay(10); 794 udelay(10);
796 gpio_set_value(bt_reset, 1); 795 gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1);
797 796
798 gpio_free(wlan_en); 797 gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
799 gpio_free(bt_reset);
800} 798}
801 799
802/* MFP */ 800/* MFP */
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
index f4c03659168..bbf9df37ad4 100644
--- a/arch/arm/mach-pxa/include/mach/addr-map.h
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -20,7 +20,7 @@
20 * Peripheral Bus 20 * Peripheral Bus
21 */ 21 */
22#define PERIPH_PHYS 0x40000000 22#define PERIPH_PHYS 0x40000000
23#define PERIPH_VIRT 0xf2000000 23#define PERIPH_VIRT IOMEM(0xf2000000)
24#define PERIPH_SIZE 0x02000000 24#define PERIPH_SIZE 0x02000000
25 25
26/* 26/*
@@ -28,21 +28,21 @@
28 */ 28 */
29#define PXA2XX_SMEMC_PHYS 0x48000000 29#define PXA2XX_SMEMC_PHYS 0x48000000
30#define PXA3XX_SMEMC_PHYS 0x4a000000 30#define PXA3XX_SMEMC_PHYS 0x4a000000
31#define SMEMC_VIRT 0xf6000000 31#define SMEMC_VIRT IOMEM(0xf6000000)
32#define SMEMC_SIZE 0x00100000 32#define SMEMC_SIZE 0x00100000
33 33
34/* 34/*
35 * Dynamic Memory Controller (only on PXA3xx) 35 * Dynamic Memory Controller (only on PXA3xx)
36 */ 36 */
37#define DMEMC_PHYS 0x48100000 37#define DMEMC_PHYS 0x48100000
38#define DMEMC_VIRT 0xf6100000 38#define DMEMC_VIRT IOMEM(0xf6100000)
39#define DMEMC_SIZE 0x00100000 39#define DMEMC_SIZE 0x00100000
40 40
41/* 41/*
42 * Internal Memory Controller (PXA27x and later) 42 * Internal Memory Controller (PXA27x and later)
43 */ 43 */
44#define IMEMC_PHYS 0x58000000 44#define IMEMC_PHYS 0x58000000
45#define IMEMC_VIRT 0xfe000000 45#define IMEMC_VIRT IOMEM(0xfe000000)
46#define IMEMC_SIZE 0x00100000 46#define IMEMC_SIZE 0x00100000
47 47
48#endif /* __ASM_MACH_ADDR_MAP_H */ 48#endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 7074e76146c..6d7eab3d086 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -23,7 +23,7 @@ enum balloon3_features {
23}; 23};
24 24
25#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS 25#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS
26#define BALLOON3_FPGA_VIRT (0xf1000000) /* as per balloon2 */ 26#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */
27#define BALLOON3_FPGA_LENGTH 0x01000000 27#define BALLOON3_FPGA_LENGTH 0x01000000
28 28
29#define BALLOON3_FPGA_SETnCLR (0x1000) 29#define BALLOON3_FPGA_SETnCLR (0x1000)
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
index 41b4c93a96c..576868f8b8c 100644
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
@@ -25,7 +25,7 @@
25#define GPIO_REGS_VIRT io_p2v(0x40E00000) 25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26 26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) 28#define GPIO_REG(x) (GPIO_REGS_VIRT + (x))
29 29
30/* GPIO Pin Level Registers */ 30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00) 31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index de63ca3016b..8184669dde2 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -36,22 +36,23 @@
36 * Note that not all PXA2xx chips implement all those addresses, and the 36 * Note that not all PXA2xx chips implement all those addresses, and the
37 * kernel only maps the minimum needed range of this mapping. 37 * kernel only maps the minimum needed range of this mapping.
38 */ 38 */
39#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
40#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) 39#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
40#define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
41 41
42#ifndef __ASSEMBLY__ 42#ifndef __ASSEMBLY__
43 43# define IOMEM(x) ((void __iomem *)(x))
44# define __REG(x) (*((volatile u32 *)io_p2v(x))) 44# define __REG(x) (*((volatile u32 __iomem *)io_p2v(x)))
45 45
46/* With indexed regs we don't want to feed the index through io_p2v() 46/* With indexed regs we don't want to feed the index through io_p2v()
47 especially if it is a variable, otherwise horrible code will result. */ 47 especially if it is a variable, otherwise horrible code will result. */
48# define __REG2(x,y) \ 48# define __REG2(x,y) \
49 (*(volatile u32 *)((u32)&__REG(x) + (y))) 49 (*(volatile u32 __iomem*)((u32)&__REG(x) + (y)))
50 50
51# define __PREG(x) (io_v2p((u32)&(x))) 51# define __PREG(x) (io_v2p((u32)&(x)))
52 52
53#else 53#else
54 54
55# define IOMEM(x) x
55# define __REG(x) io_p2v(x) 56# define __REG(x) io_p2v(x)
56# define __PREG(x) io_v2p(x) 57# define __PREG(x) io_v2p(x)
57 58
diff --git a/arch/arm/mach-pxa/include/mach/lpd270.h b/arch/arm/mach-pxa/include/mach/lpd270.h
index cd070092b6e..4edc712a2de 100644
--- a/arch/arm/mach-pxa/include/mach/lpd270.h
+++ b/arch/arm/mach-pxa/include/mach/lpd270.h
@@ -13,13 +13,13 @@
13#define __ASM_ARCH_LPD270_H 13#define __ASM_ARCH_LPD270_H
14 14
15#define LPD270_CPLD_PHYS PXA_CS2_PHYS 15#define LPD270_CPLD_PHYS PXA_CS2_PHYS
16#define LPD270_CPLD_VIRT 0xf0000000 16#define LPD270_CPLD_VIRT IOMEM(0xf0000000)
17#define LPD270_CPLD_SIZE 0x00100000 17#define LPD270_CPLD_SIZE 0x00100000
18 18
19#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) 19#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000)
20 20
21/* CPLD registers */ 21/* CPLD registers */
22#define LPD270_CPLD_REG(x) ((unsigned long)(LPD270_CPLD_VIRT + (x))) 22#define LPD270_CPLD_REG(x) (LPD270_CPLD_VIRT + (x))
23#define LPD270_CONTROL LPD270_CPLD_REG(0x00) 23#define LPD270_CONTROL LPD270_CPLD_REG(0x00)
24#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) 24#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04)
25#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) 25#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08)
diff --git a/arch/arm/mach-pxa/include/mach/mtd-xip.h b/arch/arm/mach-pxa/include/mach/mtd-xip.h
index 297387ec361..990d2bf2fb4 100644
--- a/arch/arm/mach-pxa/include/mach/mtd-xip.h
+++ b/arch/arm/mach-pxa/include/mach/mtd-xip.h
@@ -16,7 +16,6 @@
16#define __ARCH_PXA_MTD_XIP_H__ 16#define __ARCH_PXA_MTD_XIP_H__
17 17
18#include <mach/regs-ost.h> 18#include <mach/regs-ost.h>
19#include <mach/regs-intc.h>
20 19
21#define xip_irqpending() (ICIP & ICMR) 20#define xip_irqpending() (ICIP & ICMR)
22 21
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index 0a5e5eadebf..f80bbe246af 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -34,7 +34,7 @@ extern struct pxafb_mode_info palm_320x320_new_lcd_mode;
34extern void __init palm27x_lcd_init(int power, 34extern void __init palm27x_lcd_init(int power,
35 struct pxafb_mode_info *mode); 35 struct pxafb_mode_info *mode);
36#else 36#else
37static inline void palm27x_lcd_init(int power, struct pxafb_mode_info *mode) {} 37#define palm27x_lcd_init(power, mode) do {} while (0)
38#endif 38#endif
39 39
40#if defined(CONFIG_USB_GADGET_PXA27X) || \ 40#if defined(CONFIG_USB_GADGET_PXA27X) || \
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 10abc4f2e8e..7074a6ed46c 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -71,7 +71,7 @@
71 71
72/* Various addresses */ 72/* Various addresses */
73#define PALMTX_PCMCIA_PHYS 0x28000000 73#define PALMTX_PCMCIA_PHYS 0x28000000
74#define PALMTX_PCMCIA_VIRT 0xf0000000 74#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000)
75#define PALMTX_PCMCIA_SIZE 0x100000 75#define PALMTX_PCMCIA_SIZE 0x100000
76 76
77#define PALMTX_PHYS_RAM_START 0xa0000000 77#define PALMTX_PHYS_RAM_START 0xa0000000
@@ -84,8 +84,8 @@
84 84
85#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) 85#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24))
86#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) 86#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25))
87#define PALMTX_NAND_ALE_VIRT 0xff100000 87#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000)
88#define PALMTX_NAND_CLE_VIRT 0xff200000 88#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000)
89 89
90/* TOUCHSCREEN */ 90/* TOUCHSCREEN */
91#define AC97_LINK_FRAME 21 91#define AC97_LINK_FRAME 21
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h
index b9b1bdc4bac..7cff640582b 100644
--- a/arch/arm/mach-pxa/include/mach/pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/pxa27x.h
@@ -1,6 +1,7 @@
1#ifndef __MACH_PXA27x_H 1#ifndef __MACH_PXA27x_H
2#define __MACH_PXA27x_H 2#define __MACH_PXA27x_H
3 3
4#include <linux/suspend.h>
4#include <mach/hardware.h> 5#include <mach/hardware.h>
5#include <mach/pxa2xx-regs.h> 6#include <mach/pxa2xx-regs.h>
6#include <mach/mfp-pxa27x.h> 7#include <mach/mfp-pxa27x.h>
@@ -21,6 +22,7 @@
21extern void __init pxa27x_map_io(void); 22extern void __init pxa27x_map_io(void);
22extern void __init pxa27x_init_irq(void); 23extern void __init pxa27x_init_irq(void);
23extern int __init pxa27x_set_pwrmode(unsigned int mode); 24extern int __init pxa27x_set_pwrmode(unsigned int mode);
25extern void pxa27x_cpu_pm_enter(suspend_state_t state);
24 26
25#define pxa27x_handle_irq ichp_handle_irq 27#define pxa27x_handle_irq ichp_handle_irq
26 28
diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h
new file mode 100644
index 00000000000..cbb097c4cb1
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/pxa95x.h
@@ -0,0 +1,7 @@
1#ifndef __MACH_PXA95X_H
2#define __MACH_PXA95X_H
3
4#include <mach/pxa3xx.h>
5#include <mach/mfp-pxa930.h>
6
7#endif /* __MACH_PXA95X_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 01a45ac4811..486b4c519ae 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -158,5 +158,18 @@ struct pxafb_mach_info {
158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *); 158void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159unsigned long pxafb_get_hsync_time(struct device *dev); 159unsigned long pxafb_get_hsync_time(struct device *dev);
160 160
161#ifdef CONFIG_FB_PXA_SMARTPANEL
161extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); 162extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
162extern int pxafb_smart_flush(struct fb_info *info); 163extern int pxafb_smart_flush(struct fb_info *info);
164#else
165static inline int pxafb_smart_queue(struct fb_info *info,
166 uint16_t *cmds, int n)
167{
168 return 0;
169}
170
171static inline int pxafb_smart_flush(struct fb_info *info)
172{
173 return 0;
174}
175#endif
diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h
index 654adc90c9a..b7de471b273 100644
--- a/arch/arm/mach-pxa/include/mach/smemc.h
+++ b/arch/arm/mach-pxa/include/mach/smemc.h
@@ -13,7 +13,7 @@
13 13
14#define PXA2XX_SMEMC_BASE 0x48000000 14#define PXA2XX_SMEMC_BASE 0x48000000
15#define PXA3XX_SMEMC_BASE 0x4a000000 15#define PXA3XX_SMEMC_BASE 0x4a000000
16#define SMEMC_VIRT 0xf6000000 16#define SMEMC_VIRT IOMEM(0xf6000000)
17 17
18#define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */ 18#define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */
19#define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */ 19#define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */
diff --git a/arch/arm/mach-pxa/include/mach/zeus.h b/arch/arm/mach-pxa/include/mach/zeus.h
index 0641f31a56b..56024f81d57 100644
--- a/arch/arm/mach-pxa/include/mach/zeus.h
+++ b/arch/arm/mach-pxa/include/mach/zeus.h
@@ -68,7 +68,7 @@
68 * Be gentle, and remap that over 32kB... 68 * Be gentle, and remap that over 32kB...
69 */ 69 */
70 70
71#define ZEUS_CPLD (0xf0000000) 71#define ZEUS_CPLD IOMEM(0xf0000000)
72#define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000) 72#define ZEUS_CPLD_VERSION (ZEUS_CPLD + 0x0000)
73#define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000) 73#define ZEUS_CPLD_ISA_IRQ (ZEUS_CPLD + 0x1000)
74#define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000) 74#define ZEUS_CPLD_CONTROL (ZEUS_CPLD + 0x2000)
@@ -76,7 +76,7 @@
76/* CPLD register bits */ 76/* CPLD register bits */
77#define ZEUS_CPLD_CONTROL_CF_RST 0x01 77#define ZEUS_CPLD_CONTROL_CF_RST 0x01
78 78
79#define ZEUS_PC104IO (0xf1000000) 79#define ZEUS_PC104IO IOMEM(0xf1000000)
80 80
81#define ZEUS_SRAM_SIZE (256 * 1024) 81#define ZEUS_SRAM_SIZE (256 * 1024)
82 82
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h
index ea24998b923..ecca976f03d 100644
--- a/arch/arm/mach-pxa/include/mach/zylonite.h
+++ b/arch/arm/mach-pxa/include/mach/zylonite.h
@@ -19,7 +19,7 @@ extern int wm9713_irq;
19extern int lcd_id; 19extern int lcd_id;
20extern int lcd_orientation; 20extern int lcd_orientation;
21 21
22#ifdef CONFIG_CPU_PXA300 22#ifdef CONFIG_MACH_ZYLONITE300
23extern void zylonite_pxa300_init(void); 23extern void zylonite_pxa300_init(void);
24#else 24#else
25static inline void zylonite_pxa300_init(void) 25static inline void zylonite_pxa300_init(void)
@@ -29,7 +29,7 @@ static inline void zylonite_pxa300_init(void)
29} 29}
30#endif 30#endif
31 31
32#ifdef CONFIG_CPU_PXA320 32#ifdef CONFIG_MACH_ZYLONITE320
33extern void zylonite_pxa320_init(void); 33extern void zylonite_pxa320_init(void);
34#else 34#else
35static inline void zylonite_pxa320_init(void) 35static inline void zylonite_pxa320_init(void)
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 8d9200f9226..532c5d3a97d 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -26,7 +26,7 @@
26 26
27#include "generic.h" 27#include "generic.h"
28 28
29#define IRQ_BASE (void __iomem *)io_p2v(0x40d00000) 29#define IRQ_BASE io_p2v(0x40d00000)
30 30
31#define ICIP (0x000) 31#define ICIP (0x000)
32#define ICMR (0x004) 32#define ICMR (0x004)
@@ -64,7 +64,7 @@ static inline void __iomem *irq_base(int i)
64 0x40d00130, 64 0x40d00130,
65 }; 65 };
66 66
67 return (void __iomem *)io_p2v(phys_base[i]); 67 return io_p2v(phys_base[i]);
68} 68}
69 69
70void pxa_mask_irq(struct irq_data *d) 70void pxa_mask_irq(struct irq_data *d)
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 64540d90895..1dd530279e0 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -479,7 +479,7 @@ static void __init lpd270_init(void)
479 479
480static struct map_desc lpd270_io_desc[] __initdata = { 480static struct map_desc lpd270_io_desc[] __initdata = {
481 { 481 {
482 .virtual = LPD270_CPLD_VIRT, 482 .virtual = (unsigned long)LPD270_CPLD_VIRT,
483 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS), 483 .pfn = __phys_to_pfn(LPD270_CPLD_PHYS),
484 .length = LPD270_CPLD_SIZE, 484 .length = LPD270_CPLD_SIZE,
485 .type = MT_DEVICE, 485 .type = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 7346fbfa810..94e9708b349 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -423,6 +423,7 @@ static void __init palmphone_common_init(void)
423 palmtreo_leds_init(); 423 palmtreo_leds_init();
424} 424}
425 425
426#ifdef CONFIG_MACH_TREO680
426static void __init treo680_init(void) 427static void __init treo680_init(void)
427{ 428{
428 pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); 429 pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
@@ -430,7 +431,9 @@ static void __init treo680_init(void)
430 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY, 431 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY,
431 GPIO_NR_TREO680_SD_POWER, 0); 432 GPIO_NR_TREO680_SD_POWER, 0);
432} 433}
434#endif
433 435
436#ifdef CONFIG_MACH_CENTRO
434static void __init centro_init(void) 437static void __init centro_init(void)
435{ 438{
436 pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config)); 439 pxa2xx_mfp_config(ARRAY_AND_SIZE(centro685_pin_config));
@@ -438,7 +441,9 @@ static void __init centro_init(void)
438 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1, 441 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, -1,
439 GPIO_NR_CENTRO_SD_POWER, 1); 442 GPIO_NR_CENTRO_SD_POWER, 1);
440} 443}
444#endif
441 445
446#ifdef CONFIG_MACH_TREO680
442MACHINE_START(TREO680, "Palm Treo 680") 447MACHINE_START(TREO680, "Palm Treo 680")
443 .atag_offset = 0x100, 448 .atag_offset = 0x100,
444 .map_io = pxa27x_map_io, 449 .map_io = pxa27x_map_io,
@@ -448,7 +453,9 @@ MACHINE_START(TREO680, "Palm Treo 680")
448 .timer = &pxa_timer, 453 .timer = &pxa_timer,
449 .init_machine = treo680_init, 454 .init_machine = treo680_init,
450MACHINE_END 455MACHINE_END
456#endif
451 457
458#ifdef CONFIG_MACH_CENTRO
452MACHINE_START(CENTRO, "Palm Centro 685") 459MACHINE_START(CENTRO, "Palm Centro 685")
453 .atag_offset = 0x100, 460 .atag_offset = 0x100,
454 .map_io = pxa27x_map_io, 461 .map_io = pxa27x_map_io,
@@ -458,3 +465,4 @@ MACHINE_START(CENTRO, "Palm Centro 685")
458 .timer = &pxa_timer, 465 .timer = &pxa_timer,
459 .init_machine = centro_init, 466 .init_machine = centro_init,
460MACHINE_END 467MACHINE_END
468#endif
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 2b9e76fc2c9..4e3e45927e9 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -247,7 +247,7 @@ static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
247 unsigned int ctrl) 247 unsigned int ctrl)
248{ 248{
249 struct nand_chip *this = mtd->priv; 249 struct nand_chip *this = mtd->priv;
250 unsigned long nandaddr = (unsigned long)this->IO_ADDR_W; 250 char __iomem *nandaddr = this->IO_ADDR_W;
251 251
252 if (cmd == NAND_CMD_NONE) 252 if (cmd == NAND_CMD_NONE)
253 return; 253 return;
@@ -315,17 +315,17 @@ static inline void palmtx_nand_init(void) {}
315 ******************************************************************************/ 315 ******************************************************************************/
316static struct map_desc palmtx_io_desc[] __initdata = { 316static struct map_desc palmtx_io_desc[] __initdata = {
317{ 317{
318 .virtual = PALMTX_PCMCIA_VIRT, 318 .virtual = (unsigned long)PALMTX_PCMCIA_VIRT,
319 .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS), 319 .pfn = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
320 .length = PALMTX_PCMCIA_SIZE, 320 .length = PALMTX_PCMCIA_SIZE,
321 .type = MT_DEVICE, 321 .type = MT_DEVICE,
322}, { 322}, {
323 .virtual = PALMTX_NAND_ALE_VIRT, 323 .virtual = (unsigned long)PALMTX_NAND_ALE_VIRT,
324 .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS), 324 .pfn = __phys_to_pfn(PALMTX_NAND_ALE_PHYS),
325 .length = SZ_1M, 325 .length = SZ_1M,
326 .type = MT_DEVICE, 326 .type = MT_DEVICE,
327}, { 327}, {
328 .virtual = PALMTX_NAND_CLE_VIRT, 328 .virtual = (unsigned long)PALMTX_NAND_CLE_VIRT,
329 .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS), 329 .pfn = __phys_to_pfn(PALMTX_NAND_CLE_PHYS),
330 .length = SZ_1M, 330 .length = SZ_1M,
331 .type = MT_DEVICE, 331 .type = MT_DEVICE,
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 8746e1090b6..f05f9486b0c 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -325,7 +325,7 @@ void __init pxa26x_init_irq(void)
325 325
326static struct map_desc pxa25x_io_desc[] __initdata = { 326static struct map_desc pxa25x_io_desc[] __initdata = {
327 { /* Mem Ctl */ 327 { /* Mem Ctl */
328 .virtual = SMEMC_VIRT, 328 .virtual = (unsigned long)SMEMC_VIRT,
329 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), 329 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
330 .length = 0x00200000, 330 .length = 0x00200000,
331 .type = MT_DEVICE 331 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 2bb5cf8ba6e..bc5a98ebaa7 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -391,7 +391,7 @@ void __init pxa27x_init_irq(void)
391 391
392static struct map_desc pxa27x_io_desc[] __initdata = { 392static struct map_desc pxa27x_io_desc[] __initdata = {
393 { /* Mem Ctl */ 393 { /* Mem Ctl */
394 .virtual = SMEMC_VIRT, 394 .virtual = (unsigned long)SMEMC_VIRT,
395 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), 395 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
396 .length = 0x00200000, 396 .length = 0x00200000,
397 .type = MT_DEVICE 397 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c
index ce7168b233e..e28dfb88827 100644
--- a/arch/arm/mach-pxa/pxa3xx-ulpi.c
+++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c
@@ -265,6 +265,7 @@ int pxa3xx_u2d_start_hc(struct usb_bus *host)
265 265
266 return err; 266 return err;
267} 267}
268EXPORT_SYMBOL_GPL(pxa3xx_u2d_start_hc);
268 269
269void pxa3xx_u2d_stop_hc(struct usb_bus *host) 270void pxa3xx_u2d_stop_hc(struct usb_bus *host)
270{ 271{
@@ -277,6 +278,7 @@ void pxa3xx_u2d_stop_hc(struct usb_bus *host)
277 278
278 clk_disable(u2d->clk); 279 clk_disable(u2d->clk);
279} 280}
281EXPORT_SYMBOL_GPL(pxa3xx_u2d_stop_hc);
280 282
281static int pxa3xx_u2d_probe(struct platform_device *pdev) 283static int pxa3xx_u2d_probe(struct platform_device *pdev)
282{ 284{
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f940a134553..0737c59b88a 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -393,7 +393,7 @@ void __init pxa3xx_init_irq(void)
393 393
394static struct map_desc pxa3xx_io_desc[] __initdata = { 394static struct map_desc pxa3xx_io_desc[] __initdata = {
395 { /* Mem Ctl */ 395 { /* Mem Ctl */
396 .virtual = SMEMC_VIRT, 396 .virtual = (unsigned long)SMEMC_VIRT,
397 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE), 397 .pfn = __phys_to_pfn(PXA3XX_SMEMC_BASE),
398 .length = 0x00200000, 398 .length = 0x00200000,
399 .type = MT_DEVICE 399 .type = MT_DEVICE
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 3c988b6f718..3e999e308a2 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -24,6 +24,7 @@
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/mfp.h> 25#include <mach/mfp.h>
26#include <mach/mfp-pxa930.h> 26#include <mach/mfp-pxa930.h>
27#include <mach/pxa95x.h>
27 28
28#include "generic.h" 29#include "generic.h"
29 30
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index 84ed72de53b..ead32c90fec 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -686,7 +686,8 @@ static void z2_power_off(void)
686 */ 686 */
687 PSPR = 0x0; 687 PSPR = 0x0;
688 local_irq_disable(); 688 local_irq_disable();
689 pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PHYS_OFFSET - PAGE_OFFSET); 689 pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP);
690 pxa27x_cpu_pm_enter(PM_SUSPEND_MEM);
690} 691}
691#else 692#else
692#define z2_power_off NULL 693#define z2_power_off NULL
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index c424e7d85ce..498b83b089f 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -860,25 +860,25 @@ static void __init zeus_init(void)
860 860
861static struct map_desc zeus_io_desc[] __initdata = { 861static struct map_desc zeus_io_desc[] __initdata = {
862 { 862 {
863 .virtual = ZEUS_CPLD_VERSION, 863 .virtual = (unsigned long)ZEUS_CPLD_VERSION,
864 .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS), 864 .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
865 .length = 0x1000, 865 .length = 0x1000,
866 .type = MT_DEVICE, 866 .type = MT_DEVICE,
867 }, 867 },
868 { 868 {
869 .virtual = ZEUS_CPLD_ISA_IRQ, 869 .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ,
870 .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS), 870 .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
871 .length = 0x1000, 871 .length = 0x1000,
872 .type = MT_DEVICE, 872 .type = MT_DEVICE,
873 }, 873 },
874 { 874 {
875 .virtual = ZEUS_CPLD_CONTROL, 875 .virtual = (unsigned long)ZEUS_CPLD_CONTROL,
876 .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS), 876 .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
877 .length = 0x1000, 877 .length = 0x1000,
878 .type = MT_DEVICE, 878 .type = MT_DEVICE,
879 }, 879 },
880 { 880 {
881 .virtual = ZEUS_PC104IO, 881 .virtual = (unsigned long)ZEUS_PC104IO,
882 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), 882 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS),
883 .length = 0x00800000, 883 .length = 0x00800000,
884 .type = MT_DEVICE, 884 .type = MT_DEVICE,