Merge git://git.infradead.org/mtd-2.6

* git://git.infradead.org/mtd-2.6: (69 commits)
  Revert "[MTD] m25p80.c code cleanup"
  [MTD] [NAND] GPIO driver depends on ARM... for now.
  [MTD] [NAND] sh_flctl: fix compile error
  [MTD] [NOR] AT49BV6416 has swapped erase regions
  [MTD] [NAND] GPIO NAND flash driver
  [MTD] cmdlineparts documentation change - explain where mtd-id comes from
  [MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detection
  [MTD] [NAND] Fix compilation warnings in drivers/mtd/nand/cs553x_nand.c
  [JFFS2] Write buffer offset adjustment for NOR-ECC (Sibley) flash
  [MTD] mtdoops: Fix a bug where block may not be erased
  [MTD] mtdoops: Add a magic number to logged kernel oops
  [MTD] mtdoops: Fix an off by one error
  [JFFS2] Correct parameter names of jffs2_compress() in comments
  [MTD] [NAND] sh_flctl: add support for Renesas SuperH FLCTL
  [MTD] [NAND] Bug on atmel_nand HW ECC : OOB info not correctly written
  [MTD] [MAPS] Remove unused variable after ROM API cleanup.
  [MTD] m25p80.c extended jedec support (v2)
  [MTD] remove unused mtd parameter in of_mtd_parse_partitions()
  [MTD] [NAND] remove dead Kconfig associated with !CONFIG_PPC_MERGE
  [MTD] [NAND] driver extension to support NAND on TQM85xx modules
  ...

1 files changed, 42 insertions, 2 deletions

diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h b/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h
index eb4b190b665..eb35fca9aea 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h
@@ -4,6 +4,43 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 
+struct pxa3xx_nand_timing {
+        unsigned int    tCH;  /* Enable signal hold time */
+        unsigned int    tCS;  /* Enable signal setup time */
+        unsigned int    tWH;  /* ND_nWE high duration */
+        unsigned int    tWP;  /* ND_nWE pulse time */
+        unsigned int    tRH;  /* ND_nRE high duration */
+        unsigned int    tRP;  /* ND_nRE pulse width */
+        unsigned int    tR;   /* ND_nWE high to ND_nRE low for read */
+        unsigned int    tWHR; /* ND_nWE high to ND_nRE low for status read */
+        unsigned int    tAR;  /* ND_ALE low to ND_nRE low delay */
+};
+
+struct pxa3xx_nand_cmdset {
+        uint16_t        read1;
+        uint16_t        read2;
+        uint16_t        program;
+        uint16_t        read_status;
+        uint16_t        read_id;
+        uint16_t        erase;
+        uint16_t        reset;
+        uint16_t        lock;
+        uint16_t        unlock;
+        uint16_t        lock_status;
+};
+
+struct pxa3xx_nand_flash {
+        const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
+        const struct pxa3xx_nand_cmdset *cmdset;
+
+        uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */
+        uint32_t page_size;     /* Page size in bytes (PAGE_SZ) */
+        uint32_t flash_width;   /* Width of Flash memory (DWIDTH_M) */
+        uint32_t dfc_width;     /* Width of flash controller(DWIDTH_C) */
+        uint32_t num_blocks;    /* Number of physical blocks in Flash */
+        uint32_t chip_id;
+};
+
 struct pxa3xx_nand_platform_data {
 
         /* the data flash bus is shared between the Static Memory
@@ -12,8 +49,11 @@ struct pxa3xx_nand_platform_data {
          */
         int     enable_arbiter;
 
-        struct mtd_partition *parts;
-        unsigned int    nr_parts;
+        const struct mtd_partition              *parts;
+        unsigned int                            nr_parts;
+
+        const struct pxa3xx_nand_flash *        flash;
+        size_t                                  num_flash;
 };
 
 extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);