diff options
author | Benoit Cousson <b-cousson@ti.com> | 2010-12-21 23:08:34 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 23:08:34 -0500 |
commit | b399bca897802db3f342b6f3032a19ab8f2af99b (patch) | |
tree | 88bff6a9e2ed7e60cc2f5c0a85c74434d711749d /arch/arm/mach-omap2 | |
parent | 8f25bdc55d619bdd469a90b82743248680422507 (diff) |
OMAP4: hwmod & clock data: Fix GPIO opt_clks and ocp_if iclk
Fix opt clocks name in clock framework and hwmod.
Add the missing iclk in the ocp_if structure.
Add the HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to ensure
the the GPIO optional clock is enable during reset.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Tested-by: Charulatha V <charu@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 23 |
2 files changed, 23 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index d34ca7526b5..850ffc7b70c 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3102,17 +3102,17 @@ static struct omap_clk omap44xx_clks[] = { | |||
3102 | CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), | 3102 | CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), |
3103 | CLK(NULL, "fdif_fck", &fdif_fck, CK_443X), | 3103 | CLK(NULL, "fdif_fck", &fdif_fck, CK_443X), |
3104 | CLK(NULL, "fpka_fck", &fpka_fck, CK_443X), | 3104 | CLK(NULL, "fpka_fck", &fpka_fck, CK_443X), |
3105 | CLK(NULL, "gpio1_dbck", &gpio1_dbclk, CK_443X), | 3105 | CLK(NULL, "gpio1_dbclk", &gpio1_dbclk, CK_443X), |
3106 | CLK(NULL, "gpio1_ick", &gpio1_ick, CK_443X), | 3106 | CLK(NULL, "gpio1_ick", &gpio1_ick, CK_443X), |
3107 | CLK(NULL, "gpio2_dbck", &gpio2_dbclk, CK_443X), | 3107 | CLK(NULL, "gpio2_dbclk", &gpio2_dbclk, CK_443X), |
3108 | CLK(NULL, "gpio2_ick", &gpio2_ick, CK_443X), | 3108 | CLK(NULL, "gpio2_ick", &gpio2_ick, CK_443X), |
3109 | CLK(NULL, "gpio3_dbck", &gpio3_dbclk, CK_443X), | 3109 | CLK(NULL, "gpio3_dbclk", &gpio3_dbclk, CK_443X), |
3110 | CLK(NULL, "gpio3_ick", &gpio3_ick, CK_443X), | 3110 | CLK(NULL, "gpio3_ick", &gpio3_ick, CK_443X), |
3111 | CLK(NULL, "gpio4_dbck", &gpio4_dbclk, CK_443X), | 3111 | CLK(NULL, "gpio4_dbclk", &gpio4_dbclk, CK_443X), |
3112 | CLK(NULL, "gpio4_ick", &gpio4_ick, CK_443X), | 3112 | CLK(NULL, "gpio4_ick", &gpio4_ick, CK_443X), |
3113 | CLK(NULL, "gpio5_dbck", &gpio5_dbclk, CK_443X), | 3113 | CLK(NULL, "gpio5_dbclk", &gpio5_dbclk, CK_443X), |
3114 | CLK(NULL, "gpio5_ick", &gpio5_ick, CK_443X), | 3114 | CLK(NULL, "gpio5_ick", &gpio5_ick, CK_443X), |
3115 | CLK(NULL, "gpio6_dbck", &gpio6_dbclk, CK_443X), | 3115 | CLK(NULL, "gpio6_dbclk", &gpio6_dbclk, CK_443X), |
3116 | CLK(NULL, "gpio6_ick", &gpio6_ick, CK_443X), | 3116 | CLK(NULL, "gpio6_ick", &gpio6_ick, CK_443X), |
3117 | CLK(NULL, "gpmc_ick", &gpmc_ick, CK_443X), | 3117 | CLK(NULL, "gpmc_ick", &gpmc_ick, CK_443X), |
3118 | CLK(NULL, "gpu_fck", &gpu_fck, CK_443X), | 3118 | CLK(NULL, "gpu_fck", &gpu_fck, CK_443X), |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index ad8015857f2..efc614de7f6 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -710,6 +710,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { | |||
710 | static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { | 710 | static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { |
711 | .master = &omap44xx_l4_wkup_hwmod, | 711 | .master = &omap44xx_l4_wkup_hwmod, |
712 | .slave = &omap44xx_gpio1_hwmod, | 712 | .slave = &omap44xx_gpio1_hwmod, |
713 | .clk = "l4_wkup_clk_mux_ck", | ||
713 | .addr = omap44xx_gpio1_addrs, | 714 | .addr = omap44xx_gpio1_addrs, |
714 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), | 715 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), |
715 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 716 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
@@ -721,7 +722,7 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio1_slaves[] = { | |||
721 | }; | 722 | }; |
722 | 723 | ||
723 | static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { | 724 | static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { |
724 | { .role = "dbclk", .clk = "sys_32k_ck" }, | 725 | { .role = "dbclk", .clk = "gpio1_dbclk" }, |
725 | }; | 726 | }; |
726 | 727 | ||
727 | static struct omap_hwmod omap44xx_gpio1_hwmod = { | 728 | static struct omap_hwmod omap44xx_gpio1_hwmod = { |
@@ -761,6 +762,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { | |||
761 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { | 762 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { |
762 | .master = &omap44xx_l4_per_hwmod, | 763 | .master = &omap44xx_l4_per_hwmod, |
763 | .slave = &omap44xx_gpio2_hwmod, | 764 | .slave = &omap44xx_gpio2_hwmod, |
765 | .clk = "l4_div_ck", | ||
764 | .addr = omap44xx_gpio2_addrs, | 766 | .addr = omap44xx_gpio2_addrs, |
765 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), | 767 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), |
766 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 768 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
@@ -772,12 +774,13 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio2_slaves[] = { | |||
772 | }; | 774 | }; |
773 | 775 | ||
774 | static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { | 776 | static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { |
775 | { .role = "dbclk", .clk = "sys_32k_ck" }, | 777 | { .role = "dbclk", .clk = "gpio2_dbclk" }, |
776 | }; | 778 | }; |
777 | 779 | ||
778 | static struct omap_hwmod omap44xx_gpio2_hwmod = { | 780 | static struct omap_hwmod omap44xx_gpio2_hwmod = { |
779 | .name = "gpio2", | 781 | .name = "gpio2", |
780 | .class = &omap44xx_gpio_hwmod_class, | 782 | .class = &omap44xx_gpio_hwmod_class, |
783 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
781 | .mpu_irqs = omap44xx_gpio2_irqs, | 784 | .mpu_irqs = omap44xx_gpio2_irqs, |
782 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), | 785 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), |
783 | .main_clk = "gpio2_ick", | 786 | .main_clk = "gpio2_ick", |
@@ -812,6 +815,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { | |||
812 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { | 815 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { |
813 | .master = &omap44xx_l4_per_hwmod, | 816 | .master = &omap44xx_l4_per_hwmod, |
814 | .slave = &omap44xx_gpio3_hwmod, | 817 | .slave = &omap44xx_gpio3_hwmod, |
818 | .clk = "l4_div_ck", | ||
815 | .addr = omap44xx_gpio3_addrs, | 819 | .addr = omap44xx_gpio3_addrs, |
816 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), | 820 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), |
817 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 821 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
@@ -823,12 +827,13 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio3_slaves[] = { | |||
823 | }; | 827 | }; |
824 | 828 | ||
825 | static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { | 829 | static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { |
826 | { .role = "dbclk", .clk = "sys_32k_ck" }, | 830 | { .role = "dbclk", .clk = "gpio3_dbclk" }, |
827 | }; | 831 | }; |
828 | 832 | ||
829 | static struct omap_hwmod omap44xx_gpio3_hwmod = { | 833 | static struct omap_hwmod omap44xx_gpio3_hwmod = { |
830 | .name = "gpio3", | 834 | .name = "gpio3", |
831 | .class = &omap44xx_gpio_hwmod_class, | 835 | .class = &omap44xx_gpio_hwmod_class, |
836 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
832 | .mpu_irqs = omap44xx_gpio3_irqs, | 837 | .mpu_irqs = omap44xx_gpio3_irqs, |
833 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), | 838 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), |
834 | .main_clk = "gpio3_ick", | 839 | .main_clk = "gpio3_ick", |
@@ -863,6 +868,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { | |||
863 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { | 868 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { |
864 | .master = &omap44xx_l4_per_hwmod, | 869 | .master = &omap44xx_l4_per_hwmod, |
865 | .slave = &omap44xx_gpio4_hwmod, | 870 | .slave = &omap44xx_gpio4_hwmod, |
871 | .clk = "l4_div_ck", | ||
866 | .addr = omap44xx_gpio4_addrs, | 872 | .addr = omap44xx_gpio4_addrs, |
867 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), | 873 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), |
868 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 874 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
@@ -874,12 +880,13 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio4_slaves[] = { | |||
874 | }; | 880 | }; |
875 | 881 | ||
876 | static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { | 882 | static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { |
877 | { .role = "dbclk", .clk = "sys_32k_ck" }, | 883 | { .role = "dbclk", .clk = "gpio4_dbclk" }, |
878 | }; | 884 | }; |
879 | 885 | ||
880 | static struct omap_hwmod omap44xx_gpio4_hwmod = { | 886 | static struct omap_hwmod omap44xx_gpio4_hwmod = { |
881 | .name = "gpio4", | 887 | .name = "gpio4", |
882 | .class = &omap44xx_gpio_hwmod_class, | 888 | .class = &omap44xx_gpio_hwmod_class, |
889 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
883 | .mpu_irqs = omap44xx_gpio4_irqs, | 890 | .mpu_irqs = omap44xx_gpio4_irqs, |
884 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), | 891 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), |
885 | .main_clk = "gpio4_ick", | 892 | .main_clk = "gpio4_ick", |
@@ -914,6 +921,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { | |||
914 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { | 921 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { |
915 | .master = &omap44xx_l4_per_hwmod, | 922 | .master = &omap44xx_l4_per_hwmod, |
916 | .slave = &omap44xx_gpio5_hwmod, | 923 | .slave = &omap44xx_gpio5_hwmod, |
924 | .clk = "l4_div_ck", | ||
917 | .addr = omap44xx_gpio5_addrs, | 925 | .addr = omap44xx_gpio5_addrs, |
918 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), | 926 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), |
919 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 927 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
@@ -925,12 +933,13 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio5_slaves[] = { | |||
925 | }; | 933 | }; |
926 | 934 | ||
927 | static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { | 935 | static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { |
928 | { .role = "dbclk", .clk = "sys_32k_ck" }, | 936 | { .role = "dbclk", .clk = "gpio5_dbclk" }, |
929 | }; | 937 | }; |
930 | 938 | ||
931 | static struct omap_hwmod omap44xx_gpio5_hwmod = { | 939 | static struct omap_hwmod omap44xx_gpio5_hwmod = { |
932 | .name = "gpio5", | 940 | .name = "gpio5", |
933 | .class = &omap44xx_gpio_hwmod_class, | 941 | .class = &omap44xx_gpio_hwmod_class, |
942 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
934 | .mpu_irqs = omap44xx_gpio5_irqs, | 943 | .mpu_irqs = omap44xx_gpio5_irqs, |
935 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), | 944 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), |
936 | .main_clk = "gpio5_ick", | 945 | .main_clk = "gpio5_ick", |
@@ -965,6 +974,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { | |||
965 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { | 974 | static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { |
966 | .master = &omap44xx_l4_per_hwmod, | 975 | .master = &omap44xx_l4_per_hwmod, |
967 | .slave = &omap44xx_gpio6_hwmod, | 976 | .slave = &omap44xx_gpio6_hwmod, |
977 | .clk = "l4_div_ck", | ||
968 | .addr = omap44xx_gpio6_addrs, | 978 | .addr = omap44xx_gpio6_addrs, |
969 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), | 979 | .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), |
970 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 980 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
@@ -976,12 +986,13 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio6_slaves[] = { | |||
976 | }; | 986 | }; |
977 | 987 | ||
978 | static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { | 988 | static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { |
979 | { .role = "dbclk", .clk = "sys_32k_ck" }, | 989 | { .role = "dbclk", .clk = "gpio6_dbclk" }, |
980 | }; | 990 | }; |
981 | 991 | ||
982 | static struct omap_hwmod omap44xx_gpio6_hwmod = { | 992 | static struct omap_hwmod omap44xx_gpio6_hwmod = { |
983 | .name = "gpio6", | 993 | .name = "gpio6", |
984 | .class = &omap44xx_gpio_hwmod_class, | 994 | .class = &omap44xx_gpio_hwmod_class, |
995 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
985 | .mpu_irqs = omap44xx_gpio6_irqs, | 996 | .mpu_irqs = omap44xx_gpio6_irqs, |
986 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), | 997 | .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), |
987 | .main_clk = "gpio6_ick", | 998 | .main_clk = "gpio6_ick", |