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authorBenoit Cousson <b-cousson@ti.com>2011-07-10 07:56:29 -0400
committerPaul Walmsley <paul@pwsan.com>2011-07-10 07:56:29 -0400
commita5322c6f3a3b0a81347c57de2f3a86b851b49bcf (patch)
tree40eef11d93a8ea7213e8bc2084a9e570478038bf /arch/arm/mach-omap2
parentc84584139aaeef7631df152e13cbf319d8e55950 (diff)
OMAP4: hwmod data: Add clock domain attribute
In OMAP PRCM terminology, the clock domain is defined as a group of IPs that share some clocks and most of the time an interface clock. Every IP does belong to a clockdomain. For the moment the clock domain attribute is affected to a clock node. The issue with that approach, is that a clock might or not belong to a clock domain. Moreover during module transition, it is up to a module to handle properly the clock domain state and not to a clock node. Create a clkdm_name attribute to provide this information per hwmod. Populate this attribute for every OMAP4 hwmod entries. Future cleanup series with remove that information from the OMAP4 clock when it is relevant. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: fix the mpuss_clkdm name] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c85
2 files changed, 84 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 66090f2676c..dccc651fa0d 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -565,7 +565,7 @@ static struct clockdomain ducati_44xx_clkdm = {
565}; 565};
566 566
567static struct clockdomain mpu_44xx_clkdm = { 567static struct clockdomain mpu_44xx_clkdm = {
568 .name = "mpu_clkdm", 568 .name = "mpuss_clkdm",
569 .pwrdm = { .name = "mpu_pwrdm" }, 569 .pwrdm = { .name = "mpu_pwrdm" },
570 .prcm_partition = OMAP4430_CM1_PARTITION, 570 .prcm_partition = OMAP4430_CM1_PARTITION,
571 .cm_inst = OMAP4430_CM1_MPU_INST, 571 .cm_inst = OMAP4430_CM1_MPU_INST,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 5d5df49749d..becae45db6d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -123,9 +123,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
123static struct omap_hwmod omap44xx_dmm_hwmod = { 123static struct omap_hwmod omap44xx_dmm_hwmod = {
124 .name = "dmm", 124 .name = "dmm",
125 .class = &omap44xx_dmm_hwmod_class, 125 .class = &omap44xx_dmm_hwmod_class,
126 .mpu_irqs = omap44xx_dmm_irqs, 126 .clkdm_name = "l3_emif_clkdm",
127 .slaves = omap44xx_dmm_slaves, 127 .slaves = omap44xx_dmm_slaves,
128 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), 128 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
129 .mpu_irqs = omap44xx_dmm_irqs,
129 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 130 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
130}; 131};
131 132
@@ -173,6 +174,7 @@ static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = {
173static struct omap_hwmod omap44xx_emif_fw_hwmod = { 174static struct omap_hwmod omap44xx_emif_fw_hwmod = {
174 .name = "emif_fw", 175 .name = "emif_fw",
175 .class = &omap44xx_emif_fw_hwmod_class, 176 .class = &omap44xx_emif_fw_hwmod_class,
177 .clkdm_name = "l3_emif_clkdm",
176 .slaves = omap44xx_emif_fw_slaves, 178 .slaves = omap44xx_emif_fw_slaves,
177 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), 179 .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves),
178 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 180 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -212,6 +214,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {
212static struct omap_hwmod omap44xx_l3_instr_hwmod = { 214static struct omap_hwmod omap44xx_l3_instr_hwmod = {
213 .name = "l3_instr", 215 .name = "l3_instr",
214 .class = &omap44xx_l3_hwmod_class, 216 .class = &omap44xx_l3_hwmod_class,
217 .clkdm_name = "l3_instr_clkdm",
215 .slaves = omap44xx_l3_instr_slaves, 218 .slaves = omap44xx_l3_instr_slaves,
216 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), 219 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves),
217 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 220 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -304,6 +307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
304static struct omap_hwmod omap44xx_l3_main_1_hwmod = { 307static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
305 .name = "l3_main_1", 308 .name = "l3_main_1",
306 .class = &omap44xx_l3_hwmod_class, 309 .class = &omap44xx_l3_hwmod_class,
310 .clkdm_name = "l3_1_clkdm",
307 .mpu_irqs = omap44xx_l3_main_1_irqs, 311 .mpu_irqs = omap44xx_l3_main_1_irqs,
308 .slaves = omap44xx_l3_main_1_slaves, 312 .slaves = omap44xx_l3_main_1_slaves,
309 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), 313 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
@@ -400,6 +404,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
400static struct omap_hwmod omap44xx_l3_main_2_hwmod = { 404static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
401 .name = "l3_main_2", 405 .name = "l3_main_2",
402 .class = &omap44xx_l3_hwmod_class, 406 .class = &omap44xx_l3_hwmod_class,
407 .clkdm_name = "l3_2_clkdm",
403 .slaves = omap44xx_l3_main_2_slaves, 408 .slaves = omap44xx_l3_main_2_slaves,
404 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), 409 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves),
405 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 410 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -450,6 +455,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = {
450static struct omap_hwmod omap44xx_l3_main_3_hwmod = { 455static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
451 .name = "l3_main_3", 456 .name = "l3_main_3",
452 .class = &omap44xx_l3_hwmod_class, 457 .class = &omap44xx_l3_hwmod_class,
458 .clkdm_name = "l3_instr_clkdm",
453 .slaves = omap44xx_l3_main_3_slaves, 459 .slaves = omap44xx_l3_main_3_slaves,
454 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), 460 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves),
455 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 461 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -507,6 +513,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {
507static struct omap_hwmod omap44xx_l4_abe_hwmod = { 513static struct omap_hwmod omap44xx_l4_abe_hwmod = {
508 .name = "l4_abe", 514 .name = "l4_abe",
509 .class = &omap44xx_l4_hwmod_class, 515 .class = &omap44xx_l4_hwmod_class,
516 .clkdm_name = "abe_clkdm",
510 .slaves = omap44xx_l4_abe_slaves, 517 .slaves = omap44xx_l4_abe_slaves,
511 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), 518 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves),
512 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 519 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -529,6 +536,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = {
529static struct omap_hwmod omap44xx_l4_cfg_hwmod = { 536static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
530 .name = "l4_cfg", 537 .name = "l4_cfg",
531 .class = &omap44xx_l4_hwmod_class, 538 .class = &omap44xx_l4_hwmod_class,
539 .clkdm_name = "l4_cfg_clkdm",
532 .slaves = omap44xx_l4_cfg_slaves, 540 .slaves = omap44xx_l4_cfg_slaves,
533 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), 541 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves),
534 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 542 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -551,6 +559,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = {
551static struct omap_hwmod omap44xx_l4_per_hwmod = { 559static struct omap_hwmod omap44xx_l4_per_hwmod = {
552 .name = "l4_per", 560 .name = "l4_per",
553 .class = &omap44xx_l4_hwmod_class, 561 .class = &omap44xx_l4_hwmod_class,
562 .clkdm_name = "l4_per_clkdm",
554 .slaves = omap44xx_l4_per_slaves, 563 .slaves = omap44xx_l4_per_slaves,
555 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), 564 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves),
556 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 565 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -573,6 +582,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = {
573static struct omap_hwmod omap44xx_l4_wkup_hwmod = { 582static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
574 .name = "l4_wkup", 583 .name = "l4_wkup",
575 .class = &omap44xx_l4_hwmod_class, 584 .class = &omap44xx_l4_hwmod_class,
585 .clkdm_name = "l4_wkup_clkdm",
576 .slaves = omap44xx_l4_wkup_slaves, 586 .slaves = omap44xx_l4_wkup_slaves,
577 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), 587 .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves),
578 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 588 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -603,6 +613,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {
603static struct omap_hwmod omap44xx_mpu_private_hwmod = { 613static struct omap_hwmod omap44xx_mpu_private_hwmod = {
604 .name = "mpu_private", 614 .name = "mpu_private",
605 .class = &omap44xx_mpu_bus_hwmod_class, 615 .class = &omap44xx_mpu_bus_hwmod_class,
616 .clkdm_name = "mpuss_clkdm",
606 .slaves = omap44xx_mpu_private_slaves, 617 .slaves = omap44xx_mpu_private_slaves,
607 .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), 618 .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves),
608 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 619 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -741,6 +752,7 @@ static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = {
741static struct omap_hwmod omap44xx_aess_hwmod = { 752static struct omap_hwmod omap44xx_aess_hwmod = {
742 .name = "aess", 753 .name = "aess",
743 .class = &omap44xx_aess_hwmod_class, 754 .class = &omap44xx_aess_hwmod_class,
755 .clkdm_name = "abe_clkdm",
744 .mpu_irqs = omap44xx_aess_irqs, 756 .mpu_irqs = omap44xx_aess_irqs,
745 .sdma_reqs = omap44xx_aess_sdma_reqs, 757 .sdma_reqs = omap44xx_aess_sdma_reqs,
746 .main_clk = "aess_fck", 758 .main_clk = "aess_fck",
@@ -773,6 +785,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {
773static struct omap_hwmod omap44xx_bandgap_hwmod = { 785static struct omap_hwmod omap44xx_bandgap_hwmod = {
774 .name = "bandgap", 786 .name = "bandgap",
775 .class = &omap44xx_bandgap_hwmod_class, 787 .class = &omap44xx_bandgap_hwmod_class,
788 .clkdm_name = "l4_wkup_clkdm",
776 .prcm = { 789 .prcm = {
777 .omap4 = { 790 .omap4 = {
778 .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, 791 .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL,
@@ -830,6 +843,7 @@ static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = {
830static struct omap_hwmod omap44xx_counter_32k_hwmod = { 843static struct omap_hwmod omap44xx_counter_32k_hwmod = {
831 .name = "counter_32k", 844 .name = "counter_32k",
832 .class = &omap44xx_counter_hwmod_class, 845 .class = &omap44xx_counter_hwmod_class,
846 .clkdm_name = "l4_wkup_clkdm",
833 .flags = HWMOD_SWSUP_SIDLE, 847 .flags = HWMOD_SWSUP_SIDLE,
834 .main_clk = "sys_32k_ck", 848 .main_clk = "sys_32k_ck",
835 .prcm = { 849 .prcm = {
@@ -913,6 +927,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = {
913static struct omap_hwmod omap44xx_dma_system_hwmod = { 927static struct omap_hwmod omap44xx_dma_system_hwmod = {
914 .name = "dma_system", 928 .name = "dma_system",
915 .class = &omap44xx_dma_hwmod_class, 929 .class = &omap44xx_dma_hwmod_class,
930 .clkdm_name = "l3_dma_clkdm",
916 .mpu_irqs = omap44xx_dma_system_irqs, 931 .mpu_irqs = omap44xx_dma_system_irqs,
917 .main_clk = "l3_div_ck", 932 .main_clk = "l3_div_ck",
918 .prcm = { 933 .prcm = {
@@ -1005,6 +1020,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = {
1005static struct omap_hwmod omap44xx_dmic_hwmod = { 1020static struct omap_hwmod omap44xx_dmic_hwmod = {
1006 .name = "dmic", 1021 .name = "dmic",
1007 .class = &omap44xx_dmic_hwmod_class, 1022 .class = &omap44xx_dmic_hwmod_class,
1023 .clkdm_name = "abe_clkdm",
1008 .mpu_irqs = omap44xx_dmic_irqs, 1024 .mpu_irqs = omap44xx_dmic_irqs,
1009 .sdma_reqs = omap44xx_dmic_sdma_reqs, 1025 .sdma_reqs = omap44xx_dmic_sdma_reqs,
1010 .main_clk = "dmic_fck", 1026 .main_clk = "dmic_fck",
@@ -1072,6 +1088,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = {
1072static struct omap_hwmod omap44xx_dsp_c0_hwmod = { 1088static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
1073 .name = "dsp_c0", 1089 .name = "dsp_c0",
1074 .class = &omap44xx_dsp_hwmod_class, 1090 .class = &omap44xx_dsp_hwmod_class,
1091 .clkdm_name = "tesla_clkdm",
1075 .flags = HWMOD_INIT_NO_RESET, 1092 .flags = HWMOD_INIT_NO_RESET,
1076 .rst_lines = omap44xx_dsp_c0_resets, 1093 .rst_lines = omap44xx_dsp_c0_resets,
1077 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), 1094 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets),
@@ -1086,6 +1103,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
1086static struct omap_hwmod omap44xx_dsp_hwmod = { 1103static struct omap_hwmod omap44xx_dsp_hwmod = {
1087 .name = "dsp", 1104 .name = "dsp",
1088 .class = &omap44xx_dsp_hwmod_class, 1105 .class = &omap44xx_dsp_hwmod_class,
1106 .clkdm_name = "tesla_clkdm",
1089 .mpu_irqs = omap44xx_dsp_irqs, 1107 .mpu_irqs = omap44xx_dsp_irqs,
1090 .rst_lines = omap44xx_dsp_resets, 1108 .rst_lines = omap44xx_dsp_resets,
1091 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), 1109 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
@@ -1177,6 +1195,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1177static struct omap_hwmod omap44xx_dss_hwmod = { 1195static struct omap_hwmod omap44xx_dss_hwmod = {
1178 .name = "dss_core", 1196 .name = "dss_core",
1179 .class = &omap44xx_dss_hwmod_class, 1197 .class = &omap44xx_dss_hwmod_class,
1198 .clkdm_name = "l3_dss_clkdm",
1180 .main_clk = "dss_dss_clk", 1199 .main_clk = "dss_dss_clk",
1181 .prcm = { 1200 .prcm = {
1182 .omap4 = { 1201 .omap4 = {
@@ -1278,7 +1297,7 @@ static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
1278static struct omap_hwmod omap44xx_dss_dispc_hwmod = { 1297static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1279 .name = "dss_dispc", 1298 .name = "dss_dispc",
1280 .class = &omap44xx_dispc_hwmod_class, 1299 .class = &omap44xx_dispc_hwmod_class,
1281 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1300 .clkdm_name = "l3_dss_clkdm",
1282 .mpu_irqs = omap44xx_dss_dispc_irqs, 1301 .mpu_irqs = omap44xx_dss_dispc_irqs,
1283 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, 1302 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
1284 .main_clk = "dss_dss_clk", 1303 .main_clk = "dss_dss_clk",
@@ -1376,6 +1395,7 @@ static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
1376static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { 1395static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1377 .name = "dss_dsi1", 1396 .name = "dss_dsi1",
1378 .class = &omap44xx_dsi_hwmod_class, 1397 .class = &omap44xx_dsi_hwmod_class,
1398 .clkdm_name = "l3_dss_clkdm",
1379 .mpu_irqs = omap44xx_dss_dsi1_irqs, 1399 .mpu_irqs = omap44xx_dss_dsi1_irqs,
1380 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, 1400 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
1381 .main_clk = "dss_dss_clk", 1401 .main_clk = "dss_dss_clk",
@@ -1452,6 +1472,7 @@ static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = {
1452static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { 1472static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
1453 .name = "dss_dsi2", 1473 .name = "dss_dsi2",
1454 .class = &omap44xx_dsi_hwmod_class, 1474 .class = &omap44xx_dsi_hwmod_class,
1475 .clkdm_name = "l3_dss_clkdm",
1455 .mpu_irqs = omap44xx_dss_dsi2_irqs, 1476 .mpu_irqs = omap44xx_dss_dsi2_irqs,
1456 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, 1477 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
1457 .main_clk = "dss_dss_clk", 1478 .main_clk = "dss_dss_clk",
@@ -1548,6 +1569,7 @@ static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {
1548static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { 1569static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1549 .name = "dss_hdmi", 1570 .name = "dss_hdmi",
1550 .class = &omap44xx_hdmi_hwmod_class, 1571 .class = &omap44xx_hdmi_hwmod_class,
1572 .clkdm_name = "l3_dss_clkdm",
1551 .mpu_irqs = omap44xx_dss_hdmi_irqs, 1573 .mpu_irqs = omap44xx_dss_hdmi_irqs,
1552 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 1574 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
1553 .main_clk = "dss_dss_clk", 1575 .main_clk = "dss_dss_clk",
@@ -1639,6 +1661,7 @@ static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
1639static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { 1661static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
1640 .name = "dss_rfbi", 1662 .name = "dss_rfbi",
1641 .class = &omap44xx_rfbi_hwmod_class, 1663 .class = &omap44xx_rfbi_hwmod_class,
1664 .clkdm_name = "l3_dss_clkdm",
1642 .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, 1665 .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs,
1643 .main_clk = "dss_dss_clk", 1666 .main_clk = "dss_dss_clk",
1644 .prcm = { 1667 .prcm = {
@@ -1709,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
1709static struct omap_hwmod omap44xx_dss_venc_hwmod = { 1732static struct omap_hwmod omap44xx_dss_venc_hwmod = {
1710 .name = "dss_venc", 1733 .name = "dss_venc",
1711 .class = &omap44xx_venc_hwmod_class, 1734 .class = &omap44xx_venc_hwmod_class,
1735 .clkdm_name = "l3_dss_clkdm",
1712 .main_clk = "dss_dss_clk", 1736 .main_clk = "dss_dss_clk",
1713 .prcm = { 1737 .prcm = {
1714 .omap4 = { 1738 .omap4 = {
@@ -1786,6 +1810,7 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
1786static struct omap_hwmod omap44xx_gpio1_hwmod = { 1810static struct omap_hwmod omap44xx_gpio1_hwmod = {
1787 .name = "gpio1", 1811 .name = "gpio1",
1788 .class = &omap44xx_gpio_hwmod_class, 1812 .class = &omap44xx_gpio_hwmod_class,
1813 .clkdm_name = "l4_wkup_clkdm",
1789 .mpu_irqs = omap44xx_gpio1_irqs, 1814 .mpu_irqs = omap44xx_gpio1_irqs,
1790 .main_clk = "gpio1_ick", 1815 .main_clk = "gpio1_ick",
1791 .prcm = { 1816 .prcm = {
@@ -1838,6 +1863,7 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
1838static struct omap_hwmod omap44xx_gpio2_hwmod = { 1863static struct omap_hwmod omap44xx_gpio2_hwmod = {
1839 .name = "gpio2", 1864 .name = "gpio2",
1840 .class = &omap44xx_gpio_hwmod_class, 1865 .class = &omap44xx_gpio_hwmod_class,
1866 .clkdm_name = "l4_per_clkdm",
1841 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1867 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1842 .mpu_irqs = omap44xx_gpio2_irqs, 1868 .mpu_irqs = omap44xx_gpio2_irqs,
1843 .main_clk = "gpio2_ick", 1869 .main_clk = "gpio2_ick",
@@ -1891,6 +1917,7 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
1891static struct omap_hwmod omap44xx_gpio3_hwmod = { 1917static struct omap_hwmod omap44xx_gpio3_hwmod = {
1892 .name = "gpio3", 1918 .name = "gpio3",
1893 .class = &omap44xx_gpio_hwmod_class, 1919 .class = &omap44xx_gpio_hwmod_class,
1920 .clkdm_name = "l4_per_clkdm",
1894 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1921 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1895 .mpu_irqs = omap44xx_gpio3_irqs, 1922 .mpu_irqs = omap44xx_gpio3_irqs,
1896 .main_clk = "gpio3_ick", 1923 .main_clk = "gpio3_ick",
@@ -1944,6 +1971,7 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
1944static struct omap_hwmod omap44xx_gpio4_hwmod = { 1971static struct omap_hwmod omap44xx_gpio4_hwmod = {
1945 .name = "gpio4", 1972 .name = "gpio4",
1946 .class = &omap44xx_gpio_hwmod_class, 1973 .class = &omap44xx_gpio_hwmod_class,
1974 .clkdm_name = "l4_per_clkdm",
1947 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1975 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1948 .mpu_irqs = omap44xx_gpio4_irqs, 1976 .mpu_irqs = omap44xx_gpio4_irqs,
1949 .main_clk = "gpio4_ick", 1977 .main_clk = "gpio4_ick",
@@ -1997,6 +2025,7 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
1997static struct omap_hwmod omap44xx_gpio5_hwmod = { 2025static struct omap_hwmod omap44xx_gpio5_hwmod = {
1998 .name = "gpio5", 2026 .name = "gpio5",
1999 .class = &omap44xx_gpio_hwmod_class, 2027 .class = &omap44xx_gpio_hwmod_class,
2028 .clkdm_name = "l4_per_clkdm",
2000 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2029 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2001 .mpu_irqs = omap44xx_gpio5_irqs, 2030 .mpu_irqs = omap44xx_gpio5_irqs,
2002 .main_clk = "gpio5_ick", 2031 .main_clk = "gpio5_ick",
@@ -2050,6 +2079,7 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
2050static struct omap_hwmod omap44xx_gpio6_hwmod = { 2079static struct omap_hwmod omap44xx_gpio6_hwmod = {
2051 .name = "gpio6", 2080 .name = "gpio6",
2052 .class = &omap44xx_gpio_hwmod_class, 2081 .class = &omap44xx_gpio_hwmod_class,
2082 .clkdm_name = "l4_per_clkdm",
2053 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2083 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2054 .mpu_irqs = omap44xx_gpio6_irqs, 2084 .mpu_irqs = omap44xx_gpio6_irqs,
2055 .main_clk = "gpio6_ick", 2085 .main_clk = "gpio6_ick",
@@ -2129,6 +2159,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = {
2129static struct omap_hwmod omap44xx_hsi_hwmod = { 2159static struct omap_hwmod omap44xx_hsi_hwmod = {
2130 .name = "hsi", 2160 .name = "hsi",
2131 .class = &omap44xx_hsi_hwmod_class, 2161 .class = &omap44xx_hsi_hwmod_class,
2162 .clkdm_name = "l3_init_clkdm",
2132 .mpu_irqs = omap44xx_hsi_irqs, 2163 .mpu_irqs = omap44xx_hsi_irqs,
2133 .main_clk = "hsi_fck", 2164 .main_clk = "hsi_fck",
2134 .prcm = { 2165 .prcm = {
@@ -2209,6 +2240,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
2209static struct omap_hwmod omap44xx_i2c1_hwmod = { 2240static struct omap_hwmod omap44xx_i2c1_hwmod = {
2210 .name = "i2c1", 2241 .name = "i2c1",
2211 .class = &omap44xx_i2c_hwmod_class, 2242 .class = &omap44xx_i2c_hwmod_class,
2243 .clkdm_name = "l4_per_clkdm",
2212 .flags = HWMOD_16BIT_REG, 2244 .flags = HWMOD_16BIT_REG,
2213 .mpu_irqs = omap44xx_i2c1_irqs, 2245 .mpu_irqs = omap44xx_i2c1_irqs,
2214 .sdma_reqs = omap44xx_i2c1_sdma_reqs, 2246 .sdma_reqs = omap44xx_i2c1_sdma_reqs,
@@ -2263,6 +2295,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
2263static struct omap_hwmod omap44xx_i2c2_hwmod = { 2295static struct omap_hwmod omap44xx_i2c2_hwmod = {
2264 .name = "i2c2", 2296 .name = "i2c2",
2265 .class = &omap44xx_i2c_hwmod_class, 2297 .class = &omap44xx_i2c_hwmod_class,
2298 .clkdm_name = "l4_per_clkdm",
2266 .flags = HWMOD_16BIT_REG, 2299 .flags = HWMOD_16BIT_REG,
2267 .mpu_irqs = omap44xx_i2c2_irqs, 2300 .mpu_irqs = omap44xx_i2c2_irqs,
2268 .sdma_reqs = omap44xx_i2c2_sdma_reqs, 2301 .sdma_reqs = omap44xx_i2c2_sdma_reqs,
@@ -2317,6 +2350,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = {
2317static struct omap_hwmod omap44xx_i2c3_hwmod = { 2350static struct omap_hwmod omap44xx_i2c3_hwmod = {
2318 .name = "i2c3", 2351 .name = "i2c3",
2319 .class = &omap44xx_i2c_hwmod_class, 2352 .class = &omap44xx_i2c_hwmod_class,
2353 .clkdm_name = "l4_per_clkdm",
2320 .flags = HWMOD_16BIT_REG, 2354 .flags = HWMOD_16BIT_REG,
2321 .mpu_irqs = omap44xx_i2c3_irqs, 2355 .mpu_irqs = omap44xx_i2c3_irqs,
2322 .sdma_reqs = omap44xx_i2c3_sdma_reqs, 2356 .sdma_reqs = omap44xx_i2c3_sdma_reqs,
@@ -2371,6 +2405,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = {
2371static struct omap_hwmod omap44xx_i2c4_hwmod = { 2405static struct omap_hwmod omap44xx_i2c4_hwmod = {
2372 .name = "i2c4", 2406 .name = "i2c4",
2373 .class = &omap44xx_i2c_hwmod_class, 2407 .class = &omap44xx_i2c_hwmod_class,
2408 .clkdm_name = "l4_per_clkdm",
2374 .flags = HWMOD_16BIT_REG, 2409 .flags = HWMOD_16BIT_REG,
2375 .mpu_irqs = omap44xx_i2c4_irqs, 2410 .mpu_irqs = omap44xx_i2c4_irqs,
2376 .sdma_reqs = omap44xx_i2c4_sdma_reqs, 2411 .sdma_reqs = omap44xx_i2c4_sdma_reqs,
@@ -2435,6 +2470,7 @@ static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = {
2435static struct omap_hwmod omap44xx_ipu_c0_hwmod = { 2470static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
2436 .name = "ipu_c0", 2471 .name = "ipu_c0",
2437 .class = &omap44xx_ipu_hwmod_class, 2472 .class = &omap44xx_ipu_hwmod_class,
2473 .clkdm_name = "ducati_clkdm",
2438 .flags = HWMOD_INIT_NO_RESET, 2474 .flags = HWMOD_INIT_NO_RESET,
2439 .rst_lines = omap44xx_ipu_c0_resets, 2475 .rst_lines = omap44xx_ipu_c0_resets,
2440 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), 2476 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets),
@@ -2450,6 +2486,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
2450static struct omap_hwmod omap44xx_ipu_c1_hwmod = { 2486static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
2451 .name = "ipu_c1", 2487 .name = "ipu_c1",
2452 .class = &omap44xx_ipu_hwmod_class, 2488 .class = &omap44xx_ipu_hwmod_class,
2489 .clkdm_name = "ducati_clkdm",
2453 .flags = HWMOD_INIT_NO_RESET, 2490 .flags = HWMOD_INIT_NO_RESET,
2454 .rst_lines = omap44xx_ipu_c1_resets, 2491 .rst_lines = omap44xx_ipu_c1_resets,
2455 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), 2492 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets),
@@ -2464,6 +2501,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
2464static struct omap_hwmod omap44xx_ipu_hwmod = { 2501static struct omap_hwmod omap44xx_ipu_hwmod = {
2465 .name = "ipu", 2502 .name = "ipu",
2466 .class = &omap44xx_ipu_hwmod_class, 2503 .class = &omap44xx_ipu_hwmod_class,
2504 .clkdm_name = "ducati_clkdm",
2467 .mpu_irqs = omap44xx_ipu_irqs, 2505 .mpu_irqs = omap44xx_ipu_irqs,
2468 .rst_lines = omap44xx_ipu_resets, 2506 .rst_lines = omap44xx_ipu_resets,
2469 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), 2507 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
@@ -2551,6 +2589,7 @@ static struct omap_hwmod_opt_clk iss_opt_clks[] = {
2551static struct omap_hwmod omap44xx_iss_hwmod = { 2589static struct omap_hwmod omap44xx_iss_hwmod = {
2552 .name = "iss", 2590 .name = "iss",
2553 .class = &omap44xx_iss_hwmod_class, 2591 .class = &omap44xx_iss_hwmod_class,
2592 .clkdm_name = "iss_clkdm",
2554 .mpu_irqs = omap44xx_iss_irqs, 2593 .mpu_irqs = omap44xx_iss_irqs,
2555 .sdma_reqs = omap44xx_iss_sdma_reqs, 2594 .sdma_reqs = omap44xx_iss_sdma_reqs,
2556 .main_clk = "iss_fck", 2595 .main_clk = "iss_fck",
@@ -2631,6 +2670,7 @@ static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = {
2631static struct omap_hwmod omap44xx_iva_seq0_hwmod = { 2670static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
2632 .name = "iva_seq0", 2671 .name = "iva_seq0",
2633 .class = &omap44xx_iva_hwmod_class, 2672 .class = &omap44xx_iva_hwmod_class,
2673 .clkdm_name = "ivahd_clkdm",
2634 .flags = HWMOD_INIT_NO_RESET, 2674 .flags = HWMOD_INIT_NO_RESET,
2635 .rst_lines = omap44xx_iva_seq0_resets, 2675 .rst_lines = omap44xx_iva_seq0_resets,
2636 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), 2676 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets),
@@ -2646,6 +2686,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
2646static struct omap_hwmod omap44xx_iva_seq1_hwmod = { 2686static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
2647 .name = "iva_seq1", 2687 .name = "iva_seq1",
2648 .class = &omap44xx_iva_hwmod_class, 2688 .class = &omap44xx_iva_hwmod_class,
2689 .clkdm_name = "ivahd_clkdm",
2649 .flags = HWMOD_INIT_NO_RESET, 2690 .flags = HWMOD_INIT_NO_RESET,
2650 .rst_lines = omap44xx_iva_seq1_resets, 2691 .rst_lines = omap44xx_iva_seq1_resets,
2651 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), 2692 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets),
@@ -2660,6 +2701,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
2660static struct omap_hwmod omap44xx_iva_hwmod = { 2701static struct omap_hwmod omap44xx_iva_hwmod = {
2661 .name = "iva", 2702 .name = "iva",
2662 .class = &omap44xx_iva_hwmod_class, 2703 .class = &omap44xx_iva_hwmod_class,
2704 .clkdm_name = "ivahd_clkdm",
2663 .mpu_irqs = omap44xx_iva_irqs, 2705 .mpu_irqs = omap44xx_iva_irqs,
2664 .rst_lines = omap44xx_iva_resets, 2706 .rst_lines = omap44xx_iva_resets,
2665 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), 2707 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets),
@@ -2732,6 +2774,7 @@ static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = {
2732static struct omap_hwmod omap44xx_kbd_hwmod = { 2774static struct omap_hwmod omap44xx_kbd_hwmod = {
2733 .name = "kbd", 2775 .name = "kbd",
2734 .class = &omap44xx_kbd_hwmod_class, 2776 .class = &omap44xx_kbd_hwmod_class,
2777 .clkdm_name = "l4_wkup_clkdm",
2735 .mpu_irqs = omap44xx_kbd_irqs, 2778 .mpu_irqs = omap44xx_kbd_irqs,
2736 .main_clk = "kbd_fck", 2779 .main_clk = "kbd_fck",
2737 .prcm = { 2780 .prcm = {
@@ -2797,6 +2840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = {
2797static struct omap_hwmod omap44xx_mailbox_hwmod = { 2840static struct omap_hwmod omap44xx_mailbox_hwmod = {
2798 .name = "mailbox", 2841 .name = "mailbox",
2799 .class = &omap44xx_mailbox_hwmod_class, 2842 .class = &omap44xx_mailbox_hwmod_class,
2843 .clkdm_name = "l4_cfg_clkdm",
2800 .mpu_irqs = omap44xx_mailbox_irqs, 2844 .mpu_irqs = omap44xx_mailbox_irqs,
2801 .prcm = { 2845 .prcm = {
2802 .omap4 = { 2846 .omap4 = {
@@ -2887,6 +2931,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
2887static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 2931static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2888 .name = "mcbsp1", 2932 .name = "mcbsp1",
2889 .class = &omap44xx_mcbsp_hwmod_class, 2933 .class = &omap44xx_mcbsp_hwmod_class,
2934 .clkdm_name = "abe_clkdm",
2890 .mpu_irqs = omap44xx_mcbsp1_irqs, 2935 .mpu_irqs = omap44xx_mcbsp1_irqs,
2891 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, 2936 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
2892 .main_clk = "mcbsp1_fck", 2937 .main_clk = "mcbsp1_fck",
@@ -2960,6 +3005,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
2960static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 3005static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2961 .name = "mcbsp2", 3006 .name = "mcbsp2",
2962 .class = &omap44xx_mcbsp_hwmod_class, 3007 .class = &omap44xx_mcbsp_hwmod_class,
3008 .clkdm_name = "abe_clkdm",
2963 .mpu_irqs = omap44xx_mcbsp2_irqs, 3009 .mpu_irqs = omap44xx_mcbsp2_irqs,
2964 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, 3010 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
2965 .main_clk = "mcbsp2_fck", 3011 .main_clk = "mcbsp2_fck",
@@ -3033,6 +3079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
3033static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 3079static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3034 .name = "mcbsp3", 3080 .name = "mcbsp3",
3035 .class = &omap44xx_mcbsp_hwmod_class, 3081 .class = &omap44xx_mcbsp_hwmod_class,
3082 .clkdm_name = "abe_clkdm",
3036 .mpu_irqs = omap44xx_mcbsp3_irqs, 3083 .mpu_irqs = omap44xx_mcbsp3_irqs,
3037 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, 3084 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
3038 .main_clk = "mcbsp3_fck", 3085 .main_clk = "mcbsp3_fck",
@@ -3085,6 +3132,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
3085static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 3132static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3086 .name = "mcbsp4", 3133 .name = "mcbsp4",
3087 .class = &omap44xx_mcbsp_hwmod_class, 3134 .class = &omap44xx_mcbsp_hwmod_class,
3135 .clkdm_name = "l4_per_clkdm",
3088 .mpu_irqs = omap44xx_mcbsp4_irqs, 3136 .mpu_irqs = omap44xx_mcbsp4_irqs,
3089 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, 3137 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
3090 .main_clk = "mcbsp4_fck", 3138 .main_clk = "mcbsp4_fck",
@@ -3177,6 +3225,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = {
3177static struct omap_hwmod omap44xx_mcpdm_hwmod = { 3225static struct omap_hwmod omap44xx_mcpdm_hwmod = {
3178 .name = "mcpdm", 3226 .name = "mcpdm",
3179 .class = &omap44xx_mcpdm_hwmod_class, 3227 .class = &omap44xx_mcpdm_hwmod_class,
3228 .clkdm_name = "abe_clkdm",
3180 .mpu_irqs = omap44xx_mcpdm_irqs, 3229 .mpu_irqs = omap44xx_mcpdm_irqs,
3181 .sdma_reqs = omap44xx_mcpdm_sdma_reqs, 3230 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
3182 .main_clk = "mcpdm_fck", 3231 .main_clk = "mcpdm_fck",
@@ -3262,6 +3311,7 @@ static struct omap2_mcspi_dev_attr mcspi1_dev_attr = {
3262static struct omap_hwmod omap44xx_mcspi1_hwmod = { 3311static struct omap_hwmod omap44xx_mcspi1_hwmod = {
3263 .name = "mcspi1", 3312 .name = "mcspi1",
3264 .class = &omap44xx_mcspi_hwmod_class, 3313 .class = &omap44xx_mcspi_hwmod_class,
3314 .clkdm_name = "l4_per_clkdm",
3265 .mpu_irqs = omap44xx_mcspi1_irqs, 3315 .mpu_irqs = omap44xx_mcspi1_irqs,
3266 .sdma_reqs = omap44xx_mcspi1_sdma_reqs, 3316 .sdma_reqs = omap44xx_mcspi1_sdma_reqs,
3267 .main_clk = "mcspi1_fck", 3317 .main_clk = "mcspi1_fck",
@@ -3322,6 +3372,7 @@ static struct omap2_mcspi_dev_attr mcspi2_dev_attr = {
3322static struct omap_hwmod omap44xx_mcspi2_hwmod = { 3372static struct omap_hwmod omap44xx_mcspi2_hwmod = {
3323 .name = "mcspi2", 3373 .name = "mcspi2",
3324 .class = &omap44xx_mcspi_hwmod_class, 3374 .class = &omap44xx_mcspi_hwmod_class,
3375 .clkdm_name = "l4_per_clkdm",
3325 .mpu_irqs = omap44xx_mcspi2_irqs, 3376 .mpu_irqs = omap44xx_mcspi2_irqs,
3326 .sdma_reqs = omap44xx_mcspi2_sdma_reqs, 3377 .sdma_reqs = omap44xx_mcspi2_sdma_reqs,
3327 .main_clk = "mcspi2_fck", 3378 .main_clk = "mcspi2_fck",
@@ -3382,6 +3433,7 @@ static struct omap2_mcspi_dev_attr mcspi3_dev_attr = {
3382static struct omap_hwmod omap44xx_mcspi3_hwmod = { 3433static struct omap_hwmod omap44xx_mcspi3_hwmod = {
3383 .name = "mcspi3", 3434 .name = "mcspi3",
3384 .class = &omap44xx_mcspi_hwmod_class, 3435 .class = &omap44xx_mcspi_hwmod_class,
3436 .clkdm_name = "l4_per_clkdm",
3385 .mpu_irqs = omap44xx_mcspi3_irqs, 3437 .mpu_irqs = omap44xx_mcspi3_irqs,
3386 .sdma_reqs = omap44xx_mcspi3_sdma_reqs, 3438 .sdma_reqs = omap44xx_mcspi3_sdma_reqs,
3387 .main_clk = "mcspi3_fck", 3439 .main_clk = "mcspi3_fck",
@@ -3440,6 +3492,7 @@ static struct omap2_mcspi_dev_attr mcspi4_dev_attr = {
3440static struct omap_hwmod omap44xx_mcspi4_hwmod = { 3492static struct omap_hwmod omap44xx_mcspi4_hwmod = {
3441 .name = "mcspi4", 3493 .name = "mcspi4",
3442 .class = &omap44xx_mcspi_hwmod_class, 3494 .class = &omap44xx_mcspi_hwmod_class,
3495 .clkdm_name = "l4_per_clkdm",
3443 .mpu_irqs = omap44xx_mcspi4_irqs, 3496 .mpu_irqs = omap44xx_mcspi4_irqs,
3444 .sdma_reqs = omap44xx_mcspi4_sdma_reqs, 3497 .sdma_reqs = omap44xx_mcspi4_sdma_reqs,
3445 .main_clk = "mcspi4_fck", 3498 .main_clk = "mcspi4_fck",
@@ -3524,6 +3577,7 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
3524static struct omap_hwmod omap44xx_mmc1_hwmod = { 3577static struct omap_hwmod omap44xx_mmc1_hwmod = {
3525 .name = "mmc1", 3578 .name = "mmc1",
3526 .class = &omap44xx_mmc_hwmod_class, 3579 .class = &omap44xx_mmc_hwmod_class,
3580 .clkdm_name = "l3_init_clkdm",
3527 .mpu_irqs = omap44xx_mmc1_irqs, 3581 .mpu_irqs = omap44xx_mmc1_irqs,
3528 .sdma_reqs = omap44xx_mmc1_sdma_reqs, 3582 .sdma_reqs = omap44xx_mmc1_sdma_reqs,
3529 .main_clk = "mmc1_fck", 3583 .main_clk = "mmc1_fck",
@@ -3583,6 +3637,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = {
3583static struct omap_hwmod omap44xx_mmc2_hwmod = { 3637static struct omap_hwmod omap44xx_mmc2_hwmod = {
3584 .name = "mmc2", 3638 .name = "mmc2",
3585 .class = &omap44xx_mmc_hwmod_class, 3639 .class = &omap44xx_mmc_hwmod_class,
3640 .clkdm_name = "l3_init_clkdm",
3586 .mpu_irqs = omap44xx_mmc2_irqs, 3641 .mpu_irqs = omap44xx_mmc2_irqs,
3587 .sdma_reqs = omap44xx_mmc2_sdma_reqs, 3642 .sdma_reqs = omap44xx_mmc2_sdma_reqs,
3588 .main_clk = "mmc2_fck", 3643 .main_clk = "mmc2_fck",
@@ -3637,6 +3692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = {
3637static struct omap_hwmod omap44xx_mmc3_hwmod = { 3692static struct omap_hwmod omap44xx_mmc3_hwmod = {
3638 .name = "mmc3", 3693 .name = "mmc3",
3639 .class = &omap44xx_mmc_hwmod_class, 3694 .class = &omap44xx_mmc_hwmod_class,
3695 .clkdm_name = "l4_per_clkdm",
3640 .mpu_irqs = omap44xx_mmc3_irqs, 3696 .mpu_irqs = omap44xx_mmc3_irqs,
3641 .sdma_reqs = omap44xx_mmc3_sdma_reqs, 3697 .sdma_reqs = omap44xx_mmc3_sdma_reqs,
3642 .main_clk = "mmc3_fck", 3698 .main_clk = "mmc3_fck",
@@ -3689,6 +3745,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = {
3689static struct omap_hwmod omap44xx_mmc4_hwmod = { 3745static struct omap_hwmod omap44xx_mmc4_hwmod = {
3690 .name = "mmc4", 3746 .name = "mmc4",
3691 .class = &omap44xx_mmc_hwmod_class, 3747 .class = &omap44xx_mmc_hwmod_class,
3748 .clkdm_name = "l4_per_clkdm",
3692 .mpu_irqs = omap44xx_mmc4_irqs, 3749 .mpu_irqs = omap44xx_mmc4_irqs,
3693 3750
3694 .sdma_reqs = omap44xx_mmc4_sdma_reqs, 3751 .sdma_reqs = omap44xx_mmc4_sdma_reqs,
@@ -3742,6 +3799,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = {
3742static struct omap_hwmod omap44xx_mmc5_hwmod = { 3799static struct omap_hwmod omap44xx_mmc5_hwmod = {
3743 .name = "mmc5", 3800 .name = "mmc5",
3744 .class = &omap44xx_mmc_hwmod_class, 3801 .class = &omap44xx_mmc_hwmod_class,
3802 .clkdm_name = "l4_per_clkdm",
3745 .mpu_irqs = omap44xx_mmc5_irqs, 3803 .mpu_irqs = omap44xx_mmc5_irqs,
3746 .sdma_reqs = omap44xx_mmc5_sdma_reqs, 3804 .sdma_reqs = omap44xx_mmc5_sdma_reqs,
3747 .main_clk = "mmc5_fck", 3805 .main_clk = "mmc5_fck",
@@ -3782,6 +3840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = {
3782static struct omap_hwmod omap44xx_mpu_hwmod = { 3840static struct omap_hwmod omap44xx_mpu_hwmod = {
3783 .name = "mpu", 3841 .name = "mpu",
3784 .class = &omap44xx_mpu_hwmod_class, 3842 .class = &omap44xx_mpu_hwmod_class,
3843 .clkdm_name = "mpuss_clkdm",
3785 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, 3844 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
3786 .mpu_irqs = omap44xx_mpu_irqs, 3845 .mpu_irqs = omap44xx_mpu_irqs,
3787 .main_clk = "dpll_mpu_m2_ck", 3846 .main_clk = "dpll_mpu_m2_ck",
@@ -3854,6 +3913,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {
3854static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { 3913static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
3855 .name = "smartreflex_core", 3914 .name = "smartreflex_core",
3856 .class = &omap44xx_smartreflex_hwmod_class, 3915 .class = &omap44xx_smartreflex_hwmod_class,
3916 .clkdm_name = "l4_ao_clkdm",
3857 .mpu_irqs = omap44xx_smartreflex_core_irqs, 3917 .mpu_irqs = omap44xx_smartreflex_core_irqs,
3858 3918
3859 .main_clk = "smartreflex_core_fck", 3919 .main_clk = "smartreflex_core_fck",
@@ -3901,6 +3961,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {
3901static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { 3961static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
3902 .name = "smartreflex_iva", 3962 .name = "smartreflex_iva",
3903 .class = &omap44xx_smartreflex_hwmod_class, 3963 .class = &omap44xx_smartreflex_hwmod_class,
3964 .clkdm_name = "l4_ao_clkdm",
3904 .mpu_irqs = omap44xx_smartreflex_iva_irqs, 3965 .mpu_irqs = omap44xx_smartreflex_iva_irqs,
3905 .main_clk = "smartreflex_iva_fck", 3966 .main_clk = "smartreflex_iva_fck",
3906 .vdd_name = "iva", 3967 .vdd_name = "iva",
@@ -3947,6 +4008,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = {
3947static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { 4008static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
3948 .name = "smartreflex_mpu", 4009 .name = "smartreflex_mpu",
3949 .class = &omap44xx_smartreflex_hwmod_class, 4010 .class = &omap44xx_smartreflex_hwmod_class,
4011 .clkdm_name = "l4_ao_clkdm",
3950 .mpu_irqs = omap44xx_smartreflex_mpu_irqs, 4012 .mpu_irqs = omap44xx_smartreflex_mpu_irqs,
3951 .main_clk = "smartreflex_mpu_fck", 4013 .main_clk = "smartreflex_mpu_fck",
3952 .vdd_name = "mpu", 4014 .vdd_name = "mpu",
@@ -4011,6 +4073,7 @@ static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = {
4011static struct omap_hwmod omap44xx_spinlock_hwmod = { 4073static struct omap_hwmod omap44xx_spinlock_hwmod = {
4012 .name = "spinlock", 4074 .name = "spinlock",
4013 .class = &omap44xx_spinlock_hwmod_class, 4075 .class = &omap44xx_spinlock_hwmod_class,
4076 .clkdm_name = "l4_cfg_clkdm",
4014 .prcm = { 4077 .prcm = {
4015 .omap4 = { 4078 .omap4 = {
4016 .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, 4079 .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL,
@@ -4092,6 +4155,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = {
4092static struct omap_hwmod omap44xx_timer1_hwmod = { 4155static struct omap_hwmod omap44xx_timer1_hwmod = {
4093 .name = "timer1", 4156 .name = "timer1",
4094 .class = &omap44xx_timer_1ms_hwmod_class, 4157 .class = &omap44xx_timer_1ms_hwmod_class,
4158 .clkdm_name = "l4_wkup_clkdm",
4095 .mpu_irqs = omap44xx_timer1_irqs, 4159 .mpu_irqs = omap44xx_timer1_irqs,
4096 .main_clk = "timer1_fck", 4160 .main_clk = "timer1_fck",
4097 .prcm = { 4161 .prcm = {
@@ -4137,6 +4201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = {
4137static struct omap_hwmod omap44xx_timer2_hwmod = { 4201static struct omap_hwmod omap44xx_timer2_hwmod = {
4138 .name = "timer2", 4202 .name = "timer2",
4139 .class = &omap44xx_timer_1ms_hwmod_class, 4203 .class = &omap44xx_timer_1ms_hwmod_class,
4204 .clkdm_name = "l4_per_clkdm",
4140 .mpu_irqs = omap44xx_timer2_irqs, 4205 .mpu_irqs = omap44xx_timer2_irqs,
4141 .main_clk = "timer2_fck", 4206 .main_clk = "timer2_fck",
4142 .prcm = { 4207 .prcm = {
@@ -4182,6 +4247,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = {
4182static struct omap_hwmod omap44xx_timer3_hwmod = { 4247static struct omap_hwmod omap44xx_timer3_hwmod = {
4183 .name = "timer3", 4248 .name = "timer3",
4184 .class = &omap44xx_timer_hwmod_class, 4249 .class = &omap44xx_timer_hwmod_class,
4250 .clkdm_name = "l4_per_clkdm",
4185 .mpu_irqs = omap44xx_timer3_irqs, 4251 .mpu_irqs = omap44xx_timer3_irqs,
4186 .main_clk = "timer3_fck", 4252 .main_clk = "timer3_fck",
4187 .prcm = { 4253 .prcm = {
@@ -4227,6 +4293,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = {
4227static struct omap_hwmod omap44xx_timer4_hwmod = { 4293static struct omap_hwmod omap44xx_timer4_hwmod = {
4228 .name = "timer4", 4294 .name = "timer4",
4229 .class = &omap44xx_timer_hwmod_class, 4295 .class = &omap44xx_timer_hwmod_class,
4296 .clkdm_name = "l4_per_clkdm",
4230 .mpu_irqs = omap44xx_timer4_irqs, 4297 .mpu_irqs = omap44xx_timer4_irqs,
4231 .main_clk = "timer4_fck", 4298 .main_clk = "timer4_fck",
4232 .prcm = { 4299 .prcm = {
@@ -4291,6 +4358,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = {
4291static struct omap_hwmod omap44xx_timer5_hwmod = { 4358static struct omap_hwmod omap44xx_timer5_hwmod = {
4292 .name = "timer5", 4359 .name = "timer5",
4293 .class = &omap44xx_timer_hwmod_class, 4360 .class = &omap44xx_timer_hwmod_class,
4361 .clkdm_name = "abe_clkdm",
4294 .mpu_irqs = omap44xx_timer5_irqs, 4362 .mpu_irqs = omap44xx_timer5_irqs,
4295 .main_clk = "timer5_fck", 4363 .main_clk = "timer5_fck",
4296 .prcm = { 4364 .prcm = {
@@ -4355,6 +4423,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = {
4355static struct omap_hwmod omap44xx_timer6_hwmod = { 4423static struct omap_hwmod omap44xx_timer6_hwmod = {
4356 .name = "timer6", 4424 .name = "timer6",
4357 .class = &omap44xx_timer_hwmod_class, 4425 .class = &omap44xx_timer_hwmod_class,
4426 .clkdm_name = "abe_clkdm",
4358 .mpu_irqs = omap44xx_timer6_irqs, 4427 .mpu_irqs = omap44xx_timer6_irqs,
4359 4428
4360 .main_clk = "timer6_fck", 4429 .main_clk = "timer6_fck",
@@ -4420,6 +4489,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = {
4420static struct omap_hwmod omap44xx_timer7_hwmod = { 4489static struct omap_hwmod omap44xx_timer7_hwmod = {
4421 .name = "timer7", 4490 .name = "timer7",
4422 .class = &omap44xx_timer_hwmod_class, 4491 .class = &omap44xx_timer_hwmod_class,
4492 .clkdm_name = "abe_clkdm",
4423 .mpu_irqs = omap44xx_timer7_irqs, 4493 .mpu_irqs = omap44xx_timer7_irqs,
4424 .main_clk = "timer7_fck", 4494 .main_clk = "timer7_fck",
4425 .prcm = { 4495 .prcm = {
@@ -4484,6 +4554,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = {
4484static struct omap_hwmod omap44xx_timer8_hwmod = { 4554static struct omap_hwmod omap44xx_timer8_hwmod = {
4485 .name = "timer8", 4555 .name = "timer8",
4486 .class = &omap44xx_timer_hwmod_class, 4556 .class = &omap44xx_timer_hwmod_class,
4557 .clkdm_name = "abe_clkdm",
4487 .mpu_irqs = omap44xx_timer8_irqs, 4558 .mpu_irqs = omap44xx_timer8_irqs,
4488 .main_clk = "timer8_fck", 4559 .main_clk = "timer8_fck",
4489 .prcm = { 4560 .prcm = {
@@ -4529,6 +4600,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = {
4529static struct omap_hwmod omap44xx_timer9_hwmod = { 4600static struct omap_hwmod omap44xx_timer9_hwmod = {
4530 .name = "timer9", 4601 .name = "timer9",
4531 .class = &omap44xx_timer_hwmod_class, 4602 .class = &omap44xx_timer_hwmod_class,
4603 .clkdm_name = "l4_per_clkdm",
4532 .mpu_irqs = omap44xx_timer9_irqs, 4604 .mpu_irqs = omap44xx_timer9_irqs,
4533 .main_clk = "timer9_fck", 4605 .main_clk = "timer9_fck",
4534 .prcm = { 4606 .prcm = {
@@ -4574,6 +4646,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = {
4574static struct omap_hwmod omap44xx_timer10_hwmod = { 4646static struct omap_hwmod omap44xx_timer10_hwmod = {
4575 .name = "timer10", 4647 .name = "timer10",
4576 .class = &omap44xx_timer_1ms_hwmod_class, 4648 .class = &omap44xx_timer_1ms_hwmod_class,
4649 .clkdm_name = "l4_per_clkdm",
4577 .mpu_irqs = omap44xx_timer10_irqs, 4650 .mpu_irqs = omap44xx_timer10_irqs,
4578 .main_clk = "timer10_fck", 4651 .main_clk = "timer10_fck",
4579 .prcm = { 4652 .prcm = {
@@ -4619,6 +4692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = {
4619static struct omap_hwmod omap44xx_timer11_hwmod = { 4692static struct omap_hwmod omap44xx_timer11_hwmod = {
4620 .name = "timer11", 4693 .name = "timer11",
4621 .class = &omap44xx_timer_hwmod_class, 4694 .class = &omap44xx_timer_hwmod_class,
4695 .clkdm_name = "l4_per_clkdm",
4622 .mpu_irqs = omap44xx_timer11_irqs, 4696 .mpu_irqs = omap44xx_timer11_irqs,
4623 .main_clk = "timer11_fck", 4697 .main_clk = "timer11_fck",
4624 .prcm = { 4698 .prcm = {
@@ -4692,6 +4766,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = {
4692static struct omap_hwmod omap44xx_uart1_hwmod = { 4766static struct omap_hwmod omap44xx_uart1_hwmod = {
4693 .name = "uart1", 4767 .name = "uart1",
4694 .class = &omap44xx_uart_hwmod_class, 4768 .class = &omap44xx_uart_hwmod_class,
4769 .clkdm_name = "l4_per_clkdm",
4695 .mpu_irqs = omap44xx_uart1_irqs, 4770 .mpu_irqs = omap44xx_uart1_irqs,
4696 .sdma_reqs = omap44xx_uart1_sdma_reqs, 4771 .sdma_reqs = omap44xx_uart1_sdma_reqs,
4697 .main_clk = "uart1_fck", 4772 .main_clk = "uart1_fck",
@@ -4744,6 +4819,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = {
4744static struct omap_hwmod omap44xx_uart2_hwmod = { 4819static struct omap_hwmod omap44xx_uart2_hwmod = {
4745 .name = "uart2", 4820 .name = "uart2",
4746 .class = &omap44xx_uart_hwmod_class, 4821 .class = &omap44xx_uart_hwmod_class,
4822 .clkdm_name = "l4_per_clkdm",
4747 .mpu_irqs = omap44xx_uart2_irqs, 4823 .mpu_irqs = omap44xx_uart2_irqs,
4748 .sdma_reqs = omap44xx_uart2_sdma_reqs, 4824 .sdma_reqs = omap44xx_uart2_sdma_reqs,
4749 .main_clk = "uart2_fck", 4825 .main_clk = "uart2_fck",
@@ -4796,6 +4872,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = {
4796static struct omap_hwmod omap44xx_uart3_hwmod = { 4872static struct omap_hwmod omap44xx_uart3_hwmod = {
4797 .name = "uart3", 4873 .name = "uart3",
4798 .class = &omap44xx_uart_hwmod_class, 4874 .class = &omap44xx_uart_hwmod_class,
4875 .clkdm_name = "l4_per_clkdm",
4799 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, 4876 .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
4800 .mpu_irqs = omap44xx_uart3_irqs, 4877 .mpu_irqs = omap44xx_uart3_irqs,
4801 .sdma_reqs = omap44xx_uart3_sdma_reqs, 4878 .sdma_reqs = omap44xx_uart3_sdma_reqs,
@@ -4849,6 +4926,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = {
4849static struct omap_hwmod omap44xx_uart4_hwmod = { 4926static struct omap_hwmod omap44xx_uart4_hwmod = {
4850 .name = "uart4", 4927 .name = "uart4",
4851 .class = &omap44xx_uart_hwmod_class, 4928 .class = &omap44xx_uart_hwmod_class,
4929 .clkdm_name = "l4_per_clkdm",
4852 .mpu_irqs = omap44xx_uart4_irqs, 4930 .mpu_irqs = omap44xx_uart4_irqs,
4853 .sdma_reqs = omap44xx_uart4_sdma_reqs, 4931 .sdma_reqs = omap44xx_uart4_sdma_reqs,
4854 .main_clk = "uart4_fck", 4932 .main_clk = "uart4_fck",
@@ -4927,6 +5005,7 @@ static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = {
4927static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { 5005static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
4928 .name = "usb_otg_hs", 5006 .name = "usb_otg_hs",
4929 .class = &omap44xx_usb_otg_hs_hwmod_class, 5007 .class = &omap44xx_usb_otg_hs_hwmod_class,
5008 .clkdm_name = "l3_init_clkdm",
4930 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 5009 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
4931 .mpu_irqs = omap44xx_usb_otg_hs_irqs, 5010 .mpu_irqs = omap44xx_usb_otg_hs_irqs,
4932 .main_clk = "usb_otg_hs_ick", 5011 .main_clk = "usb_otg_hs_ick",
@@ -5000,6 +5079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
5000static struct omap_hwmod omap44xx_wd_timer2_hwmod = { 5079static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
5001 .name = "wd_timer2", 5080 .name = "wd_timer2",
5002 .class = &omap44xx_wd_timer_hwmod_class, 5081 .class = &omap44xx_wd_timer_hwmod_class,
5082 .clkdm_name = "l4_wkup_clkdm",
5003 .mpu_irqs = omap44xx_wd_timer2_irqs, 5083 .mpu_irqs = omap44xx_wd_timer2_irqs,
5004 .main_clk = "wd_timer2_fck", 5084 .main_clk = "wd_timer2_fck",
5005 .prcm = { 5085 .prcm = {
@@ -5064,6 +5144,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
5064static struct omap_hwmod omap44xx_wd_timer3_hwmod = { 5144static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5065 .name = "wd_timer3", 5145 .name = "wd_timer3",
5066 .class = &omap44xx_wd_timer_hwmod_class, 5146 .class = &omap44xx_wd_timer_hwmod_class,
5147 .clkdm_name = "abe_clkdm",
5067 .mpu_irqs = omap44xx_wd_timer3_irqs, 5148 .mpu_irqs = omap44xx_wd_timer3_irqs,
5068 .main_clk = "wd_timer3_fck", 5149 .main_clk = "wd_timer3_fck",
5069 .prcm = { 5150 .prcm = {