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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2011-03-03 07:33:25 -0500
committerKevin Hilman <khilman@ti.com>2011-12-08 14:28:59 -0500
commit02afe8a7f23d562cec76743ae34c4735d2819345 (patch)
tree68ffe470f552464de0e3fb55d6adb7069e4261d1 /arch/arm/mach-omap2
parent0db1803e4ee459fd261915a2f1b2c39bb34767eb (diff)
ARM: OMAP4: Export omap4_get_base*() rather than global address pointers
This patch exports APIs to get base address for GIC distributor, CPU interface, SCU and PL310 L2 Cache which are used in OMAP4 PM code. This was suggested by Kevin Hilman <khilman@ti.com> during OMAP4 PM code review. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/common.h11
-rw-r--r--arch/arm/mach-omap2/omap-smp.c5
-rw-r--r--arch/arm/mach-omap2/omap4-common.c7
3 files changed, 21 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 012bac7d56a..ca04152a919 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -168,7 +168,16 @@ void omap3_intc_handle_irq(struct pt_regs *regs);
168#endif 168#endif
169 169
170#ifdef CONFIG_CACHE_L2X0 170#ifdef CONFIG_CACHE_L2X0
171extern void __iomem *l2cache_base; 171extern void __iomem *omap4_get_l2cache_base(void);
172#endif
173
174#ifdef CONFIG_SMP
175extern void __iomem *omap4_get_scu_base(void);
176#else
177static inline void __iomem *omap4_get_scu_base(void)
178{
179 return NULL;
180}
172#endif 181#endif
173 182
174extern void __init gic_init_irq(void); 183extern void __init gic_init_irq(void);
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index e99bc6cd471..74e90b40a0c 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -32,6 +32,11 @@ static void __iomem *scu_base;
32 32
33static DEFINE_SPINLOCK(boot_lock); 33static DEFINE_SPINLOCK(boot_lock);
34 34
35void __iomem *omap4_get_scu_base(void)
36{
37 return scu_base;
38}
39
35void __cpuinit platform_secondary_init(unsigned int cpu) 40void __cpuinit platform_secondary_init(unsigned int cpu)
36{ 41{
37 /* 42 /*
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 21d4821c961..4a3d2898543 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -26,7 +26,7 @@
26#include "common.h" 26#include "common.h"
27 27
28#ifdef CONFIG_CACHE_L2X0 28#ifdef CONFIG_CACHE_L2X0
29void __iomem *l2cache_base; 29static void __iomem *l2cache_base;
30#endif 30#endif
31 31
32void __init gic_init_irq(void) 32void __init gic_init_irq(void)
@@ -47,6 +47,11 @@ void __init gic_init_irq(void)
47 47
48#ifdef CONFIG_CACHE_L2X0 48#ifdef CONFIG_CACHE_L2X0
49 49
50void __iomem *omap4_get_l2cache_base(void)
51{
52 return l2cache_base;
53}
54
50static void omap4_l2x0_disable(void) 55static void omap4_l2x0_disable(void)
51{ 56{
52 /* Disable PL310 L2 Cache controller */ 57 /* Disable PL310 L2 Cache controller */