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authorKevin Hilman <khilman@ti.com>2011-05-26 17:07:41 -0400
committerKevin Hilman <khilman@ti.com>2011-06-20 17:12:32 -0400
commit20d5d5514981f9a68832bffb27a698545ecba77a (patch)
treec4284a81c7d24e866a3b9175c6fb5e701bc140e2 /arch/arm/mach-omap2/pm-debug.c
parent3a7b7bdd24286a9cfce9dda5d2b7324dfc2e3b31 (diff)
OMAP2: PM debug: remove register dumping
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm-debug.c')
-rw-r--r--arch/arm/mach-omap2/pm-debug.c119
1 files changed, 0 insertions, 119 deletions
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index d9f08210be3..a8425d653eb 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -38,129 +38,10 @@
38#include "prm2xxx_3xxx.h" 38#include "prm2xxx_3xxx.h"
39#include "pm.h" 39#include "pm.h"
40 40
41int omap2_pm_debug;
42u32 enable_off_mode; 41u32 enable_off_mode;
43u32 wakeup_timer_seconds; 42u32 wakeup_timer_seconds;
44u32 wakeup_timer_milliseconds; 43u32 wakeup_timer_milliseconds;
45 44
46#define DUMP_PRM_MOD_REG(mod, reg) \
47 regs[reg_count].name = #mod "." #reg; \
48 regs[reg_count++].val = omap2_prm_read_mod_reg(mod, reg)
49#define DUMP_CM_MOD_REG(mod, reg) \
50 regs[reg_count].name = #mod "." #reg; \
51 regs[reg_count++].val = omap2_cm_read_mod_reg(mod, reg)
52#define DUMP_PRM_REG(reg) \
53 regs[reg_count].name = #reg; \
54 regs[reg_count++].val = __raw_readl(reg)
55#define DUMP_CM_REG(reg) \
56 regs[reg_count].name = #reg; \
57 regs[reg_count++].val = __raw_readl(reg)
58#define DUMP_INTC_REG(reg, off) \
59 regs[reg_count].name = #reg; \
60 regs[reg_count++].val = \
61 __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
62
63void omap2_pm_dump(int mode, int resume, unsigned int us)
64{
65 struct reg {
66 const char *name;
67 u32 val;
68 } regs[32];
69 int reg_count = 0, i;
70 const char *s1 = NULL, *s2 = NULL;
71
72 if (!resume) {
73#if 0
74 /* MPU */
75 DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
76 DUMP_CM_MOD_REG(MPU_MOD, OMAP2_CM_CLKSTCTRL);
77 DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTCTRL);
78 DUMP_PRM_MOD_REG(MPU_MOD, OMAP2_PM_PWSTST);
79 DUMP_PRM_MOD_REG(MPU_MOD, PM_WKDEP);
80#endif
81#if 0
82 /* INTC */
83 DUMP_INTC_REG(INTC_MIR0, 0x0084);
84 DUMP_INTC_REG(INTC_MIR1, 0x00a4);
85 DUMP_INTC_REG(INTC_MIR2, 0x00c4);
86#endif
87#if 0
88 DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1);
89 if (cpu_is_omap24xx()) {
90 DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2);
91 DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
92 OMAP2_PRCM_CLKEMUL_CTRL_OFFSET);
93 DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
94 OMAP2_PRCM_CLKSRC_CTRL_OFFSET);
95 }
96 DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN);
97 DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1);
98 DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2);
99 DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN);
100 DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN);
101 DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE);
102 DUMP_PRM_MOD_REG(CORE_MOD, OMAP2_PM_PWSTST);
103#endif
104#if 0
105 /* DSP */
106 if (cpu_is_omap24xx()) {
107 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN);
108 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN);
109 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST);
110 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
111 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL);
112 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_CM_CLKSTCTRL);
113 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTCTRL);
114 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_RM_RSTST);
115 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTCTRL);
116 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, OMAP2_PM_PWSTST);
117 }
118#endif
119 } else {
120 DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1);
121 if (cpu_is_omap24xx())
122 DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2);
123 DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST);
124 DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
125#if 1
126 DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098);
127 DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8);
128 DUMP_INTC_REG(INTC_PENDING_IRQ2, 0x00d8);
129#endif
130 }
131
132 switch (mode) {
133 case 0:
134 s1 = "full";
135 s2 = "retention";
136 break;
137 case 1:
138 s1 = "MPU";
139 s2 = "retention";
140 break;
141 case 2:
142 s1 = "MPU";
143 s2 = "idle";
144 break;
145 }
146
147 if (!resume)
148#ifdef CONFIG_NO_HZ
149 printk(KERN_INFO
150 "--- Going to %s %s (next timer after %u ms)\n", s1, s2,
151 jiffies_to_msecs(get_next_timer_interrupt(jiffies) -
152 jiffies));
153#else
154 printk(KERN_INFO "--- Going to %s %s\n", s1, s2);
155#endif
156 else
157 printk(KERN_INFO "--- Woke up (slept for %u.%03u ms)\n",
158 us / 1000, us % 1000);
159
160 for (i = 0; i < reg_count; i++)
161 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
162}
163
164void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds) 45void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
165{ 46{
166 u32 tick_rate, cycles; 47 u32 tick_rate, cycles;