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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2009-05-28 17:16:04 -0400
committerTony Lindgren <tony@atomide.com>2009-05-28 17:16:04 -0400
commit44169075e6eaa87bab6a296209d8d0610879b394 (patch)
tree4aca7ea61215bb50d647476de30c558859c2f2f3 /arch/arm/mach-omap2/io.c
parent7419045016e5002b3ccee72b28e41bf53dca68f2 (diff)
ARM: OMAP4: Add minimal support for omap4
This patch adds the support for OMAP4. The platform and machine specific headers and sources updated for OMAP4430 SDP platform. OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/io.c')
-rw-r--r--arch/arm/mach-omap2/io.c52
1 files changed, 50 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 916fcd3a232..32afd944821 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -4,12 +4,14 @@
4 * OMAP2 I/O mapping code 4 * OMAP2 I/O mapping code
5 * 5 *
6 * Copyright (C) 2005 Nokia Corporation 6 * Copyright (C) 2005 Nokia Corporation
7 * Copyright (C) 2007 Texas Instruments 7 * Copyright (C) 2007-2009 Texas Instruments
8 * 8 *
9 * Author: 9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com> 10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com> 11 * Syed Khasim <x0khasim@ti.com>
12 * 12 *
13 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
13 * This program is free software; you can redistribute it and/or modify 15 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as 16 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
@@ -30,6 +32,7 @@
30#include <mach/sdrc.h> 32#include <mach/sdrc.h>
31#include <mach/gpmc.h> 33#include <mach/gpmc.h>
32 34
35#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once clkdev is ready */
33#include "clock.h" 36#include "clock.h"
34 37
35#include <mach/powerdomain.h> 38#include <mach/powerdomain.h>
@@ -38,7 +41,7 @@
38 41
39#include <mach/clockdomain.h> 42#include <mach/clockdomain.h>
40#include "clockdomains.h" 43#include "clockdomains.h"
41 44#endif
42/* 45/*
43 * The machine specific code may provide the extra mapping besides the 46 * The machine specific code may provide the extra mapping besides the
44 * default mapping provided here. 47 * default mapping provided here.
@@ -166,6 +169,46 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
166 }, 169 },
167}; 170};
168#endif 171#endif
172#ifdef CONFIG_ARCH_OMAP4
173static struct map_desc omap44xx_io_desc[] __initdata = {
174 {
175 .virtual = L3_44XX_VIRT,
176 .pfn = __phys_to_pfn(L3_44XX_PHYS),
177 .length = L3_44XX_SIZE,
178 .type = MT_DEVICE,
179 },
180 {
181 .virtual = L4_44XX_VIRT,
182 .pfn = __phys_to_pfn(L4_44XX_PHYS),
183 .length = L4_44XX_SIZE,
184 .type = MT_DEVICE,
185 },
186 {
187 .virtual = L4_WK_44XX_VIRT,
188 .pfn = __phys_to_pfn(L4_WK_44XX_PHYS),
189 .length = L4_WK_44XX_SIZE,
190 .type = MT_DEVICE,
191 },
192 {
193 .virtual = OMAP44XX_GPMC_VIRT,
194 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
195 .length = OMAP44XX_GPMC_SIZE,
196 .type = MT_DEVICE,
197 },
198 {
199 .virtual = L4_PER_44XX_VIRT,
200 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
201 .length = L4_PER_44XX_SIZE,
202 .type = MT_DEVICE,
203 },
204 {
205 .virtual = L4_EMU_44XX_VIRT,
206 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
207 .length = L4_EMU_44XX_SIZE,
208 .type = MT_DEVICE,
209 },
210};
211#endif
169 212
170void __init omap2_map_common_io(void) 213void __init omap2_map_common_io(void)
171{ 214{
@@ -183,6 +226,9 @@ void __init omap2_map_common_io(void)
183 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); 226 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
184#endif 227#endif
185 228
229#if defined(CONFIG_ARCH_OMAP4)
230 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
231#endif
186 /* Normally devicemaps_init() would flush caches and tlb after 232 /* Normally devicemaps_init() would flush caches and tlb after
187 * mdesc->map_io(), but we must also do it here because of the CPU 233 * mdesc->map_io(), but we must also do it here because of the CPU
188 * revision check below. 234 * revision check below.
@@ -198,9 +244,11 @@ void __init omap2_map_common_io(void)
198void __init omap2_init_common_hw(struct omap_sdrc_params *sp) 244void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
199{ 245{
200 omap2_mux_init(); 246 omap2_mux_init();
247#ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
201 pwrdm_init(powerdomains_omap); 248 pwrdm_init(powerdomains_omap);
202 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); 249 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
203 omap2_clk_init(); 250 omap2_clk_init();
204 omap2_sdrc_init(sp); 251 omap2_sdrc_init(sp);
252#endif
205 gpmc_init(); 253 gpmc_init();
206} 254}