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authorTony Lindgren <tony@atomide.com>2010-01-19 18:40:26 -0500
committerTony Lindgren <tony@atomide.com>2010-01-19 21:17:36 -0500
commite9acb9b64d7fb16c7f69efa85c5707cffd0c7275 (patch)
tree2eae26e4c1cfb5dab85b846125270b80bea55ad3 /arch/arm/mach-omap2/id.c
parentd4bb72e50a0c4b6790dec127a38fd06d06e561cc (diff)
omap3: Fix cpu detection
We need to set the omap_chip.oc carefully for the clocks to work. To fix this, set the omap_chip.oc in omap3_check_features() based on the CONTROL_IDCODE and silicon revision registers. Also add handling for 34xx es3.1.2 as es3.1 for now. Fixes booting on at least overo board. Based on an earlier patch by Paul Walmsley <paul@pwsan.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/id.c')
-rw-r--r--arch/arm/mach-omap2/id.c41
1 files changed, 23 insertions, 18 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a091b53657b..3d65c50bd01 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -188,6 +188,8 @@ void __init omap3_check_revision(void)
188 u16 hawkeye; 188 u16 hawkeye;
189 u8 rev; 189 u8 rev;
190 190
191 omap_chip.oc = CHIP_IS_OMAP3430;
192
191 /* 193 /*
192 * We cannot access revision registers on ES1.0. 194 * We cannot access revision registers on ES1.0.
193 * If the processor type is Cortex-A8 and the revision is 0x0 195 * If the processor type is Cortex-A8 and the revision is 0x0
@@ -196,6 +198,7 @@ void __init omap3_check_revision(void)
196 cpuid = read_cpuid(CPUID_ID); 198 cpuid = read_cpuid(CPUID_ID);
197 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { 199 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
198 omap_revision = OMAP3430_REV_ES1_0; 200 omap_revision = OMAP3430_REV_ES1_0;
201 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
199 return; 202 return;
200 } 203 }
201 204
@@ -216,18 +219,28 @@ void __init omap3_check_revision(void)
216 case 0: /* Take care of early samples */ 219 case 0: /* Take care of early samples */
217 case 1: 220 case 1:
218 omap_revision = OMAP3430_REV_ES2_0; 221 omap_revision = OMAP3430_REV_ES2_0;
222 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
219 break; 223 break;
220 case 2: 224 case 2:
221 omap_revision = OMAP3430_REV_ES2_1; 225 omap_revision = OMAP3430_REV_ES2_1;
226 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
222 break; 227 break;
223 case 3: 228 case 3:
224 omap_revision = OMAP3430_REV_ES3_0; 229 omap_revision = OMAP3430_REV_ES3_0;
230 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
225 break; 231 break;
226 case 4: 232 case 4:
233 omap_revision = OMAP3430_REV_ES3_1;
234 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
235 break;
236 case 7:
227 /* FALLTHROUGH */ 237 /* FALLTHROUGH */
228 default: 238 default:
229 /* Use the latest known revision as default */ 239 /* Use the latest known revision as default */
230 omap_revision = OMAP3430_REV_ES3_1; 240 omap_revision = OMAP3430_REV_ES3_1_2;
241
242 /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
243 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
231 } 244 }
232 break; 245 break;
233 case 0xb868: 246 case 0xb868:
@@ -235,14 +248,18 @@ void __init omap3_check_revision(void)
235 * 248 *
236 * Set the device to be OMAP3505 here. Actual device 249 * Set the device to be OMAP3505 here. Actual device
237 * is identified later based on the features. 250 * is identified later based on the features.
251 *
252 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
238 */ 253 */
239 omap_revision = OMAP3505_REV(rev); 254 omap_revision = OMAP3505_REV(rev);
255 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
240 break; 256 break;
241 case 0xb891: 257 case 0xb891:
242 /* FALLTHROUGH */ 258 /* FALLTHROUGH */
243 default: 259 default:
244 /* Unknown default to latest silicon rev as default*/ 260 /* Unknown default to latest silicon rev as default*/
245 omap_revision = OMAP3630_REV_ES1_0; 261 omap_revision = OMAP3630_REV_ES1_0;
262 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
246 } 263 }
247} 264}
248 265
@@ -360,6 +377,7 @@ void __init omap2_check_revision(void)
360 omap3_check_revision(); 377 omap3_check_revision();
361 omap3_check_features(); 378 omap3_check_features();
362 omap3_cpuinfo(); 379 omap3_cpuinfo();
380 return;
363 } else if (cpu_is_omap44xx()) { 381 } else if (cpu_is_omap44xx()) {
364 omap4_check_revision(); 382 omap4_check_revision();
365 return; 383 return;
@@ -374,27 +392,14 @@ void __init omap2_check_revision(void)
374 if (cpu_is_omap243x()) { 392 if (cpu_is_omap243x()) {
375 /* Currently only supports 2430ES2.1 and 2430-all */ 393 /* Currently only supports 2430ES2.1 and 2430-all */
376 omap_chip.oc |= CHIP_IS_OMAP2430; 394 omap_chip.oc |= CHIP_IS_OMAP2430;
395 return;
377 } else if (cpu_is_omap242x()) { 396 } else if (cpu_is_omap242x()) {
378 /* Currently only supports 2420ES2.1.1 and 2420-all */ 397 /* Currently only supports 2420ES2.1.1 and 2420-all */
379 omap_chip.oc |= CHIP_IS_OMAP2420; 398 omap_chip.oc |= CHIP_IS_OMAP2420;
380 } else if (cpu_is_omap3505() || cpu_is_omap3517()) { 399 return;
381 omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1;
382 } else if (cpu_is_omap343x()) {
383 omap_chip.oc = CHIP_IS_OMAP3430;
384 if (omap_rev() == OMAP3430_REV_ES1_0)
385 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
386 else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
387 omap_rev() <= OMAP3430_REV_ES2_1)
388 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
389 else if (omap_rev() == OMAP3430_REV_ES3_0)
390 omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
391 else if (omap_rev() == OMAP3430_REV_ES3_1)
392 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
393 else if (omap_rev() == OMAP3630_REV_ES1_0)
394 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
395 } else {
396 pr_err("Uninitialized omap_chip, please fix!\n");
397 } 400 }
401
402 pr_err("Uninitialized omap_chip, please fix!\n");
398} 403}
399 404
400/* 405/*