aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-netx
diff options
context:
space:
mode:
authorRob Herring <rob.herring@calxeda.com>2012-03-09 18:16:40 -0500
committerRob Herring <rob.herring@calxeda.com>2012-03-13 22:25:21 -0400
commita2a47ca36642e3995e982957bc42678cf11ca6ac (patch)
tree6b6a034d2d61c4b0f0f3bb59c673dd7b16d19c11 /arch/arm/mach-netx
parent6f6f6a70295c6a4f89c7aca015c5db247a79d609 (diff)
ARM: __io abuse cleanup
Several platforms incorrectly use __io() for casting to 'void __iomem *'. This converts all of those uses to use the common IOMEM macro. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-sh@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-netx')
-rw-r--r--arch/arm/mach-netx/generic.c2
-rw-r--r--arch/arm/mach-netx/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-netx/include/mach/netx-regs.h16
3 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 59e67979f19..aa627465d91 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
168{ 168{
169 int irq; 169 int irq;
170 170
171 vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0); 171 vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0);
172 172
173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { 173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
174 irq_set_chip_and_handler(irq, &netx_hif_chip, 174 irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/arch/arm/mach-netx/include/mach/hardware.h b/arch/arm/mach-netx/include/mach/hardware.h
index 517a2bd3784..b661af2f214 100644
--- a/arch/arm/mach-netx/include/mach/hardware.h
+++ b/arch/arm/mach-netx/include/mach/hardware.h
@@ -33,7 +33,7 @@
33#define XMAC_MEM_SIZE 0x1000 33#define XMAC_MEM_SIZE 0x1000
34#define SRAM_MEM_SIZE 0x8000 34#define SRAM_MEM_SIZE 0x8000
35 35
36#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT) 36#define io_p2v(x) IOMEM((x) - NETX_IO_PHYS + NETX_IO_VIRT)
37#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS) 37#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS)
38 38
39#endif 39#endif
diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h
index 5a03e7ccb01..fdde22b58ac 100644
--- a/arch/arm/mach-netx/include/mach/netx-regs.h
+++ b/arch/arm/mach-netx/include/mach/netx-regs.h
@@ -115,7 +115,7 @@
115 *********************************/ 115 *********************************/
116 116
117/* Registers */ 117/* Registers */
118#define NETX_SYSTEM_REG(ofs) __io(NETX_VA_SYSTEM + (ofs)) 118#define NETX_SYSTEM_REG(ofs) IOMEM(NETX_VA_SYSTEM + (ofs))
119#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00) 119#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00)
120#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04) 120#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04)
121#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08) 121#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08)
@@ -185,7 +185,7 @@
185 *******************************/ 185 *******************************/
186 186
187/* Registers */ 187/* Registers */
188#define NETX_GPIO_REG(ofs) __io(NETX_VA_GPIO + (ofs)) 188#define NETX_GPIO_REG(ofs) IOMEM(NETX_VA_GPIO + (ofs))
189#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2)) 189#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2))
190#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2)) 190#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2))
191#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2)) 191#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2))
@@ -230,7 +230,7 @@
230 *******************************/ 230 *******************************/
231 231
232/* Registers */ 232/* Registers */
233#define NETX_PIO_REG(ofs) __io(NETX_VA_PIO + (ofs)) 233#define NETX_PIO_REG(ofs) IOMEM(NETX_VA_PIO + (ofs))
234#define NETX_PIO_INPIO NETX_PIO_REG(0x0) 234#define NETX_PIO_INPIO NETX_PIO_REG(0x0)
235#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4) 235#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4)
236#define NETX_PIO_OEPIO NETX_PIO_REG(0x8) 236#define NETX_PIO_OEPIO NETX_PIO_REG(0x8)
@@ -240,7 +240,7 @@
240 *******************************/ 240 *******************************/
241 241
242/* Registers */ 242/* Registers */
243#define NETX_MIIMU __io(NETX_VA_MIIMU) 243#define NETX_MIIMU IOMEM(NETX_VA_MIIMU)
244 244
245/* Bits */ 245/* Bits */
246#define MIIMU_SNRDY (1<<0) 246#define MIIMU_SNRDY (1<<0)
@@ -317,7 +317,7 @@
317 *******************************/ 317 *******************************/
318 318
319/* Registers */ 319/* Registers */
320#define NETX_PFIFO_REG(ofs) __io(NETX_VA_PFIFO + (ofs)) 320#define NETX_PFIFO_REG(ofs) IOMEM(NETX_VA_PFIFO + (ofs))
321#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2)) 321#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2))
322#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2)) 322#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2))
323#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100) 323#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100)
@@ -334,7 +334,7 @@
334 *******************************/ 334 *******************************/
335 335
336/* Registers */ 336/* Registers */
337#define NETX_MEMCR_REG(ofs) __io(NETX_VA_MEMCR + (ofs)) 337#define NETX_MEMCR_REG(ofs) IOMEM(NETX_VA_MEMCR + (ofs))
338#define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */ 338#define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */
339#define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40) 339#define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40)
340#define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44) 340#define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44)
@@ -355,7 +355,7 @@
355 *******************************/ 355 *******************************/
356 356
357/* Registers */ 357/* Registers */
358#define NETX_DPMAS_REG(ofs) __io(NETX_VA_DPMAS + (ofs)) 358#define NETX_DPMAS_REG(ofs) IOMEM(NETX_VA_DPMAS + (ofs))
359#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8) 359#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8)
360#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0) 360#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0)
361#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0) 361#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0)
@@ -425,7 +425,7 @@
425/******************************* 425/*******************************
426 * I2C * 426 * I2C *
427 *******************************/ 427 *******************************/
428#define NETX_I2C_REG(ofs) __io(NETX_VA_I2C, (ofs)) 428#define NETX_I2C_REG(ofs) IOMEM(NETX_VA_I2C, (ofs))
429#define NETX_I2C_CTRL NETX_I2C_REG(0x0) 429#define NETX_I2C_CTRL NETX_I2C_REG(0x0)
430#define NETX_I2C_DATA NETX_I2C_REG(0x4) 430#define NETX_I2C_DATA NETX_I2C_REG(0x4)
431 431