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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-12-10 08:55:42 -0500
committerJiri Kosina <jkosina@suse.cz>2010-12-10 10:04:28 -0500
commita34f0b31398020e2d3be653eb695bd17a9cf3b55 (patch)
treea049085d3b21a55f3138ed2cc78552cad828748d /arch/arm/mach-msm/include/mach
parentdac36dd87de10d1fd81dc7b7a40256cb2e965abc (diff)
fix comment typos concerning "consistent"
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch/arm/mach-msm/include/mach')
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-qgic.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
index 4dc99aa65d0..12467157afb 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
@@ -26,7 +26,7 @@
26 * The interrupt numbering scheme is defined in the 26 * The interrupt numbering scheme is defined in the
27 * interrupt controller spec. To wit: 27 * interrupt controller spec. To wit:
28 * 28 *
29 * Migrated the code from ARM MP port to be more consistant 29 * Migrated the code from ARM MP port to be more consistent
30 * with interrupt processing , the following still holds true 30 * with interrupt processing , the following still holds true
31 * however, all interrupts are treated the same regardless of 31 * however, all interrupts are treated the same regardless of
32 * if they are local IPI or PPI 32 * if they are local IPI or PPI