aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
diff options
context:
space:
mode:
authorDavid Brown <davidb@codeaurora.org>2011-05-12 03:54:36 -0400
committerDavid Brown <davidb@codeaurora.org>2011-08-01 07:57:59 -0400
commit03db0729b7603202f7d3a2bf2ec7e89a1ad44a17 (patch)
tree10aa5169c72f2199d21ee41c064a3974fd91c870 /arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
parentce427c384ea4b7ec48c7e6367b7b64457eba87b3 (diff)
msm: Remove chip-ifdefs for GPIO io mappings
The two GPIO controllers are always mapped to the same virtual address across all MSM devices. Instead of selecting this at compile time, determine the physical address at runtime, eliminating yet something else preventing multiple MSM targets from being compiled into the same kernel. Change-Id: I1672219d978ab6243526adeda6badf49472baa27 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch/arm/mach-msm/include/mach/msm_iomap-7x00.h')
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-7x00.h10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 8f99d97615a..94fe9fe6feb 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -55,13 +55,11 @@
55#define MSM_DMOV_PHYS 0xA9700000 55#define MSM_DMOV_PHYS 0xA9700000
56#define MSM_DMOV_SIZE SZ_4K 56#define MSM_DMOV_SIZE SZ_4K
57 57
58#define MSM_GPIO1_BASE IOMEM(0xE0003000) 58#define MSM7X00_GPIO1_PHYS 0xA9200000
59#define MSM_GPIO1_PHYS 0xA9200000 59#define MSM7X00_GPIO1_SIZE SZ_4K
60#define MSM_GPIO1_SIZE SZ_4K
61 60
62#define MSM_GPIO2_BASE IOMEM(0xE0004000) 61#define MSM7X00_GPIO2_PHYS 0xA9300000
63#define MSM_GPIO2_PHYS 0xA9300000 62#define MSM7X00_GPIO2_SIZE SZ_4K
64#define MSM_GPIO2_SIZE SZ_4K
65 63
66#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) 64#define MSM_CLK_CTL_BASE IOMEM(0xE0005000)
67#define MSM_CLK_CTL_PHYS 0xA8600000 65#define MSM_CLK_CTL_PHYS 0xA8600000