Added missing tegra files.HEADmaster

9 files changed, 456 insertions, 0 deletions

diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
new file mode 100644
index 00000000000..12467157afb
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
@@ -0,0 +1,88 @@
+/*
+ * Low-level IRQ helper macros
+ *
+ * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <mach/hardware.h>
+#include <asm/hardware/gic.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        ldr     \base, =gic_cpu_base_addr
+        ldr     \base, [\base]
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        /*
+         * The interrupt numbering scheme is defined in the
+         * interrupt controller spec.  To wit:
+         *
+         * Migrated the code from ARM MP port to be more consistent
+         * with interrupt processing , the following still holds true
+         * however, all interrupts are treated the same regardless of
+         * if they are local IPI or PPI
+         *
+         * Interrupts 0-15 are IPI
+         * 16-31 are PPI
+         *   (16-18 are the timers)
+         * 32-1020 are global
+         * 1021-1022 are reserved
+         * 1023 is "spurious" (no interrupt)
+         *
+         * A simple read from the controller will tell us the number of the
+         * highest priority enabled interrupt.  We then just need to check
+         * whether it is in the valid range for an IRQ (0-1020 inclusive).
+         *
+         * Base ARM code assumes that the local (private) peripheral interrupts
+         * are not valid, we treat them differently, in that the privates are
+         * handled like normal shared interrupts with the exception that only
+         * one processor can register the interrupt and the handler must be
+         * the same for all processors.
+         */
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+        ldr  \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 =srcCPU,
+                                                   9-0 =int # */
+
+        bic     \irqnr, \irqstat, #0x1c00       @mask src
+        cmp     \irqnr, #15
+        ldr             \tmp, =1021
+        cmpcc   \irqnr, \irqnr
+        cmpne   \irqnr, \tmp
+        cmpcs   \irqnr, \irqnr
+
+        .endm
+
+        /* We assume that irqstat (the raw value of the IRQ acknowledge
+         * register) is preserved from the macro above.
+         * If there is an IPI, we immediately signal end of interrupt on the
+         * controller, since this requires the original irqstat value which
+         * we won't easily be able to recreate later.
+         */
+        .macro test_for_ipi, irqnr, irqstat, base, tmp
+    bic \irqnr, \irqstat, #0x1c00
+    cmp \irqnr, #16
+    strcc   \irqstat, [\base, #GIC_CPU_EOI]
+    cmpcs   \irqnr, \irqnr
+        .endm
+
+        /* As above, this assumes that irqstat and base are preserved.. */
+
+        .macro test_for_ltirq, irqnr, irqstat, base, tmp
+    bic \irqnr, \irqstat, #0x1c00
+    mov     \tmp, #0
+    cmp \irqnr, #16
+    moveq   \tmp, #1
+    streq   \irqstat, [\base, #GIC_CPU_EOI]
+    cmp \tmp, #0
+        .endm
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-vic.S b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
new file mode 100644
index 00000000000..70563ed11b3
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/entry-macro-vic.S
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <mach/msm_iomap.h>
+
+        .macro  disable_fiq
+        .endm
+
+        .macro  get_irqnr_preamble, base, tmp
+        @ enable imprecise aborts
+        cpsie   a
+        mov     \base, #MSM_VIC_BASE
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+        @ 0xD0 has irq# or old irq# if the irq has been handled
+        @ 0xD4 has irq# or -1 if none pending *but* if you just
+        @ read 0xD4 you never get the first irq for some reason
+        ldr     \irqnr, [\base, #0xD0]
+        ldr     \irqnr, [\base, #0xD4]
+        cmp     \irqnr, #0xffffffff
+        .endm
diff --git a/arch/arm/mach-msm/include/mach/gpio.h b/arch/arm/mach-msm/include/mach/gpio.h
new file mode 100644
index 00000000000..36ad50d3bfa
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/gpio.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ * Author: Mike Lockwood <lockwood@android.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __ASM_ARCH_MSM_GPIO_H
+#define __ASM_ARCH_MSM_GPIO_H
+
+#include <asm-generic/gpio.h>
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+#define gpio_to_irq     __gpio_to_irq
+
+#endif /* __ASM_ARCH_MSM_GPIO_H */
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
new file mode 100644
index 00000000000..dc1b928745e
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/io.h
@@ -0,0 +1,36 @@
+/* arch/arm/mach-msm/include/mach/io.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#define __arch_ioremap __msm_ioremap
+#define __arch_iounmap __iounmap
+
+void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
+
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+void msm_map_qsd8x50_io(void);
+void msm_map_msm7x30_io(void);
+void msm_map_msm8x60_io(void);
+void msm_map_msm8960_io(void);
+
+extern unsigned int msm_shared_ram_phys;
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
new file mode 100644
index 00000000000..f2f8d299ba9
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -0,0 +1,35 @@
+/* arch/arm/mach-msm/include/mach/memory.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+/* physical offset of RAM */
+#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A)
+#define PLAT_PHYS_OFFSET                UL(0x00000000)
+#elif defined(CONFIG_ARCH_QSD8X50)
+#define PLAT_PHYS_OFFSET                UL(0x20000000)
+#elif defined(CONFIG_ARCH_MSM7X30)
+#define PLAT_PHYS_OFFSET                UL(0x00200000)
+#elif defined(CONFIG_ARCH_MSM8X60)
+#define PLAT_PHYS_OFFSET                UL(0x40200000)
+#elif defined(CONFIG_ARCH_MSM8960)
+#define PLAT_PHYS_OFFSET                UL(0x40200000)
+#else
+#define PLAT_PHYS_OFFSET                UL(0x10000000)
+#endif
+
+#endif
+
diff --git a/arch/arm/mach-msm/include/mach/mmc.h b/arch/arm/mach-msm/include/mach/mmc.h
new file mode 100644
index 00000000000..5631b51cec4
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/mmc.h
@@ -0,0 +1,37 @@
+/*
+ *  arch/arm/include/asm/mach/mmc.h
+ */
+#ifndef ASMARM_MACH_MMC_H
+#define ASMARM_MACH_MMC_H
+
+#include <linux/mmc/host.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/sdio_func.h>
+
+struct embedded_sdio_data {
+        struct sdio_cis cis;
+        struct sdio_cccr cccr;
+        struct sdio_embedded_func *funcs;
+        int num_funcs;
+};
+
+struct msm_mmc_gpio {
+        unsigned no;
+        const char *name;
+};
+
+struct msm_mmc_gpio_data {
+        struct msm_mmc_gpio *gpio;
+        u8 size;
+};
+
+struct msm_mmc_platform_data {
+        unsigned int ocr_mask;                  /* available voltages */
+        u32 (*translate_vdd)(struct device *, unsigned int);
+        unsigned int (*status)(struct device *);
+        struct embedded_sdio_data *embedded_sdio;
+        int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id);
+        struct msm_mmc_gpio_data *gpio_data;
+};
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_fb.h b/arch/arm/mach-msm/include/mach/msm_fb.h
new file mode 100644
index 00000000000..1f4fc81b3d8
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_fb.h
@@ -0,0 +1,147 @@
+/* arch/arm/mach-msm/include/mach/msm_fb.h
+ *
+ * Internal shared definitions for various MSM framebuffer parts.
+ *
+ * Copyright (C) 2007 Google Incorporated
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _MSM_FB_H_
+#define _MSM_FB_H_
+
+#include <linux/device.h>
+
+struct mddi_info;
+
+struct msm_fb_data {
+        int xres;       /* x resolution in pixels */
+        int yres;       /* y resolution in pixels */
+        int width;      /* disply width in mm */
+        int height;     /* display height in mm */
+        unsigned output_format;
+};
+
+struct msmfb_callback {
+        void (*func)(struct msmfb_callback *);
+};
+
+enum {
+        MSM_MDDI_PMDH_INTERFACE,
+        MSM_MDDI_EMDH_INTERFACE,
+        MSM_EBI2_INTERFACE,
+};
+
+#define MSMFB_CAP_PARTIAL_UPDATES       (1 << 0)
+
+struct msm_panel_data {
+        /* turns off the fb memory */
+        int (*suspend)(struct msm_panel_data *);
+        /* turns on the fb memory */
+        int (*resume)(struct msm_panel_data *);
+        /* turns off the panel */
+        int (*blank)(struct msm_panel_data *);
+        /* turns on the panel */
+        int (*unblank)(struct msm_panel_data *);
+        void (*wait_vsync)(struct msm_panel_data *);
+        void (*request_vsync)(struct msm_panel_data *, struct msmfb_callback *);
+        void (*clear_vsync)(struct msm_panel_data *);
+        /* from the enum above */
+        unsigned interface_type;
+        /* data to be passed to the fb driver */
+        struct msm_fb_data *fb_data;
+
+        /* capabilities supported by the panel */
+        uint32_t caps;
+};
+
+struct msm_mddi_client_data {
+        void (*suspend)(struct msm_mddi_client_data *);
+        void (*resume)(struct msm_mddi_client_data *);
+        void (*activate_link)(struct msm_mddi_client_data *);
+        void (*remote_write)(struct msm_mddi_client_data *, uint32_t val,
+                             uint32_t reg);
+        uint32_t (*remote_read)(struct msm_mddi_client_data *, uint32_t reg);
+        void (*auto_hibernate)(struct msm_mddi_client_data *, int);
+        /* custom data that needs to be passed from the board file to a 
+         * particular client */
+        void *private_client_data;
+        struct resource *fb_resource;
+        /* from the list above */
+        unsigned interface_type;
+};
+
+struct msm_mddi_platform_data {
+        unsigned int clk_rate;
+        void (*power_client)(struct msm_mddi_client_data *, int on);
+
+        /* fixup the mfr name, product id */
+        void (*fixup)(uint16_t *mfr_name, uint16_t *product_id);
+
+        struct resource *fb_resource; /*optional*/
+        /* number of clients in the list that follows */
+        int num_clients;
+        /* array of client information of clients */
+        struct {
+                unsigned product_id; /* mfr id in top 16 bits, product id
+                                      * in lower 16 bits
+                                      */
+                char *name;     /* the device name will be the platform
+                                 * device name registered for the client,
+                                 * it should match the name of the associated
+                                 * driver
+                                 */
+                unsigned id;    /* id for mddi client device node, will also
+                                 * be used as device id of panel devices, if
+                                 * the client device will have multiple panels
+                                 * space must be left here for them
+                                 */
+                void *client_data;      /* required private client data */
+                unsigned int clk_rate;  /* optional: if the client requires a
+                                        * different mddi clk rate
+                                        */
+        } client_platform_data[];
+};
+
+struct mdp_blit_req;
+struct fb_info;
+struct mdp_device {
+        struct device dev;
+        void (*dma)(struct mdp_device *mpd, uint32_t addr,
+                    uint32_t stride, uint32_t w, uint32_t h, uint32_t x,
+                    uint32_t y, struct msmfb_callback *callback, int interface);
+        void (*dma_wait)(struct mdp_device *mdp);
+        int (*blit)(struct mdp_device *mdp, struct fb_info *fb,
+                    struct mdp_blit_req *req);
+        void (*set_grp_disp)(struct mdp_device *mdp, uint32_t disp_id);
+};
+
+struct class_interface;
+int register_mdp_client(struct class_interface *class_intf);
+
+/**** private client data structs go below this line ***/
+
+struct msm_mddi_bridge_platform_data {
+        /* from board file */
+        int (*init)(struct msm_mddi_bridge_platform_data *,
+                    struct msm_mddi_client_data *);
+        int (*uninit)(struct msm_mddi_bridge_platform_data *,
+                      struct msm_mddi_client_data *);
+        /* passed to panel for use by the fb driver */
+        int (*blank)(struct msm_mddi_bridge_platform_data *,
+                     struct msm_mddi_client_data *);
+        int (*unblank)(struct msm_mddi_bridge_platform_data *,
+                       struct msm_mddi_client_data *);
+        struct msm_fb_data fb_data;
+};
+
+
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
new file mode 100644
index 00000000000..d2e83f42ba1
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -0,0 +1,28 @@
+/* arch/arm/mach-msm/include/mach/system.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <mach/hardware.h>
+
+void arch_idle(void);
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+        for (;;) ;  /* depends on IPC w/ other core */
+}
+
+/* low level hardware reset hook -- for example, hitting the
+ * PSHOLD line on the PMIC to hard reset the system
+ */
+extern void (*msm_hw_reset_hook)(void);
diff --git a/arch/arm/mach-msm/include/mach/vmalloc.h b/arch/arm/mach-msm/include/mach/vmalloc.h
new file mode 100644
index 00000000000..d138448eff1
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/vmalloc.h
@@ -0,0 +1,22 @@
+/* arch/arm/mach-msm/include/mach/vmalloc.h
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_VMALLOC_H
+#define __ASM_ARCH_MSM_VMALLOC_H
+
+#define VMALLOC_END       0xd0000000UL
+
+#endif
+