aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-mmp
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 16:32:53 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-22 16:32:53 -0400
commitf6a26ae7699416d86bea8cb68ce413571e9cab3c (patch)
treee91b7a7c7513151fe583721f7435cc9f5cdc4f42 /arch/arm/mach-mmp
parentcdd3a354a05b0c33fe33ab11a0fb0838396cad19 (diff)
parent48a5765e5104f1afd22c75c5030af3a6cf24b4c3 (diff)
Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc board specific changes from Olof Johansson: "While we generally attempt to get rid of board specific files and replace them with device tree based descriptions, a lot of platforms have not come that far: In shmobile, we add two new board files because their recently started effort to add DT support has not proceeded enough to use it for all of the important hardware. In Kirkwood, we are adding support for new boards with a combination of DT and board file contents in multiple cases. pxa/mmp and imx are extending support for existing board files but not adding new ones." Fix up trivial conflicts in arch/arm/mach-{mmp/ttc_dkb.c,shmobile/{Kconfig,Makefile}} * tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits) ARM: shmobile: fix smp build ARM: kirkwood: Add support for RaidSonic IB-NAS6210/6220 using devicetree kirkwood: Add iconnect support orion/kirkwood: create a generic function for gpio led blinking kirkwood/orion: fix orion_gpio_set_blink ARM: kirkwood: Define DNS-320/DNS-325 NAND in fdt kirkwood: Allow nand to be configured via. devicetree mtd: Add orion_nand devicetree bindings ARM: kirkwood: Basic support for DNS-320 and DNS-325 ARM: mach-shmobile: Use DT_MACHINE for armadillo 800 eva ARM: mach-shmobile: Use DT_MACHINE for KZM9G ARM: pxa: hx4700: Add Synaptics NavPoint touchpad ARM: pxa: Use REGULATOR_SUPPLY macro ARM: mach-shmobile: kzm9g: enable SMP boot ARM: mach-shmobile: kzm9g: defconfig update ARM: mach-shmobile: kzm9g: add PCF8757 gpio-key ARM: mach-shmobile: kzm9g: add SDHI support ARM: mach-shmobile: kzm9g: add MMCIF support ARM: mach-shmobile: kzm9g: correct screen direction ARM: mach-shmobile: sh73a0.h: add GPIO_NR ...
Diffstat (limited to 'arch/arm/mach-mmp')
-rw-r--r--arch/arm/mach-mmp/Kconfig7
-rw-r--r--arch/arm/mach-mmp/aspenite.c20
-rw-r--r--arch/arm/mach-mmp/devices.c282
-rw-r--r--arch/arm/mach-mmp/include/mach/devices.h3
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h8
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h3
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-usb.h253
-rw-r--r--arch/arm/mach-mmp/pxa168.c20
-rw-r--r--arch/arm/mach-mmp/pxa910.c2
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c37
10 files changed, 620 insertions, 15 deletions
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index ede72162815..7fddd01b85b 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -122,4 +122,11 @@ config CPU_MMP2
122 select CPU_PJ4 122 select CPU_PJ4
123 help 123 help
124 Select code specific to MMP2. MMP2 is ARMv7 compatible. 124 Select code specific to MMP2. MMP2 is ARMv7 compatible.
125
126config USB_EHCI_MV_U2O
127 bool "EHCI support for PXA USB OTG controller"
128 depends on USB_EHCI_MV
129 help
130 Enables support for OTG controller which can be switched to host mode.
131
125endif 132endif
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index bf5d8e195c3..223090b1444 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -17,6 +17,7 @@
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h> 18#include <linux/mtd/nand.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/platform_data/mv_usb.h>
20 21
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
@@ -221,6 +222,21 @@ static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
221 .debounce_interval = 30, 222 .debounce_interval = 30,
222}; 223};
223 224
225#if defined(CONFIG_USB_EHCI_MV)
226static char *pxa168_sph_clock_name[] = {
227 [0] = "PXA168-USBCLK",
228};
229
230static struct mv_usb_platform_data pxa168_sph_pdata = {
231 .clknum = 1,
232 .clkname = pxa168_sph_clock_name,
233 .mode = MV_USB_MODE_HOST,
234 .phy_init = pxa_usb_phy_init,
235 .phy_deinit = pxa_usb_phy_deinit,
236 .set_vbus = NULL,
237};
238#endif
239
224static void __init common_init(void) 240static void __init common_init(void)
225{ 241{
226 mfp_config(ARRAY_AND_SIZE(common_pin_config)); 242 mfp_config(ARRAY_AND_SIZE(common_pin_config));
@@ -236,6 +252,10 @@ static void __init common_init(void)
236 252
237 /* off-chip devices */ 253 /* off-chip devices */
238 platform_device_register(&smc91x_device); 254 platform_device_register(&smc91x_device);
255
256#if defined(CONFIG_USB_EHCI_MV)
257 pxa168_add_usb_host(&pxa168_sph_pdata);
258#endif
239} 259}
240 260
241MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") 261MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c
index 191d9dea873..dd2d8b103cc 100644
--- a/arch/arm/mach-mmp/devices.c
+++ b/arch/arm/mach-mmp/devices.c
@@ -9,9 +9,13 @@
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/dma-mapping.h> 11#include <linux/dma-mapping.h>
12#include <linux/delay.h>
12 13
13#include <asm/irq.h> 14#include <asm/irq.h>
15#include <mach/irqs.h>
14#include <mach/devices.h> 16#include <mach/devices.h>
17#include <mach/cputype.h>
18#include <mach/regs-usb.h>
15 19
16int __init pxa_register_device(struct pxa_device_desc *desc, 20int __init pxa_register_device(struct pxa_device_desc *desc,
17 void *data, size_t size) 21 void *data, size_t size)
@@ -67,3 +71,281 @@ int __init pxa_register_device(struct pxa_device_desc *desc,
67 71
68 return platform_device_add(pdev); 72 return platform_device_add(pdev);
69} 73}
74
75#if defined(CONFIG_USB) || defined(CONFIG_USB_GADGET)
76
77/*****************************************************************************
78 * The registers read/write routines
79 *****************************************************************************/
80
81static unsigned int u2o_get(void __iomem *base, unsigned int offset)
82{
83 return readl_relaxed(base + offset);
84}
85
86static void u2o_set(void __iomem *base, unsigned int offset,
87 unsigned int value)
88{
89 u32 reg;
90
91 reg = readl_relaxed(base + offset);
92 reg |= value;
93 writel_relaxed(reg, base + offset);
94 readl_relaxed(base + offset);
95}
96
97static void u2o_clear(void __iomem *base, unsigned int offset,
98 unsigned int value)
99{
100 u32 reg;
101
102 reg = readl_relaxed(base + offset);
103 reg &= ~value;
104 writel_relaxed(reg, base + offset);
105 readl_relaxed(base + offset);
106}
107
108static void u2o_write(void __iomem *base, unsigned int offset,
109 unsigned int value)
110{
111 writel_relaxed(value, base + offset);
112 readl_relaxed(base + offset);
113}
114
115#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV)
116
117#if defined(CONFIG_CPU_PXA910) || defined(CONFIG_CPU_PXA168)
118
119static DEFINE_MUTEX(phy_lock);
120static int phy_init_cnt;
121
122static int usb_phy_init_internal(void __iomem *base)
123{
124 int loops;
125
126 pr_info("Init usb phy!!!\n");
127
128 /* Initialize the USB PHY power */
129 if (cpu_is_pxa910()) {
130 u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)
131 | (1<<UTMI_CTRL_PU_REF_SHIFT));
132 }
133
134 u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
135 u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
136
137 /* UTMI_PLL settings */
138 u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK
139 | UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK
140 | UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK
141 | UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK);
142
143 u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT
144 | 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT
145 | 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT
146 | 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT);
147
148 /* UTMI_TX */
149 u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
150 | UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK
151 | UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK
152 | UTMI_TX_AMP_MASK);
153 u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT
154 | 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT
155 | 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT);
156
157 /* UTMI_RX */
158 u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK
159 | UTMI_REG_SQ_LENGTH_MASK);
160 u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT
161 | 2<<UTMI_REG_SQ_LENGTH_SHIFT);
162
163 /* UTMI_IVREF */
164 if (cpu_is_pxa168())
165 /* fixing Microsoft Altair board interface with NEC hub issue -
166 * Set UTMI_IVREF from 0x4a3 to 0x4bf */
167 u2o_write(base, UTMI_IVREF, 0x4bf);
168
169 /* toggle VCOCAL_START bit of UTMI_PLL */
170 udelay(200);
171 u2o_set(base, UTMI_PLL, VCOCAL_START);
172 udelay(40);
173 u2o_clear(base, UTMI_PLL, VCOCAL_START);
174
175 /* toggle REG_RCAL_START bit of UTMI_TX */
176 udelay(400);
177 u2o_set(base, UTMI_TX, REG_RCAL_START);
178 udelay(40);
179 u2o_clear(base, UTMI_TX, REG_RCAL_START);
180 udelay(400);
181
182 /* Make sure PHY PLL is ready */
183 loops = 0;
184 while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) {
185 mdelay(1);
186 loops++;
187 if (loops > 100) {
188 printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",
189 u2o_get(base, UTMI_PLL));
190 break;
191 }
192 }
193
194 if (cpu_is_pxa168()) {
195 u2o_set(base, UTMI_RESERVE, 1 << 5);
196 /* Turn on UTMI PHY OTG extension */
197 u2o_write(base, UTMI_OTG_ADDON, 1);
198 }
199
200 return 0;
201}
202
203static int usb_phy_deinit_internal(void __iomem *base)
204{
205 pr_info("Deinit usb phy!!!\n");
206
207 if (cpu_is_pxa168())
208 u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);
209
210 u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);
211 u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);
212 u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);
213 u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
214 u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
215
216 return 0;
217}
218
219int pxa_usb_phy_init(void __iomem *phy_reg)
220{
221 mutex_lock(&phy_lock);
222 if (phy_init_cnt++ == 0)
223 usb_phy_init_internal(phy_reg);
224 mutex_unlock(&phy_lock);
225 return 0;
226}
227
228void pxa_usb_phy_deinit(void __iomem *phy_reg)
229{
230 WARN_ON(phy_init_cnt == 0);
231
232 mutex_lock(&phy_lock);
233 if (--phy_init_cnt == 0)
234 usb_phy_deinit_internal(phy_reg);
235 mutex_unlock(&phy_lock);
236}
237#endif
238#endif
239#endif
240
241#ifdef CONFIG_USB_SUPPORT
242static u64 usb_dma_mask = ~(u32)0;
243
244#ifdef CONFIG_USB_MV_UDC
245struct resource pxa168_u2o_resources[] = {
246 /* regbase */
247 [0] = {
248 .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
249 .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
250 .flags = IORESOURCE_MEM,
251 .name = "capregs",
252 },
253 /* phybase */
254 [1] = {
255 .start = PXA168_U2O_PHYBASE,
256 .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
257 .flags = IORESOURCE_MEM,
258 .name = "phyregs",
259 },
260 [2] = {
261 .start = IRQ_PXA168_USB1,
262 .end = IRQ_PXA168_USB1,
263 .flags = IORESOURCE_IRQ,
264 },
265};
266
267struct platform_device pxa168_device_u2o = {
268 .name = "mv-udc",
269 .id = -1,
270 .resource = pxa168_u2o_resources,
271 .num_resources = ARRAY_SIZE(pxa168_u2o_resources),
272 .dev = {
273 .dma_mask = &usb_dma_mask,
274 .coherent_dma_mask = 0xffffffff,
275 }
276};
277#endif /* CONFIG_USB_MV_UDC */
278
279#ifdef CONFIG_USB_EHCI_MV_U2O
280struct resource pxa168_u2oehci_resources[] = {
281 /* regbase */
282 [0] = {
283 .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
284 .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
285 .flags = IORESOURCE_MEM,
286 .name = "capregs",
287 },
288 /* phybase */
289 [1] = {
290 .start = PXA168_U2O_PHYBASE,
291 .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
292 .flags = IORESOURCE_MEM,
293 .name = "phyregs",
294 },
295 [2] = {
296 .start = IRQ_PXA168_USB1,
297 .end = IRQ_PXA168_USB1,
298 .flags = IORESOURCE_IRQ,
299 },
300};
301
302struct platform_device pxa168_device_u2oehci = {
303 .name = "pxa-u2oehci",
304 .id = -1,
305 .dev = {
306 .dma_mask = &usb_dma_mask,
307 .coherent_dma_mask = 0xffffffff,
308 },
309
310 .num_resources = ARRAY_SIZE(pxa168_u2oehci_resources),
311 .resource = pxa168_u2oehci_resources,
312};
313#endif
314
315#if defined(CONFIG_USB_MV_OTG)
316struct resource pxa168_u2ootg_resources[] = {
317 /* regbase */
318 [0] = {
319 .start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
320 .end = PXA168_U2O_REGBASE + USB_REG_RANGE,
321 .flags = IORESOURCE_MEM,
322 .name = "capregs",
323 },
324 /* phybase */
325 [1] = {
326 .start = PXA168_U2O_PHYBASE,
327 .end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
328 .flags = IORESOURCE_MEM,
329 .name = "phyregs",
330 },
331 [2] = {
332 .start = IRQ_PXA168_USB1,
333 .end = IRQ_PXA168_USB1,
334 .flags = IORESOURCE_IRQ,
335 },
336};
337
338struct platform_device pxa168_device_u2ootg = {
339 .name = "mv-otg",
340 .id = -1,
341 .dev = {
342 .dma_mask = &usb_dma_mask,
343 .coherent_dma_mask = 0xffffffff,
344 },
345
346 .num_resources = ARRAY_SIZE(pxa168_u2ootg_resources),
347 .resource = pxa168_u2ootg_resources,
348};
349#endif /* CONFIG_USB_MV_OTG */
350
351#endif
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
index d0ec7dae88e..21217ef11b6 100644
--- a/arch/arm/mach-mmp/include/mach/devices.h
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -50,4 +50,7 @@ struct pxa_device_desc mmp2_device_##_name __initdata = { \
50} 50}
51 51
52extern int pxa_register_device(struct pxa_device_desc *, void *, size_t); 52extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
53extern int pxa_usb_phy_init(void __iomem *phy_reg);
54extern void pxa_usb_phy_deinit(void __iomem *phy_reg);
55
53#endif /* __MACH_DEVICE_H */ 56#endif /* __MACH_DEVICE_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index dc03d580a06..09dcd6e2b6a 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -16,6 +16,7 @@ extern void pxa168_clear_keypad_wakeup(void);
16#include <plat/pxa27x_keypad.h> 16#include <plat/pxa27x_keypad.h>
17#include <mach/cputype.h> 17#include <mach/cputype.h>
18#include <linux/pxa168_eth.h> 18#include <linux/pxa168_eth.h>
19#include <linux/platform_data/mv_usb.h>
19 20
20extern struct pxa_device_desc pxa168_device_uart1; 21extern struct pxa_device_desc pxa168_device_uart1;
21extern struct pxa_device_desc pxa168_device_uart2; 22extern struct pxa_device_desc pxa168_device_uart2;
@@ -36,12 +37,9 @@ extern struct pxa_device_desc pxa168_device_fb;
36extern struct pxa_device_desc pxa168_device_keypad; 37extern struct pxa_device_desc pxa168_device_keypad;
37extern struct pxa_device_desc pxa168_device_eth; 38extern struct pxa_device_desc pxa168_device_eth;
38 39
39struct pxa168_usb_pdata {
40 /* If NULL, default phy init routine for PXA168 would be called */
41 int (*phy_init)(void __iomem *usb_phy_reg_base);
42};
43/* pdata can be NULL */ 40/* pdata can be NULL */
44int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); 41extern int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata);
42
45 43
46extern struct platform_device pxa168_device_gpio; 44extern struct platform_device pxa168_device_gpio;
47 45
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index e2e1f1e5e12..793634c837e 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -20,6 +20,9 @@ extern struct pxa_device_desc pxa910_device_pwm2;
20extern struct pxa_device_desc pxa910_device_pwm3; 20extern struct pxa_device_desc pxa910_device_pwm3;
21extern struct pxa_device_desc pxa910_device_pwm4; 21extern struct pxa_device_desc pxa910_device_pwm4;
22extern struct pxa_device_desc pxa910_device_nand; 22extern struct pxa_device_desc pxa910_device_nand;
23extern struct platform_device pxa168_device_u2o;
24extern struct platform_device pxa168_device_u2ootg;
25extern struct platform_device pxa168_device_u2oehci;
23 26
24extern struct platform_device pxa910_device_gpio; 27extern struct platform_device pxa910_device_gpio;
25extern struct platform_device pxa910_device_rtc; 28extern struct platform_device pxa910_device_rtc;
diff --git a/arch/arm/mach-mmp/include/mach/regs-usb.h b/arch/arm/mach-mmp/include/mach/regs-usb.h
new file mode 100644
index 00000000000..b047bf48750
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-usb.h
@@ -0,0 +1,253 @@
1/*
2 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __ASM_ARCH_REGS_USB_H
11#define __ASM_ARCH_REGS_USB_H
12
13#define PXA168_U2O_REGBASE (0xd4208000)
14#define PXA168_U2O_PHYBASE (0xd4207000)
15
16#define PXA168_U2H_REGBASE (0xd4209000)
17#define PXA168_U2H_PHYBASE (0xd4206000)
18
19#define MMP3_HSIC1_REGBASE (0xf0001000)
20#define MMP3_HSIC1_PHYBASE (0xf0001800)
21
22#define MMP3_HSIC2_REGBASE (0xf0002000)
23#define MMP3_HSIC2_PHYBASE (0xf0002800)
24
25#define MMP3_FSIC_REGBASE (0xf0003000)
26#define MMP3_FSIC_PHYBASE (0xf0003800)
27
28
29#define USB_REG_RANGE (0x1ff)
30#define USB_PHY_RANGE (0xff)
31
32/* registers */
33#define U2x_CAPREGS_OFFSET 0x100
34
35/* phy regs */
36#define UTMI_REVISION 0x0
37#define UTMI_CTRL 0x4
38#define UTMI_PLL 0x8
39#define UTMI_TX 0xc
40#define UTMI_RX 0x10
41#define UTMI_IVREF 0x14
42#define UTMI_T0 0x18
43#define UTMI_T1 0x1c
44#define UTMI_T2 0x20
45#define UTMI_T3 0x24
46#define UTMI_T4 0x28
47#define UTMI_T5 0x2c
48#define UTMI_RESERVE 0x30
49#define UTMI_USB_INT 0x34
50#define UTMI_DBG_CTL 0x38
51#define UTMI_OTG_ADDON 0x3c
52
53/* For UTMICTRL Register */
54#define UTMI_CTRL_USB_CLK_EN (1 << 31)
55/* pxa168 */
56#define UTMI_CTRL_SUSPEND_SET1 (1 << 30)
57#define UTMI_CTRL_SUSPEND_SET2 (1 << 29)
58#define UTMI_CTRL_RXBUF_PDWN (1 << 24)
59#define UTMI_CTRL_TXBUF_PDWN (1 << 11)
60
61#define UTMI_CTRL_INPKT_DELAY_SHIFT 30
62#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28
63#define UTMI_CTRL_PU_REF_SHIFT 20
64#define UTMI_CTRL_ARC_PULLDN_SHIFT 12
65#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1
66#define UTMI_CTRL_PWR_UP_SHIFT 0
67
68/* For UTMI_PLL Register */
69#define UTMI_PLL_PLLCALI12_SHIFT 29
70#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29)
71
72#define UTMI_PLL_PLLVDD18_SHIFT 27
73#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27)
74
75#define UTMI_PLL_PLLVDD12_SHIFT 25
76#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25)
77
78#define UTMI_PLL_CLK_BLK_EN_SHIFT 24
79#define CLK_BLK_EN (0x1 << 24)
80#define PLL_READY (0x1 << 23)
81#define KVCO_EXT (0x1 << 22)
82#define VCOCAL_START (0x1 << 21)
83
84#define UTMI_PLL_KVCO_SHIFT 15
85#define UTMI_PLL_KVCO_MASK (0x7 << 15)
86
87#define UTMI_PLL_ICP_SHIFT 12
88#define UTMI_PLL_ICP_MASK (0x7 << 12)
89
90#define UTMI_PLL_FBDIV_SHIFT 4
91#define UTMI_PLL_FBDIV_MASK (0xFF << 4)
92
93#define UTMI_PLL_REFDIV_SHIFT 0
94#define UTMI_PLL_REFDIV_MASK (0xF << 0)
95
96/* For UTMI_TX Register */
97#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27
98#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27)
99
100#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26
101#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26)
102
103#define UTMI_TX_TXVDD12_SHIFT 22
104#define UTMI_TX_TXVDD12_MASK (0x3 << 22)
105
106#define UTMI_TX_CK60_PHSEL_SHIFT 17
107#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17)
108
109#define UTMI_TX_IMPCAL_VTH_SHIFT 14
110#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14)
111
112#define REG_RCAL_START (0x1 << 12)
113
114#define UTMI_TX_LOW_VDD_EN_SHIFT 11
115
116#define UTMI_TX_AMP_SHIFT 0
117#define UTMI_TX_AMP_MASK (0x7 << 0)
118
119/* For UTMI_RX Register */
120#define UTMI_REG_SQ_LENGTH_SHIFT 15
121#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15)
122
123#define UTMI_RX_SQ_THRESH_SHIFT 4
124#define UTMI_RX_SQ_THRESH_MASK (0xf << 4)
125
126#define UTMI_OTG_ADDON_OTG_ON (1 << 0)
127
128/* For MMP3 USB Phy */
129#define USB2_PLL_REG0 0x4
130#define USB2_PLL_REG1 0x8
131#define USB2_TX_REG0 0x10
132#define USB2_TX_REG1 0x14
133#define USB2_TX_REG2 0x18
134#define USB2_RX_REG0 0x20
135#define USB2_RX_REG1 0x24
136#define USB2_RX_REG2 0x28
137#define USB2_ANA_REG0 0x30
138#define USB2_ANA_REG1 0x34
139#define USB2_ANA_REG2 0x38
140#define USB2_DIG_REG0 0x3C
141#define USB2_DIG_REG1 0x40
142#define USB2_DIG_REG2 0x44
143#define USB2_DIG_REG3 0x48
144#define USB2_TEST_REG0 0x4C
145#define USB2_TEST_REG1 0x50
146#define USB2_TEST_REG2 0x54
147#define USB2_CHARGER_REG0 0x58
148#define USB2_OTG_REG0 0x5C
149#define USB2_PHY_MON0 0x60
150#define USB2_RESETVE_REG0 0x64
151#define USB2_ICID_REG0 0x78
152#define USB2_ICID_REG1 0x7C
153
154/* USB2_PLL_REG0 */
155/* This is for Ax stepping */
156#define USB2_PLL_FBDIV_SHIFT_MMP3 0
157#define USB2_PLL_FBDIV_MASK_MMP3 (0xFF << 0)
158
159#define USB2_PLL_REFDIV_SHIFT_MMP3 8
160#define USB2_PLL_REFDIV_MASK_MMP3 (0xF << 8)
161
162#define USB2_PLL_VDD12_SHIFT_MMP3 12
163#define USB2_PLL_VDD18_SHIFT_MMP3 14
164
165/* This is for B0 stepping */
166#define USB2_PLL_FBDIV_SHIFT_MMP3_B0 0
167#define USB2_PLL_REFDIV_SHIFT_MMP3_B0 9
168#define USB2_PLL_VDD18_SHIFT_MMP3_B0 14
169#define USB2_PLL_FBDIV_MASK_MMP3_B0 0x01FF
170#define USB2_PLL_REFDIV_MASK_MMP3_B0 0x3E00
171
172#define USB2_PLL_CAL12_SHIFT_MMP3 0
173#define USB2_PLL_CALI12_MASK_MMP3 (0x3 << 0)
174
175#define USB2_PLL_VCOCAL_START_SHIFT_MMP3 2
176
177#define USB2_PLL_KVCO_SHIFT_MMP3 4
178#define USB2_PLL_KVCO_MASK_MMP3 (0x7<<4)
179
180#define USB2_PLL_ICP_SHIFT_MMP3 8
181#define USB2_PLL_ICP_MASK_MMP3 (0x7<<8)
182
183#define USB2_PLL_LOCK_BYPASS_SHIFT_MMP3 12
184
185#define USB2_PLL_PU_PLL_SHIFT_MMP3 13
186#define USB2_PLL_PU_PLL_MASK (0x1 << 13)
187
188#define USB2_PLL_READY_MASK_MMP3 (0x1 << 15)
189
190/* USB2_TX_REG0 */
191#define USB2_TX_IMPCAL_VTH_SHIFT_MMP3 8
192#define USB2_TX_IMPCAL_VTH_MASK_MMP3 (0x7 << 8)
193
194#define USB2_TX_RCAL_START_SHIFT_MMP3 13
195
196/* USB2_TX_REG1 */
197#define USB2_TX_CK60_PHSEL_SHIFT_MMP3 0
198#define USB2_TX_CK60_PHSEL_MASK_MMP3 (0xf << 0)
199
200#define USB2_TX_AMP_SHIFT_MMP3 4
201#define USB2_TX_AMP_MASK_MMP3 (0x7 << 4)
202
203#define USB2_TX_VDD12_SHIFT_MMP3 8
204#define USB2_TX_VDD12_MASK_MMP3 (0x3 << 8)
205
206/* USB2_TX_REG2 */
207#define USB2_TX_DRV_SLEWRATE_SHIFT 10
208
209/* USB2_RX_REG0 */
210#define USB2_RX_SQ_THRESH_SHIFT_MMP3 4
211#define USB2_RX_SQ_THRESH_MASK_MMP3 (0xf << 4)
212
213#define USB2_RX_SQ_LENGTH_SHIFT_MMP3 10
214#define USB2_RX_SQ_LENGTH_MASK_MMP3 (0x3 << 10)
215
216/* USB2_ANA_REG1*/
217#define USB2_ANA_PU_ANA_SHIFT_MMP3 14
218
219/* USB2_OTG_REG0 */
220#define USB2_OTG_PU_OTG_SHIFT_MMP3 3
221
222/* fsic registers */
223#define FSIC_MISC 0x4
224#define FSIC_INT 0x28
225#define FSIC_CTRL 0x30
226
227/* HSIC registers */
228#define HSIC_PAD_CTRL 0x4
229
230#define HSIC_CTRL 0x8
231#define HSIC_CTRL_HSIC_ENABLE (1<<7)
232#define HSIC_CTRL_PLL_BYPASS (1<<4)
233
234#define TEST_GRP_0 0xc
235#define TEST_GRP_1 0x10
236
237#define HSIC_INT 0x14
238#define HSIC_INT_READY_INT_EN (1<<10)
239#define HSIC_INT_CONNECT_INT_EN (1<<9)
240#define HSIC_INT_CORE_INT_EN (1<<8)
241#define HSIC_INT_HS_READY (1<<2)
242#define HSIC_INT_CONNECT (1<<1)
243#define HSIC_INT_CORE (1<<0)
244
245#define HSIC_CONFIG 0x18
246#define USBHSIC_CTRL 0x20
247
248#define HSIC_USB_CTRL 0x28
249#define HSIC_USB_CTRL_CLKEN 1
250#define HSIC_USB_CLK_PHY 0x0
251#define HSIC_USB_CLK_PMU 0x1
252
253#endif /* __ASM_ARCH_PXA_U2O_H */
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index b24d2c32cba..62d787c3447 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -14,6 +14,7 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/platform_data/mv_usb.h>
17 18
18#include <asm/mach/time.h> 19#include <asm/mach/time.h>
19#include <asm/system_misc.h> 20#include <asm/system_misc.h>
@@ -27,6 +28,7 @@
27#include <mach/mfp.h> 28#include <mach/mfp.h>
28#include <linux/dma-mapping.h> 29#include <linux/dma-mapping.h>
29#include <mach/pxa168.h> 30#include <mach/pxa168.h>
31#include <mach/regs-usb.h>
30 32
31#include "common.h" 33#include "common.h"
32#include "clock.h" 34#include "clock.h"
@@ -93,7 +95,7 @@ static struct clk_lookup pxa168_clkregs[] = {
93 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL), 95 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
94 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), 96 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
95 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), 97 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
96 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), 98 INIT_CLKREG(&clk_usb, NULL, "PXA168-USBCLK"),
97 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL), 99 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
98}; 100};
99 101
@@ -184,17 +186,17 @@ struct platform_device pxa168_device_gpio = {
184struct resource pxa168_usb_host_resources[] = { 186struct resource pxa168_usb_host_resources[] = {
185 /* USB Host conroller register base */ 187 /* USB Host conroller register base */
186 [0] = { 188 [0] = {
187 .start = 0xd4209000, 189 .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
188 .end = 0xd4209000 + 0x200, 190 .end = PXA168_U2H_REGBASE + USB_REG_RANGE,
189 .flags = IORESOURCE_MEM, 191 .flags = IORESOURCE_MEM,
190 .name = "pxa168-usb-host", 192 .name = "capregs",
191 }, 193 },
192 /* USB PHY register base */ 194 /* USB PHY register base */
193 [1] = { 195 [1] = {
194 .start = 0xd4206000, 196 .start = PXA168_U2H_PHYBASE,
195 .end = 0xd4206000 + 0xff, 197 .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
196 .flags = IORESOURCE_MEM, 198 .flags = IORESOURCE_MEM,
197 .name = "pxa168-usb-phy", 199 .name = "phyregs",
198 }, 200 },
199 [2] = { 201 [2] = {
200 .start = IRQ_PXA168_USB2, 202 .start = IRQ_PXA168_USB2,
@@ -205,7 +207,7 @@ struct resource pxa168_usb_host_resources[] = {
205 207
206static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32); 208static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
207struct platform_device pxa168_device_usb_host = { 209struct platform_device pxa168_device_usb_host = {
208 .name = "pxa168-ehci", 210 .name = "pxa-sph",
209 .id = -1, 211 .id = -1,
210 .dev = { 212 .dev = {
211 .dma_mask = &pxa168_usb_host_dmamask, 213 .dma_mask = &pxa168_usb_host_dmamask,
@@ -216,7 +218,7 @@ struct platform_device pxa168_device_usb_host = {
216 .resource = pxa168_usb_host_resources, 218 .resource = pxa168_usb_host_resources,
217}; 219};
218 220
219int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata) 221int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
220{ 222{
221 pxa168_device_usb_host.dev.platform_data = pdata; 223 pxa168_device_usb_host.dev.platform_data = pdata;
222 return platform_device_register(&pxa168_device_usb_host); 224 return platform_device_register(&pxa168_device_usb_host);
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 43f8bcc29b6..6da52e9f2bd 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -109,7 +109,7 @@ static struct clk_lookup pxa910_clkregs[] = {
109 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 109 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
110 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 110 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
111 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL), 111 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
112 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), 112 INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"),
113 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL), 113 INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
114}; 114};
115 115
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index e8cf5ea1526..7a7de2b12a6 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -18,6 +18,7 @@
18#include <linux/i2c/pca953x.h> 18#include <linux/i2c/pca953x.h>
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/mfd/88pm860x.h> 20#include <linux/mfd/88pm860x.h>
21#include <linux/platform_data/mv_usb.h>
21 22
22#include <asm/mach-types.h> 23#include <asm/mach-types.h>
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -26,6 +27,7 @@
26#include <mach/mfp-pxa910.h> 27#include <mach/mfp-pxa910.h>
27#include <mach/pxa910.h> 28#include <mach/pxa910.h>
28#include <mach/irqs.h> 29#include <mach/irqs.h>
30#include <mach/regs-usb.h>
29 31
30#include "common.h" 32#include "common.h"
31 33
@@ -155,6 +157,26 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
155 }, 157 },
156}; 158};
157 159
160#ifdef CONFIG_USB_SUPPORT
161#if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)
162
163static char *pxa910_usb_clock_name[] = {
164 [0] = "U2OCLK",
165};
166
167static struct mv_usb_platform_data ttc_usb_pdata = {
168 .clknum = 1,
169 .clkname = pxa910_usb_clock_name,
170 .vbus = NULL,
171 .mode = MV_USB_MODE_OTG,
172 .otg_force_a_bus_req = 1,
173 .phy_init = pxa_usb_phy_init,
174 .phy_deinit = pxa_usb_phy_deinit,
175 .set_vbus = NULL,
176};
177#endif
178#endif
179
158static void __init ttc_dkb_init(void) 180static void __init ttc_dkb_init(void)
159{ 181{
160 mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config)); 182 mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config));
@@ -165,6 +187,21 @@ static void __init ttc_dkb_init(void)
165 /* off-chip devices */ 187 /* off-chip devices */
166 pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info)); 188 pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info));
167 platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices)); 189 platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));
190
191#ifdef CONFIG_USB_MV_UDC
192 pxa168_device_u2o.dev.platform_data = &ttc_usb_pdata;
193 platform_device_register(&pxa168_device_u2o);
194#endif
195
196#ifdef CONFIG_USB_EHCI_MV_U2O
197 pxa168_device_u2oehci.dev.platform_data = &ttc_usb_pdata;
198 platform_device_register(&pxa168_device_u2oehci);
199#endif
200
201#ifdef CONFIG_USB_MV_OTG
202 pxa168_device_u2ootg.dev.platform_data = &ttc_usb_pdata;
203 platform_device_register(&pxa168_device_u2ootg);
204#endif
168} 205}
169 206
170MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform") 207MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 16:05:01 -0500