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authorEric Miao <eric.miao@marvell.com>2009-01-20 01:15:18 -0500
committerEric Miao <eric.miao@marvell.com>2009-03-22 22:11:34 -0400
commit49cbe78637eb0503f45fc9b556ec08918a616534 (patch)
tree96de29959c5ef512d8f1e0bea7eae2245b7cc3f9 /arch/arm/mach-mmp/include
parentf8dec04d33b94a4cfa9358fd9666c01480bb164d (diff)
[ARM] pxa: add base support for Marvell's PXA168 processor line
"""The Marvell® PXA168 processor is the first in a family of application processors targeted at mass market opportunities in computing and consumer devices. It balances high computing and multimedia performance with low power consumption to support extended battery life, and includes a wealth of integrated peripherals to reduce overall BOM cost .... """ See http://www.marvell.com/featured/pxa168.jsp for more information. 1. Marvell Mohawk core is a hybrid of xscale3 and its own ARM core, there are many enhancements like instructions for flushing the whole D-cache, and so on 2. Clock reuses Russell's common clkdev, and added the basic support for UART1/2. 3. Devices are a bit different from the 'mach-pxa' way, the platform devices are now dynamically allocated only when necessary (i.e. when pxa_register_device() is called). Description for each device are stored in an array of 'struct pxa_device_desc'. Now that: a. this array of device description is marked with __initdata and can be freed up system is fully up b. which means board code has to add all needed devices early in his initializing function c. platform specific data can now be marked as __initdata since they are allocated and copied by platform_device_add_data() 4. only the basic UART1/2/3 are added, more devices will come later. Signed-off-by: Jason Chagas <chagas@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'arch/arm/mach-mmp/include')
-rw-r--r--arch/arm/mach-mmp/include/mach/addr-map.h34
-rw-r--r--arch/arm/mach-mmp/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-mmp/include/mach/cputype.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/debug-macro.S23
-rw-r--r--arch/arm/mach-mmp/include/mach/devices.h27
-rw-r--r--arch/arm/mach-mmp/include/mach/dma.h13
-rw-r--r--arch/arm/mach-mmp/include/mach/entry-macro.S25
-rw-r--r--arch/arm/mach-mmp/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/io.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h58
-rw-r--r--arch/arm/mach-mmp/include/mach/memory.h14
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h23
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h53
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h36
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-icu.h31
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-timers.h44
-rw-r--r--arch/arm/mach-mmp/include/mach/system.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/timex.h9
-rw-r--r--arch/arm/mach-mmp/include/mach/uncompress.h41
-rw-r--r--arch/arm/mach-mmp/include/mach/vmalloc.h5
20 files changed, 510 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
new file mode 100644
index 00000000000..3254089a644
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -0,0 +1,34 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/addr-map.h
3 *
4 * Common address map definitions
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_ADDR_MAP_H
12#define __ASM_MACH_ADDR_MAP_H
13
14/* APB - Application Subsystem Peripheral Bus
15 *
16 * NOTE: the DMA controller registers are actually on the AXI fabric #1
17 * slave port to AHB/APB bridge, due to its close relationship to those
18 * peripherals on APB, let's count it into the ABP mapping area.
19 */
20#define APB_PHYS_BASE 0xd4000000
21#define APB_VIRT_BASE 0xfe000000
22#define APB_PHYS_SIZE 0x00200000
23
24#define AXI_PHYS_BASE 0xd4200000
25#define AXI_VIRT_BASE 0xfe200000
26#define AXI_PHYS_SIZE 0x00200000
27
28/* Static Memory Controller - Chip Select 0 and 1 */
29#define SMC_CS0_PHYS_BASE 0x80000000
30#define SMC_CS0_PHYS_SIZE 0x10000000
31#define SMC_CS1_PHYS_BASE 0x90000000
32#define SMC_CS1_PHYS_SIZE 0x10000000
33
34#endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-mmp/include/mach/clkdev.h b/arch/arm/mach-mmp/include/mach/clkdev.h
new file mode 100644
index 00000000000..2fb354e54e0
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif /* __ASM_MACH_CLKDEV_H */
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
new file mode 100644
index 00000000000..4ceed7a5075
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_MACH_CPUTYPE_H
2#define __ASM_MACH_CPUTYPE_H
3
4#include <asm/cputype.h>
5
6/*
7 * CPU Stepping OLD_ID CPU_ID CHIP_ID
8 *
9 * PXA168 A0 0x41159263 0x56158400 0x00A0A333
10 */
11
12#ifdef CONFIG_CPU_PXA168
13# define __cpu_is_pxa168(id) \
14 ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x84; })
15#else
16# define __cpu_is_pxa168(id) (0)
17#endif
18
19#define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); })
20
21#endif /* __ASM_MACH_CPUTYPE_H */
diff --git a/arch/arm/mach-mmp/include/mach/debug-macro.S b/arch/arm/mach-mmp/include/mach/debug-macro.S
new file mode 100644
index 00000000000..a850f87de51
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/debug-macro.S
@@ -0,0 +1,23 @@
1/* arch/arm/mach-mmp/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copied from arch/arm/mach-pxa/include/mach/debug.S
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <mach/addr-map.h>
13
14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled?
17 ldreq \rx, =APB_PHYS_BASE @ physical
18 ldrne \rx, =APB_VIRT_BASE @ virtual
19 orr \rx, \rx, #0x00017000
20 .endm
21
22#define UART_SHIFT 2
23#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
new file mode 100644
index 00000000000..bc03388d5fd
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -0,0 +1,27 @@
1#include <linux/types.h>
2
3#define MAX_RESOURCE_DMA 2
4
5/* structure for describing the on-chip devices */
6struct pxa_device_desc {
7 const char *dev_name;
8 const char *drv_name;
9 int id;
10 int irq;
11 unsigned long start;
12 unsigned long size;
13 int dma[MAX_RESOURCE_DMA];
14};
15
16#define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
17struct pxa_device_desc pxa168_device_##_name __initdata = { \
18 .dev_name = "pxa168-" #_name, \
19 .drv_name = _drv, \
20 .id = _id, \
21 .irq = IRQ_PXA168_##_irq, \
22 .start = _start, \
23 .size = _size, \
24 .dma = { _dma }, \
25};
26
27extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
diff --git a/arch/arm/mach-mmp/include/mach/dma.h b/arch/arm/mach-mmp/include/mach/dma.h
new file mode 100644
index 00000000000..1d6914544da
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/dma.h
@@ -0,0 +1,13 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/dma.h
3 */
4
5#ifndef __ASM_MACH_DMA_H
6#define __ASM_MACH_DMA_H
7
8#include <mach/addr-map.h>
9
10#define DMAC_REGS_VIRT (APB_VIRT_BASE + 0x00000)
11
12#include <plat/dma.h>
13#endif /* __ASM_MACH_DMA_H */
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S
new file mode 100644
index 00000000000..6d3cd35478b
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/entry-macro.S
@@ -0,0 +1,25 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/entry-macro.S
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <mach/regs-icu.h>
10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =ICU_AP_IRQ_SEL_INT_NUM
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22 ldr \tmp, [\base, #0]
23 and \irqnr, \tmp, #0x3f
24 tst \tmp, #(1 << 6)
25 .endm
diff --git a/arch/arm/mach-mmp/include/mach/hardware.h b/arch/arm/mach-mmp/include/mach/hardware.h
new file mode 100644
index 00000000000..99264a5ce5e
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/hardware.h
@@ -0,0 +1,4 @@
1#ifndef __ASM_MACH_HARDWARE_H
2#define __ASM_MACH_HARDWARE_H
3
4#endif /* __ASM_MACH_HARDWARE_H */
diff --git a/arch/arm/mach-mmp/include/mach/io.h b/arch/arm/mach-mmp/include/mach/io.h
new file mode 100644
index 00000000000..e7adf3d012c
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/io.h
@@ -0,0 +1,21 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/io.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_IO_H
10#define __ASM_MACH_IO_H
11
12#define IO_SPACE_LIMIT 0xffffffff
13
14/*
15 * We don't actually have real ISA nor PCI buses, but there is so many
16 * drivers out there that might just work if we fake them...
17 */
18#define __io(a) __typesafe_io(a)
19#define __mem_pci(a) (a)
20
21#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
new file mode 100644
index 00000000000..91ecb3fbca0
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -0,0 +1,58 @@
1#ifndef __ASM_MACH_IRQS_H
2#define __ASM_MACH_IRQS_H
3
4/*
5 * Interrupt numbers for PXA168
6 */
7#define IRQ_PXA168_NONE (-1)
8#define IRQ_PXA168_SSP3 0
9#define IRQ_PXA168_SSP2 1
10#define IRQ_PXA168_SSP1 2
11#define IRQ_PXA168_SSP0 3
12#define IRQ_PXA168_PMIC_INT 4
13#define IRQ_PXA168_RTC_INT 5
14#define IRQ_PXA168_RTC_ALARM 6
15#define IRQ_PXA168_TWSI0 7
16#define IRQ_PXA168_GPU 8
17#define IRQ_PXA168_KEYPAD 9
18#define IRQ_PXA168_ONEWIRE 12
19#define IRQ_PXA168_TIMER1 13
20#define IRQ_PXA168_TIMER2 14
21#define IRQ_PXA168_TIMER3 15
22#define IRQ_PXA168_CMU 16
23#define IRQ_PXA168_SSP4 17
24#define IRQ_PXA168_MSP_WAKEUP 19
25#define IRQ_PXA168_CF_WAKEUP 20
26#define IRQ_PXA168_XD_WAKEUP 21
27#define IRQ_PXA168_MFU 22
28#define IRQ_PXA168_MSP 23
29#define IRQ_PXA168_CF 24
30#define IRQ_PXA168_XD 25
31#define IRQ_PXA168_DDR_INT 26
32#define IRQ_PXA168_UART1 27
33#define IRQ_PXA168_UART2 28
34#define IRQ_PXA168_WDT 35
35#define IRQ_PXA168_FRQ_CHANGE 38
36#define IRQ_PXA168_SDH1 39
37#define IRQ_PXA168_SDH2 40
38#define IRQ_PXA168_LCD 41
39#define IRQ_PXA168_CI 42
40#define IRQ_PXA168_USB1 44
41#define IRQ_PXA168_NAND 45
42#define IRQ_PXA168_HIFI_DMA 46
43#define IRQ_PXA168_DMA_INT0 47
44#define IRQ_PXA168_DMA_INT1 48
45#define IRQ_PXA168_GPIOX 49
46#define IRQ_PXA168_USB2 51
47#define IRQ_PXA168_AC97 57
48#define IRQ_PXA168_TWSI1 58
49#define IRQ_PXA168_PMU 60
50#define IRQ_PXA168_SM_INT 63
51
52#define IRQ_GPIO_START 64
53#define IRQ_GPIO_NUM 128
54#define IRQ_GPIO(x) (IRQ_GPIO_START + (x))
55
56#define NR_IRQS (IRQ_GPIO_START + IRQ_GPIO_NUM)
57
58#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/include/mach/memory.h b/arch/arm/mach-mmp/include/mach/memory.h
new file mode 100644
index 00000000000..bdb21d70714
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/memory.h
@@ -0,0 +1,14 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/memory.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_MEMORY_H
10#define __ASM_MACH_MEMORY_H
11
12#define PHYS_OFFSET UL(0x00000000)
13
14#endif /* __ASM_MACH_MEMORY_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
new file mode 100644
index 00000000000..ef0a8a2076e
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_MACH_PXA168_H
2#define __ASM_MACH_PXA168_H
3
4#include <mach/devices.h>
5
6extern struct pxa_device_desc pxa168_device_uart1;
7extern struct pxa_device_desc pxa168_device_uart2;
8
9static inline int pxa168_add_uart(int id)
10{
11 struct pxa_device_desc *d = NULL;
12
13 switch (id) {
14 case 1: d = &pxa168_device_uart1; break;
15 case 2: d = &pxa168_device_uart2; break;
16 }
17
18 if (d == NULL)
19 return -EINVAL;
20
21 return pxa_register_device(d, NULL, 0);
22}
23#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
new file mode 100644
index 00000000000..e0ffae59487
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -0,0 +1,53 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-apbc.h
3 *
4 * Application Peripheral Bus Clock Unit
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_APBC_H
12#define __ASM_MACH_REGS_APBC_H
13
14#include <mach/addr-map.h>
15
16#define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000)
17#define APBC_REG(x) (APBC_VIRT_BASE + (x))
18
19/*
20 * APB clock register offsets for PXA168
21 */
22#define APBC_PXA168_UART1 APBC_REG(0x000)
23#define APBC_PXA168_UART2 APBC_REG(0x004)
24#define APBC_PXA168_GPIO APBC_REG(0x008)
25#define APBC_PXA168_PWM0 APBC_REG(0x00c)
26#define APBC_PXA168_PWM1 APBC_REG(0x010)
27#define APBC_PXA168_SSP1 APBC_REG(0x01c)
28#define APBC_PXA168_SSP2 APBC_REG(0x020)
29#define APBC_PXA168_RTC APBC_REG(0x028)
30#define APBC_PXA168_TWSI0 APBC_REG(0x02c)
31#define APBC_PXA168_KPC APBC_REG(0x030)
32#define APBC_PXA168_TIMERS APBC_REG(0x034)
33#define APBC_PXA168_AIB APBC_REG(0x03c)
34#define APBC_PXA168_SW_JTAG APBC_REG(0x040)
35#define APBC_PXA168_ONEWIRE APBC_REG(0x048)
36#define APBC_PXA168_SSP3 APBC_REG(0x04c)
37#define APBC_PXA168_ASFAR APBC_REG(0x050)
38#define APBC_PXA168_ASSAR APBC_REG(0x054)
39#define APBC_PXA168_SSP4 APBC_REG(0x058)
40#define APBC_PXA168_SSP5 APBC_REG(0x05c)
41#define APBC_PXA168_TWSI1 APBC_REG(0x06c)
42#define APBC_PXA168_UART3 APBC_REG(0x070)
43#define APBC_PXA168_AC97 APBC_REG(0x084)
44
45/* Common APB clock register bit definitions */
46#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
47#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
48#define APBC_RST (1 << 2) /* Reset Generation */
49
50/* Functional Clock Selection Mask */
51#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4)
52
53#endif /* __ASM_MACH_REGS_APBC_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
new file mode 100644
index 00000000000..91903051412
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -0,0 +1,36 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-apmu.h
3 *
4 * Application Subsystem Power Management Unit
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_APMU_H
12#define __ASM_MACH_REGS_APMU_H
13
14#include <mach/addr-map.h>
15
16#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800)
17#define APMU_REG(x) (APMU_VIRT_BASE + (x))
18
19/* Clock Reset Control */
20#define APMU_IRE APMU_REG(0x048)
21#define APMU_LCD APMU_REG(0x04c)
22#define APMU_CCIC APMU_REG(0x050)
23#define APMU_SDH0 APMU_REG(0x054)
24#define APMU_SDH1 APMU_REG(0x058)
25#define APMU_USB APMU_REG(0x05c)
26#define APMU_NAND APMU_REG(0x060)
27#define APMU_DMA APMU_REG(0x064)
28#define APMU_GEU APMU_REG(0x068)
29#define APMU_BUS APMU_REG(0x06c)
30
31#define APMU_FNCLK_EN (1 << 4)
32#define APMU_AXICLK_EN (1 << 3)
33#define APMU_FNRST_DIS (1 << 1)
34#define APMU_AXIRST_DIS (1 << 0)
35
36#endif /* __ASM_MACH_REGS_APMU_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-icu.h b/arch/arm/mach-mmp/include/mach/regs-icu.h
new file mode 100644
index 00000000000..e5f08723e0c
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-icu.h
@@ -0,0 +1,31 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-icu.h
3 *
4 * Interrupt Control Unit
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_ICU_H
12#define __ASM_MACH_ICU_H
13
14#include <mach/addr-map.h>
15
16#define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000)
17#define ICU_REG(x) (ICU_VIRT_BASE + (x))
18
19#define ICU_INT_CONF(n) ICU_REG((n) << 2)
20#define ICU_INT_CONF_AP_INT (1 << 6)
21#define ICU_INT_CONF_CP_INT (1 << 5)
22#define ICU_INT_CONF_IRQ (1 << 4)
23#define ICU_INT_CONF_MASK (0xf)
24
25#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */
26#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */
27#define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */
28#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */
29#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */
30
31#endif /* __ASM_MACH_ICU_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-timers.h b/arch/arm/mach-mmp/include/mach/regs-timers.h
new file mode 100644
index 00000000000..45589fec9fc
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-timers.h
@@ -0,0 +1,44 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-timers.h
3 *
4 * Timers Module
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_TIMERS_H
12#define __ASM_MACH_REGS_TIMERS_H
13
14#include <mach/addr-map.h>
15
16#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000)
17#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000)
18
19#define TMR_CCR (0x0000)
20#define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2))
21#define TMR_CR(n) (0x0028 + ((n) << 2))
22#define TMR_SR(n) (0x0034 + ((n) << 2))
23#define TMR_IER(n) (0x0040 + ((n) << 2))
24#define TMR_PLVR(n) (0x004c + ((n) << 2))
25#define TMR_PLCR(n) (0x0058 + ((n) << 2))
26#define TMR_WMER (0x0064)
27#define TMR_WMR (0x0068)
28#define TMR_WVR (0x006c)
29#define TMR_WSR (0x0070)
30#define TMR_ICR(n) (0x0074 + ((n) << 2))
31#define TMR_WICR (0x0080)
32#define TMR_CER (0x0084)
33#define TMR_CMR (0x0088)
34#define TMR_ILR(n) (0x008c + ((n) << 2))
35#define TMR_WCR (0x0098)
36#define TMR_WFAR (0x009c)
37#define TMR_WSAR (0x00A0)
38#define TMR_CVWR(n) (0x00A4 + ((n) << 2))
39
40#define TMR_CCR_CS_0(x) (((x) & 0x3) << 0)
41#define TMR_CCR_CS_1(x) (((x) & 0x7) << 2)
42#define TMR_CCR_CS_2(x) (((x) & 0x3) << 5)
43
44#endif /* __ASM_MACH_REGS_TIMERS_H */
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
new file mode 100644
index 00000000000..001edfefec1
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -0,0 +1,21 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/system.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_SYSTEM_H
10#define __ASM_MACH_SYSTEM_H
11
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
16
17static inline void arch_reset(char mode)
18{
19 cpu_reset(0);
20}
21#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/include/mach/timex.h b/arch/arm/mach-mmp/include/mach/timex.h
new file mode 100644
index 00000000000..6cebbd0ca8f
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/timex.h
@@ -0,0 +1,9 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/timex.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#define CLOCK_TICK_RATE 3250000
diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h
new file mode 100644
index 00000000000..c93d5fa5865
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/uncompress.h
@@ -0,0 +1,41 @@
1/*
2 * arch/arm/mach-mmp/include/mach/uncompress.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/serial_reg.h>
10#include <mach/addr-map.h>
11
12#define UART1_BASE (APB_PHYS_BASE + 0x36000)
13#define UART2_BASE (APB_PHYS_BASE + 0x17000)
14#define UART3_BASE (APB_PHYS_BASE + 0x18000)
15
16static inline void putc(char c)
17{
18 volatile unsigned long *UART = (unsigned long *)UART2_BASE;
19
20 /* UART enabled? */
21 if (!(UART[UART_IER] & UART_IER_UUE))
22 return;
23
24 while (!(UART[UART_LSR] & UART_LSR_THRE))
25 barrier();
26
27 UART[UART_TX] = c;
28}
29
30/*
31 * This does not append a newline
32 */
33static inline void flush(void)
34{
35}
36
37/*
38 * nothing to do
39 */
40#define arch_decomp_setup()
41#define arch_decomp_wdog()
diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h
new file mode 100644
index 00000000000..b60ccaf9fee
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-19 12:30:56 -0400