Added missing tegra files.HEADmaster

5 files changed, 193 insertions, 0 deletions

diff --git a/arch/arm/mach-lpc32xx/include/mach/i2c.h b/arch/arm/mach-lpc32xx/include/mach/i2c.h
new file mode 100644
index 00000000000..034dc9286bc
--- /dev/null
+++ b/arch/arm/mach-lpc32xx/include/mach/i2c.h
@@ -0,0 +1,63 @@
+/*
+ * PNX4008-specific tweaks for I2C IP3204 block
+ *
+ * Author: Vitaly Wool <vwool@ru.mvista.com>
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#ifndef __ASM_ARCH_I2C_H
+#define __ASM_ARCH_I2C_H
+
+enum {
+        mstatus_tdi = 0x00000001,
+        mstatus_afi = 0x00000002,
+        mstatus_nai = 0x00000004,
+        mstatus_drmi = 0x00000008,
+        mstatus_active = 0x00000020,
+        mstatus_scl = 0x00000040,
+        mstatus_sda = 0x00000080,
+        mstatus_rff = 0x00000100,
+        mstatus_rfe = 0x00000200,
+        mstatus_tff = 0x00000400,
+        mstatus_tfe = 0x00000800,
+};
+
+enum {
+        mcntrl_tdie = 0x00000001,
+        mcntrl_afie = 0x00000002,
+        mcntrl_naie = 0x00000004,
+        mcntrl_drmie = 0x00000008,
+        mcntrl_daie = 0x00000020,
+        mcntrl_rffie = 0x00000040,
+        mcntrl_tffie = 0x00000080,
+        mcntrl_reset = 0x00000100,
+        mcntrl_cdbmode = 0x00000400,
+};
+
+enum {
+        rw_bit = 1 << 0,
+        start_bit = 1 << 8,
+        stop_bit = 1 << 9,
+};
+
+#define I2C_REG_RX(a)   ((a)->ioaddr)           /* Rx FIFO reg (RO) */
+#define I2C_REG_TX(a)   ((a)->ioaddr)           /* Tx FIFO reg (WO) */
+#define I2C_REG_STS(a)  ((a)->ioaddr + 0x04)    /* Status reg (RO) */
+#define I2C_REG_CTL(a)  ((a)->ioaddr + 0x08)    /* Ctl reg */
+#define I2C_REG_CKL(a)  ((a)->ioaddr + 0x0c)    /* Clock divider low */
+#define I2C_REG_CKH(a)  ((a)->ioaddr + 0x10)    /* Clock divider high */
+#define I2C_REG_ADR(a)  ((a)->ioaddr + 0x14)    /* I2C address */
+#define I2C_REG_RFL(a)  ((a)->ioaddr + 0x18)    /* Rx FIFO level (RO) */
+#define I2C_REG_TFL(a)  ((a)->ioaddr + 0x1c)    /* Tx FIFO level (RO) */
+#define I2C_REG_RXB(a)  ((a)->ioaddr + 0x20)    /* Num of bytes Rx-ed (RO) */
+#define I2C_REG_TXB(a)  ((a)->ioaddr + 0x24)    /* Num of bytes Tx-ed (RO) */
+#define I2C_REG_TXS(a)  ((a)->ioaddr + 0x28)    /* Tx slave FIFO (RO) */
+#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c)    /* Tx slave FIFO level (RO) */
+
+#define I2C_CHIP_NAME           "PNX4008-I2C"
+
+#endif                          /* __ASM_ARCH_I2C_H */
diff --git a/arch/arm/mach-lpc32xx/include/mach/io.h b/arch/arm/mach-lpc32xx/include/mach/io.h
new file mode 100644
index 00000000000..9b59ab5cef8
--- /dev/null
+++ b/arch/arm/mach-lpc32xx/include/mach/io.h
@@ -0,0 +1,27 @@
+/*
+ * arch/arm/mach-lpc32xx/include/mach/io.h
+ *
+ * Author: Kevin Wells <kevin.wells@nxp.com>
+ *
+ * Copyright (C) 2010 NXP Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT  0xffffffff
+
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
+
+#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/memory.h b/arch/arm/mach-lpc32xx/include/mach/memory.h
new file mode 100644
index 00000000000..a647dd624af
--- /dev/null
+++ b/arch/arm/mach-lpc32xx/include/mach/memory.h
@@ -0,0 +1,27 @@
+/*
+ * arch/arm/mach-lpc32xx/include/mach/memory.h
+ *
+ * Author: Kevin Wells <kevin.wells@nxp.com>
+ *
+ * Copyright (C) 2010 NXP Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+/*
+ * Physical DRAM offset of bank 0
+ */
+#define PLAT_PHYS_OFFSET        UL(0x80000000)
+
+#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
new file mode 100644
index 00000000000..df3b0dea4d7
--- /dev/null
+++ b/arch/arm/mach-lpc32xx/include/mach/system.h
@@ -0,0 +1,52 @@
+/*
+ * arch/arm/mach-lpc32xx/include/mach/system.h
+ *
+ * Author: Kevin Wells <kevin.wells@nxp.com>
+ *
+ * Copyright (C) 2010 NXP Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+static void arch_idle(void)
+{
+        cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+        extern void lpc32xx_watchdog_reset(void);
+
+        switch (mode) {
+        case 's':
+        case 'h':
+                printk(KERN_CRIT "RESET: Rebooting system\n");
+
+                /* Disable interrupts */
+                local_irq_disable();
+
+                lpc32xx_watchdog_reset();
+                break;
+
+        default:
+                /* Do nothing */
+                break;
+        }
+
+        /* Wait for watchdog to reset system */
+        while (1)
+                ;
+}
+
+#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/vmalloc.h b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
new file mode 100644
index 00000000000..720fa43a60b
--- /dev/null
+++ b/arch/arm/mach-lpc32xx/include/mach/vmalloc.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-lpc32xx/include/mach/vmalloc.h
+ *
+ * Author: Kevin Wells <kevin.wells@nxp.com>
+ *
+ * Copyright (C) 2010 NXP Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END     0xF0000000UL
+
+#endif