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authorKrzysztof Hałasa <khc@pm.waw.pl>2009-04-28 13:32:55 -0400
committerKrzysztof Hałasa <khc@pm.waw.pl>2009-05-23 17:37:04 -0400
commit0771c6939484d2ebe0ec28257c2570aecd9911e0 (patch)
treee66e640986fcf3a8201a82203a1728f6d366c791 /arch/arm/mach-ixp4xx
parentd4c9e9fc97515588529e7fe48c7d5725292c6734 (diff)
IXP42x: Use __fls() in QMgr interrupt handlers.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index 6e6dc4c78a1..bfdbe4b5a3c 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -52,14 +52,15 @@ void qmgr_set_irq(unsigned int queue, int src,
52static irqreturn_t qmgr_irq1_a0(int irq, void *pdev) 52static irqreturn_t qmgr_irq1_a0(int irq, void *pdev)
53{ 53{
54 int i, ret = 0; 54 int i, ret = 0;
55 u32 en_bitmap, src, stat;
55 56
56 /* ACK - it may clear any bits so don't rely on it */ 57 /* ACK - it may clear any bits so don't rely on it */
57 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]); 58 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]);
58 59
59 for (i = 0; i < HALF_QUEUES; i++) { 60 en_bitmap = qmgr_regs->irqen[0];
60 u32 src, stat; 61 while (en_bitmap) {
61 if (!(qmgr_regs->irqen[0] & BIT(i))) 62 i = __fls(en_bitmap); /* number of the last "low" queue */
62 continue; 63 en_bitmap &= ~BIT(i);
63 src = qmgr_regs->irqsrc[i >> 3]; 64 src = qmgr_regs->irqsrc[i >> 3];
64 stat = qmgr_regs->stat1[i >> 3]; 65 stat = qmgr_regs->stat1[i >> 3];
65 if (src & 4) /* the IRQ condition is inverted */ 66 if (src & 4) /* the IRQ condition is inverted */
@@ -82,9 +83,9 @@ static irqreturn_t qmgr_irq2_a0(int irq, void *pdev)
82 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]); 83 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]);
83 84
84 req_bitmap = qmgr_regs->irqen[1] & qmgr_regs->statne_h; 85 req_bitmap = qmgr_regs->irqen[1] & qmgr_regs->statne_h;
85 for (i = 0; i < HALF_QUEUES; i++) { 86 while (req_bitmap) {
86 if (!(req_bitmap & BIT(i))) 87 i = __fls(req_bitmap); /* number of the last "high" queue */
87 continue; 88 req_bitmap &= ~BIT(i);
88 irq_handlers[HALF_QUEUES + i](irq_pdevs[HALF_QUEUES + i]); 89 irq_handlers[HALF_QUEUES + i](irq_pdevs[HALF_QUEUES + i]);
89 ret = IRQ_HANDLED; 90 ret = IRQ_HANDLED;
90 } 91 }
@@ -95,15 +96,19 @@ static irqreturn_t qmgr_irq2_a0(int irq, void *pdev)
95static irqreturn_t qmgr_irq(int irq, void *pdev) 96static irqreturn_t qmgr_irq(int irq, void *pdev)
96{ 97{
97 int i, half = (irq == IRQ_IXP4XX_QM1 ? 0 : 1); 98 int i, half = (irq == IRQ_IXP4XX_QM1 ? 0 : 1);
98 u32 val = __raw_readl(&qmgr_regs->irqstat[half]); 99 u32 req_bitmap = __raw_readl(&qmgr_regs->irqstat[half]);
99 __raw_writel(val, &qmgr_regs->irqstat[half]); /* ACK */
100 100
101 for (i = 0; i < HALF_QUEUES; i++) 101 if (!req_bitmap)
102 if (val & (1 << i)) { 102 return 0;
103 int irq = half * HALF_QUEUES + i; 103 __raw_writel(req_bitmap, &qmgr_regs->irqstat[half]); /* ACK */
104 irq_handlers[irq](irq_pdevs[irq]); 104
105 } 105 while (req_bitmap) {
106 return val ? IRQ_HANDLED : 0; 106 i = __fls(req_bitmap); /* number of the last queue */
107 req_bitmap &= ~BIT(i);
108 i += half * HALF_QUEUES;
109 irq_handlers[i](irq_pdevs[i]);
110 }
111 return IRQ_HANDLED;
107} 112}
108 113
109 114