diff options
author | Mikael Pettersson <mikpe@it.uu.se> | 2009-10-29 14:46:54 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2009-10-29 14:46:54 -0400 |
commit | a91549a8f27e63e0e537fe1c20d4845581de894f (patch) | |
tree | 6cf4a9ecf379cc4bdaa8d988c45702135aecdaa3 /arch/arm/mach-iop13xx | |
parent | 012abeea669ea49636cf952d13298bb68654146a (diff) |
iop: clocksource support
This updates the IOP platform to expose the free-running
timer 1 as a clocksource object. This timer is now also
properly initialised, which requires a new write_tcr1()
function from the mach-specific code. Apart from the
explicit initialisation, there is no functional change
in how timer 1 is programmed.
Tested on n2100, compile-tested for all plat-iop machines.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch/arm/mach-iop13xx')
-rw-r--r-- | arch/arm/mach-iop13xx/include/mach/time.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-iop13xx/include/mach/time.h b/arch/arm/mach-iop13xx/include/mach/time.h index d6d52527589..9fb2768c84b 100644 --- a/arch/arm/mach-iop13xx/include/mach/time.h +++ b/arch/arm/mach-iop13xx/include/mach/time.h | |||
@@ -90,6 +90,11 @@ static inline u32 read_tcr1(void) | |||
90 | return val; | 90 | return val; |
91 | } | 91 | } |
92 | 92 | ||
93 | static inline void write_tcr1(u32 val) | ||
94 | { | ||
95 | asm volatile("mcr p6, 0, %0, c3, c9, 0" : : "r" (val)); | ||
96 | } | ||
97 | |||
93 | static inline void write_trr0(u32 val) | 98 | static inline void write_trr0(u32 val) |
94 | { | 99 | { |
95 | asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val)); | 100 | asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val)); |