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authorDongjin Kim <tobetter@gmail.com>2012-12-18 11:57:06 -0500
committerKukjin Kim <kgene.kim@samsung.com>2012-12-19 12:25:27 -0500
commit454696fdc864aacaab978755d44d73d418c59788 (patch)
treee4c7b662a11a090cbb57db4fb50d137666363569 /arch/arm/mach-exynos
parent873673d302e48051c5b90c6e27f86400bdd366ba (diff)
ARM: EXYNOS: Fix MSHC clocks instance names
Replace clock instance name of MSHC controller for BIC and CIU of Exynos4412. Signed-off-by: Dongjin Kim <tobetter@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index efead60b943..bbcb3dea0d4 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -529,7 +529,7 @@ static struct clk exynos4_init_clocks_off[] = {
529 .enable = exynos4_clk_ip_fsys_ctrl, 529 .enable = exynos4_clk_ip_fsys_ctrl,
530 .ctrlbit = (1 << 8), 530 .ctrlbit = (1 << 8),
531 }, { 531 }, {
532 .name = "dwmmc", 532 .name = "biu",
533 .parent = &exynos4_clk_aclk_133.clk, 533 .parent = &exynos4_clk_aclk_133.clk,
534 .enable = exynos4_clk_ip_fsys_ctrl, 534 .enable = exynos4_clk_ip_fsys_ctrl,
535 .ctrlbit = (1 << 9), 535 .ctrlbit = (1 << 9),
@@ -1134,7 +1134,7 @@ static struct clksrc_clk exynos4_clksrcs[] = {
1134 .reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 }, 1134 .reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 },
1135 }, { 1135 }, {
1136 .clk = { 1136 .clk = {
1137 .name = "sclk_dwmmc", 1137 .name = "ciu",
1138 .parent = &exynos4_clk_dout_mmc4.clk, 1138 .parent = &exynos4_clk_dout_mmc4.clk,
1139 .enable = exynos4_clksrc_mask_fsys_ctrl, 1139 .enable = exynos4_clksrc_mask_fsys_ctrl,
1140 .ctrlbit = (1 << 16), 1140 .ctrlbit = (1 << 16),