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authorMyungJoo Ham <myungjoo.ham@samsung.com>2011-07-20 22:25:23 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-07-20 22:27:18 -0400
commitb93cb91bd34ad9f9eaba78aeb84bb556f6150d0e (patch)
tree8f3bbd7a1e2357955e1650656db8b91fa039c6b3 /arch/arm/mach-exynos4/pm.c
parentd40474c819b484ded7da520a174117b65d56e1c1 (diff)
ARM: EXYNOS4: Add more registers to be saved and restored for PM
We need more registers to be saved and restored for PM of EXYNOS4210. Otherwise, with additional drivers running, suspend-to-RAM fails to wake up properly. This patch adds registers omitted in the initial PM patches. Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/pm.c')
-rw-r--r--arch/arm/mach-exynos4/pm.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
index 3da1716afc5..9ef2e99fb8b 100644
--- a/arch/arm/mach-exynos4/pm.c
+++ b/arch/arm/mach-exynos4/pm.c
@@ -27,6 +27,7 @@
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/pm.h> 28#include <plat/pm.h>
29#include <plat/pll.h> 29#include <plat/pll.h>
30#include <plat/regs-srom.h>
30 31
31#include <mach/regs-irq.h> 32#include <mach/regs-irq.h>
32#include <mach/regs-gpio.h> 33#include <mach/regs-gpio.h>
@@ -67,7 +68,9 @@ static struct sleep_save exynos4_core_save[] = {
67 SAVE_ITEM(S5P_CLKSRC_TOP0), 68 SAVE_ITEM(S5P_CLKSRC_TOP0),
68 SAVE_ITEM(S5P_CLKSRC_TOP1), 69 SAVE_ITEM(S5P_CLKSRC_TOP1),
69 SAVE_ITEM(S5P_CLKSRC_CAM), 70 SAVE_ITEM(S5P_CLKSRC_CAM),
71 SAVE_ITEM(S5P_CLKSRC_TV),
70 SAVE_ITEM(S5P_CLKSRC_MFC), 72 SAVE_ITEM(S5P_CLKSRC_MFC),
73 SAVE_ITEM(S5P_CLKSRC_G3D),
71 SAVE_ITEM(S5P_CLKSRC_IMAGE), 74 SAVE_ITEM(S5P_CLKSRC_IMAGE),
72 SAVE_ITEM(S5P_CLKSRC_LCD0), 75 SAVE_ITEM(S5P_CLKSRC_LCD0),
73 SAVE_ITEM(S5P_CLKSRC_LCD1), 76 SAVE_ITEM(S5P_CLKSRC_LCD1),
@@ -94,6 +97,7 @@ static struct sleep_save exynos4_core_save[] = {
94 SAVE_ITEM(S5P_CLKDIV_PERIL4), 97 SAVE_ITEM(S5P_CLKDIV_PERIL4),
95 SAVE_ITEM(S5P_CLKDIV_PERIL5), 98 SAVE_ITEM(S5P_CLKDIV_PERIL5),
96 SAVE_ITEM(S5P_CLKDIV_TOP), 99 SAVE_ITEM(S5P_CLKDIV_TOP),
100 SAVE_ITEM(S5P_CLKSRC_MASK_TOP),
97 SAVE_ITEM(S5P_CLKSRC_MASK_CAM), 101 SAVE_ITEM(S5P_CLKSRC_MASK_CAM),
98 SAVE_ITEM(S5P_CLKSRC_MASK_TV), 102 SAVE_ITEM(S5P_CLKSRC_MASK_TV),
99 SAVE_ITEM(S5P_CLKSRC_MASK_LCD0), 103 SAVE_ITEM(S5P_CLKSRC_MASK_LCD0),
@@ -102,6 +106,7 @@ static struct sleep_save exynos4_core_save[] = {
102 SAVE_ITEM(S5P_CLKSRC_MASK_FSYS), 106 SAVE_ITEM(S5P_CLKSRC_MASK_FSYS),
103 SAVE_ITEM(S5P_CLKSRC_MASK_PERIL0), 107 SAVE_ITEM(S5P_CLKSRC_MASK_PERIL0),
104 SAVE_ITEM(S5P_CLKSRC_MASK_PERIL1), 108 SAVE_ITEM(S5P_CLKSRC_MASK_PERIL1),
109 SAVE_ITEM(S5P_CLKDIV2_RATIO),
105 SAVE_ITEM(S5P_CLKGATE_SCLKCAM), 110 SAVE_ITEM(S5P_CLKGATE_SCLKCAM),
106 SAVE_ITEM(S5P_CLKGATE_IP_CAM), 111 SAVE_ITEM(S5P_CLKGATE_IP_CAM),
107 SAVE_ITEM(S5P_CLKGATE_IP_TV), 112 SAVE_ITEM(S5P_CLKGATE_IP_TV),
@@ -122,8 +127,10 @@ static struct sleep_save exynos4_core_save[] = {
122 SAVE_ITEM(S5P_CLKGATE_IP_DMC), 127 SAVE_ITEM(S5P_CLKGATE_IP_DMC),
123 SAVE_ITEM(S5P_CLKSRC_CPU), 128 SAVE_ITEM(S5P_CLKSRC_CPU),
124 SAVE_ITEM(S5P_CLKDIV_CPU), 129 SAVE_ITEM(S5P_CLKDIV_CPU),
130 SAVE_ITEM(S5P_CLKDIV_CPU + 0x4),
125 SAVE_ITEM(S5P_CLKGATE_SCLKCPU), 131 SAVE_ITEM(S5P_CLKGATE_SCLKCPU),
126 SAVE_ITEM(S5P_CLKGATE_IP_CPU), 132 SAVE_ITEM(S5P_CLKGATE_IP_CPU),
133
127 /* GIC side */ 134 /* GIC side */
128 SAVE_ITEM(S5P_VA_GIC_CPU + 0x000), 135 SAVE_ITEM(S5P_VA_GIC_CPU + 0x000),
129 SAVE_ITEM(S5P_VA_GIC_CPU + 0x004), 136 SAVE_ITEM(S5P_VA_GIC_CPU + 0x004),
@@ -206,6 +213,13 @@ static struct sleep_save exynos4_core_save[] = {
206 SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x070), 213 SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x070),
207 SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x080), 214 SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x080),
208 SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x090), 215 SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x090),
216
217 /* SROM side */
218 SAVE_ITEM(S5P_SROM_BW),
219 SAVE_ITEM(S5P_SROM_BC0),
220 SAVE_ITEM(S5P_SROM_BC1),
221 SAVE_ITEM(S5P_SROM_BC2),
222 SAVE_ITEM(S5P_SROM_BC3),
209}; 223};
210 224
211static struct sleep_save exynos4_l2cc_save[] = { 225static struct sleep_save exynos4_l2cc_save[] = {