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authorKukjin Kim <kgene.kim@samsung.com>2011-08-24 04:25:09 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-09-16 03:38:55 -0400
commit684653842b65b98538e5d6198998e68c879bd45e (patch)
treec104c3425f8776477c29fa519eb1bfb7597b800a /arch/arm/mach-exynos4/cpu.c
parent54122447bbba20e7538093189b8ad276b959e653 (diff)
ARM: EXYNOS4: Add support new EXYNOS4212 SoC
This patch adds Samsung EXYNOS4212 SoC support. The EXYNOS4212 integrates a ARM Cortex A9 multi-core. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/cpu.c')
-rw-r--r--arch/arm/mach-exynos4/cpu.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 0d281bbe345..1e1a7a9d2ae 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -241,7 +241,11 @@ static int __init exynos4_l2x0_cache_init(void)
241{ 241{
242 /* TAG, Data Latency Control: 2cycle */ 242 /* TAG, Data Latency Control: 2cycle */
243 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); 243 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
244 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); 244
245 if (soc_is_exynos4210())
246 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
247 else if (soc_is_exynos4212())
248 __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
245 249
246 /* L2X0 Prefetch Control */ 250 /* L2X0 Prefetch Control */
247 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); 251 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);