diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 08:25:15 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 08:25:27 -0500 |
commit | 7b9dd47136c07ffd883aff6926c7b281e4c1eea4 (patch) | |
tree | b835312e76fe323de3e1cbbb0d15fca5a3f7ef9c /arch/arm/mach-exynos/mach-smdk4x12.c | |
parent | 2e0e943436912ffe0848ece58167edfe754edb96 (diff) | |
parent | 0575fb754dbfc32a01f297e778533340a533ec68 (diff) |
Merge branch 'restart' into for-linus
Conflicts:
arch/arm/mach-exynos/cpu.c
The changes to arch/arm/mach-exynos/cpu.c were moved to
mach-exynos/common.c.
Diffstat (limited to 'arch/arm/mach-exynos/mach-smdk4x12.c')
-rw-r--r-- | arch/arm/mach-exynos/mach-smdk4x12.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c index 722d82d7f21..d00e4f016a6 100644 --- a/arch/arm/mach-exynos/mach-smdk4x12.c +++ b/arch/arm/mach-exynos/mach-smdk4x12.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <plat/clock.h> | 28 | #include <plat/clock.h> |
29 | #include <plat/cpu.h> | 29 | #include <plat/cpu.h> |
30 | #include <plat/devs.h> | 30 | #include <plat/devs.h> |
31 | #include <plat/exynos4.h> | ||
32 | #include <plat/gpio-cfg.h> | 31 | #include <plat/gpio-cfg.h> |
33 | #include <plat/iic.h> | 32 | #include <plat/iic.h> |
34 | #include <plat/keypad.h> | 33 | #include <plat/keypad.h> |
@@ -37,6 +36,8 @@ | |||
37 | 36 | ||
38 | #include <mach/map.h> | 37 | #include <mach/map.h> |
39 | 38 | ||
39 | #include "common.h" | ||
40 | |||
40 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 41 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
41 | #define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 42 | #define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
42 | S3C2410_UCON_RXILEVEL | \ | 43 | S3C2410_UCON_RXILEVEL | \ |
@@ -250,7 +251,7 @@ static void __init smdk4x12_map_io(void) | |||
250 | { | 251 | { |
251 | clk_xusbxti.rate = 24000000; | 252 | clk_xusbxti.rate = 24000000; |
252 | 253 | ||
253 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 254 | exynos_init_io(NULL, 0); |
254 | s3c24xx_init_clocks(clk_xusbxti.rate); | 255 | s3c24xx_init_clocks(clk_xusbxti.rate); |
255 | s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); | 256 | s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); |
256 | } | 257 | } |
@@ -291,6 +292,7 @@ MACHINE_START(SMDK4212, "SMDK4212") | |||
291 | .handle_irq = gic_handle_irq, | 292 | .handle_irq = gic_handle_irq, |
292 | .init_machine = smdk4x12_machine_init, | 293 | .init_machine = smdk4x12_machine_init, |
293 | .timer = &exynos4_timer, | 294 | .timer = &exynos4_timer, |
295 | .restart = exynos4_restart, | ||
294 | MACHINE_END | 296 | MACHINE_END |
295 | 297 | ||
296 | MACHINE_START(SMDK4412, "SMDK4412") | 298 | MACHINE_START(SMDK4412, "SMDK4412") |
@@ -302,4 +304,5 @@ MACHINE_START(SMDK4412, "SMDK4412") | |||
302 | .handle_irq = gic_handle_irq, | 304 | .handle_irq = gic_handle_irq, |
303 | .init_machine = smdk4x12_machine_init, | 305 | .init_machine = smdk4x12_machine_init, |
304 | .timer = &exynos4_timer, | 306 | .timer = &exynos4_timer, |
307 | .restart = exynos4_restart, | ||
305 | MACHINE_END | 308 | MACHINE_END |