diff options
author | Ryan Mallon <ryan@bluewatersys.com> | 2010-06-08 06:01:10 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-06-09 06:12:36 -0400 |
commit | ed67ea82c0d9a163458dc6a69a7a3123db1a8b3b (patch) | |
tree | 6789785686ddf249ab813c296ade58b7b0443d33 /arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |
parent | e40152ee1e1c7a63f4777791863215e3faa37a86 (diff) |
EP93xx: Add i2s core support
Add core support for EP93xx i2s audio
Signed-off-by: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h')
-rw-r--r-- | arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 93e2ecc79ce..3fbb095be6e 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
@@ -93,6 +93,7 @@ | |||
93 | /* APB peripherals */ | 93 | /* APB peripherals */ |
94 | #define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000) | 94 | #define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000) |
95 | 95 | ||
96 | #define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000) | ||
96 | #define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) | 97 | #define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000) |
97 | 98 | ||
98 | #define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000) | 99 | #define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000) |
@@ -193,6 +194,15 @@ | |||
193 | #define EP93XX_SYSCON_CLKDIV_ESEL (1<<14) | 194 | #define EP93XX_SYSCON_CLKDIV_ESEL (1<<14) |
194 | #define EP93XX_SYSCON_CLKDIV_PSEL (1<<13) | 195 | #define EP93XX_SYSCON_CLKDIV_PSEL (1<<13) |
195 | #define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 | 196 | #define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8 |
197 | #define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c) | ||
198 | #define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31) | ||
199 | #define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29) | ||
200 | #define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19) | ||
201 | #define EP93XX_I2SCLKDIV_SDIV (1 << 16) | ||
202 | #define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17) | ||
203 | #define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17) | ||
204 | #define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17) | ||
205 | #define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17) | ||
196 | #define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) | 206 | #define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90) |
197 | #define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) | 207 | #define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31) |
198 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) | 208 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) |