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authorMike Rapoport <mike@compulab.co.il>2010-11-15 04:48:33 -0500
committerNicolas Pitre <nico@fluxnic.net>2010-12-15 10:32:30 -0500
commit5af244fdf2a2405b2181da2a32636f3ca5ef162e (patch)
treea4da14554797972718439a9a126102756454b783 /arch/arm/mach-dove/include/mach/dove.h
parent8d4ce4cd7480ccd8412d4391d063733d6fc52f5c (diff)
[ARM] Dove: add support for multi-purpose pins configuration
Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-dove/include/mach/dove.h')
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index 148f4f0ee3e..27b414578f2 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -136,10 +136,16 @@
136#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) 136#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
137#define DOVE_NAND_GPIO_EN (1 << 0) 137#define DOVE_NAND_GPIO_EN (1 << 0)
138#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_VIRT_BASE + 0x40) 138#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_VIRT_BASE + 0x40)
139 139#define DOVE_SPI_GPIO_SEL (1 << 5)
140#define DOVE_UART1_GPIO_SEL (1 << 4)
141#define DOVE_AU1_GPIO_SEL (1 << 3)
142#define DOVE_CAM_GPIO_SEL (1 << 2)
143#define DOVE_SD1_GPIO_SEL (1 << 1)
144#define DOVE_SD0_GPIO_SEL (1 << 0)
140 145
141/* Power Management */ 146/* Power Management */
142#define DOVE_PMU_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0000) 147#define DOVE_PMU_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0000)
148#define DOVE_PMU_SIG_CTRL (DOVE_PMU_VIRT_BASE + 0x802c)
143 149
144/* Real Time Clock */ 150/* Real Time Clock */
145#define DOVE_RTC_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xd8500) 151#define DOVE_RTC_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0xd8500)