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authorKevin Hilman <khilman@deeprootsystems.com>2010-10-21 14:21:55 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2010-10-21 14:21:55 -0400
commit7940a34b2e1e0485211a17d8c3ab4da1ea3e1330 (patch)
treefe08ba701cbf23ae44a16d3b7afa521fce943a8a /arch/arm/mach-davinci
parent6451d7783ba5ff24eb1a544eaa6665b890f30466 (diff)
parent8939b3504dc35224cb9c88e5af925b22ea9eee71 (diff)
Merge branch 'davinci-next' into davinci-for-linus
Conflicts: arch/arm/mach-davinci/board-da830-evm.c arch/arm/mach-davinci/board-da850-evm.c
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/Kconfig76
-rw-r--r--arch/arm/mach-davinci/Makefile4
-rw-r--r--arch/arm/mach-davinci/aemif.c133
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c24
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c92
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c11
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c20
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c21
-rw-r--r--arch/arm/mach-davinci/board-mityomapl138.c424
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c7
-rw-r--r--arch/arm/mach-davinci/board-omapl138-hawk.c64
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c7
-rw-r--r--arch/arm/mach-davinci/board-tnetv107x-evm.c56
-rw-r--r--arch/arm/mach-davinci/clock.c75
-rw-r--r--arch/arm/mach-davinci/clock.h5
-rw-r--r--arch/arm/mach-davinci/cpufreq.c28
-rw-r--r--arch/arm/mach-davinci/da850.c76
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c70
-rw-r--r--arch/arm/mach-davinci/devices-tnetv107x.c50
-rw-r--r--arch/arm/mach-davinci/devices.c2
-rw-r--r--arch/arm/mach-davinci/dm365.c23
-rw-r--r--arch/arm/mach-davinci/dm644x.c23
-rw-r--r--arch/arm/mach-davinci/dm646x.c22
-rw-r--r--arch/arm/mach-davinci/dma.c8
-rw-r--r--arch/arm/mach-davinci/include/mach/aemif.h36
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h7
-rw-r--r--arch/arm/mach-davinci/include/mach/dm365.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/dm644x.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/dm646x.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/nand.h6
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/tnetv107x.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-davinci/tnetv107x.c11
34 files changed, 1244 insertions, 149 deletions
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 71f90f86474..b77b860b36d 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -20,23 +20,23 @@ config ARCH_DAVINCI_DM644x
20 select ARCH_DAVINCI_DMx 20 select ARCH_DAVINCI_DMx
21 21
22config ARCH_DAVINCI_DM355 22config ARCH_DAVINCI_DM355
23 bool "DaVinci 355 based system" 23 bool "DaVinci 355 based system"
24 select AINTC 24 select AINTC
25 select ARCH_DAVINCI_DMx 25 select ARCH_DAVINCI_DMx
26 26
27config ARCH_DAVINCI_DM646x 27config ARCH_DAVINCI_DM646x
28 bool "DaVinci 646x based system" 28 bool "DaVinci 646x based system"
29 select AINTC 29 select AINTC
30 select ARCH_DAVINCI_DMx 30 select ARCH_DAVINCI_DMx
31 31
32config ARCH_DAVINCI_DA830 32config ARCH_DAVINCI_DA830
33 bool "DA830/OMAP-L137 based system" 33 bool "DA830/OMAP-L137/AM17x based system"
34 select CP_INTC 34 select CP_INTC
35 select ARCH_DAVINCI_DA8XX 35 select ARCH_DAVINCI_DA8XX
36 select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1 36 select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
37 37
38config ARCH_DAVINCI_DA850 38config ARCH_DAVINCI_DA850
39 bool "DA850/OMAP-L138 based system" 39 bool "DA850/OMAP-L138/AM18x based system"
40 select CP_INTC 40 select CP_INTC
41 select ARCH_DAVINCI_DA8XX 41 select ARCH_DAVINCI_DA8XX
42 select ARCH_HAS_CPUFREQ 42 select ARCH_HAS_CPUFREQ
@@ -115,21 +115,21 @@ config MACH_DAVINCI_DM365_EVM
115 for development is a DM365 EVM 115 for development is a DM365 EVM
116 116
117config MACH_DAVINCI_DA830_EVM 117config MACH_DAVINCI_DA830_EVM
118 bool "TI DA830/OMAP-L137 Reference Platform" 118 bool "TI DA830/OMAP-L137/AM17x Reference Platform"
119 default ARCH_DAVINCI_DA830 119 default ARCH_DAVINCI_DA830
120 depends on ARCH_DAVINCI_DA830 120 depends on ARCH_DAVINCI_DA830
121 select GPIO_PCF857X 121 select GPIO_PCF857X
122 help 122 help
123 Say Y here to select the TI DA830/OMAP-L137 Evaluation Module. 123 Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module.
124 124
125choice 125choice
126 prompt "Select DA830/OMAP-L137 UI board peripheral" 126 prompt "Select DA830/OMAP-L137/AM17x UI board peripheral"
127 depends on MACH_DAVINCI_DA830_EVM 127 depends on MACH_DAVINCI_DA830_EVM
128 help 128 help
129 The presence of UI card on the DA830/OMAP-L137 EVM is detected 129 The presence of UI card on the DA830/OMAP-L137/AM17x EVM is
130 automatically based on successful probe of the I2C based GPIO 130 detected automatically based on successful probe of the I2C
131 expander on that board. This option selected in this menu has 131 based GPIO expander on that board. This option selected in this
132 an effect only in case of a successful UI card detection. 132 menu has an effect only in case of a successful UI card detection.
133 133
134config DA830_UI_LCD 134config DA830_UI_LCD
135 bool "LCD" 135 bool "LCD"
@@ -140,23 +140,23 @@ config DA830_UI_LCD
140config DA830_UI_NAND 140config DA830_UI_NAND
141 bool "NAND flash" 141 bool "NAND flash"
142 help 142 help
143 Say Y here to use the NAND flash. Do not forget to setup 143 Say Y here to use the NAND flash. Do not forget to setup
144 the switch correctly. 144 the switch correctly.
145endchoice 145endchoice
146 146
147config MACH_DAVINCI_DA850_EVM 147config MACH_DAVINCI_DA850_EVM
148 bool "TI DA850/OMAP-L138 Reference Platform" 148 bool "TI DA850/OMAP-L138/AM18x Reference Platform"
149 default ARCH_DAVINCI_DA850 149 default ARCH_DAVINCI_DA850
150 depends on ARCH_DAVINCI_DA850 150 depends on ARCH_DAVINCI_DA850
151 select GPIO_PCA953X 151 select GPIO_PCA953X
152 help 152 help
153 Say Y here to select the TI DA850/OMAP-L138 Evaluation Module. 153 Say Y here to select the TI DA850/OMAP-L138/AM18x Evaluation Module.
154 154
155choice 155choice
156 prompt "Select peripherals connected to expander on UI board" 156 prompt "Select peripherals connected to expander on UI board"
157 depends on MACH_DAVINCI_DA850_EVM 157 depends on MACH_DAVINCI_DA850_EVM
158 help 158 help
159 The presence of User Interface (UI) card on the DA850/OMAP-L138 159 The presence of User Interface (UI) card on the DA850/OMAP-L138/AM18x
160 EVM is detected automatically based on successful probe of the I2C 160 EVM is detected automatically based on successful probe of the I2C
161 based GPIO expander on that card. This option selected in this 161 based GPIO expander on that card. This option selected in this
162 menu has an effect only in case of a successful UI card detection. 162 menu has an effect only in case of a successful UI card detection.
@@ -165,13 +165,13 @@ config DA850_UI_NONE
165 bool "No peripheral is enabled" 165 bool "No peripheral is enabled"
166 help 166 help
167 Say Y if you do not want to enable any of the peripherals connected 167 Say Y if you do not want to enable any of the peripherals connected
168 to TCA6416 expander on DA850/OMAP-L138 EVM UI card 168 to TCA6416 expander on DA850/OMAP-L138/AM18x EVM UI card
169 169
170config DA850_UI_RMII 170config DA850_UI_RMII
171 bool "RMII Ethernet PHY" 171 bool "RMII Ethernet PHY"
172 help 172 help
173 Say Y if you want to use the RMII PHY on the DA850/OMAP-L138 EVM. 173 Say Y if you want to use the RMII PHY on the DA850/OMAP-L138/AM18x
174 This PHY is found on the UI daughter card that is supplied with 174 EVM. This PHY is found on the UI daughter card that is supplied with
175 the EVM. 175 the EVM.
176 NOTE: Please take care while choosing this option, MII PHY will 176 NOTE: Please take care while choosing this option, MII PHY will
177 not be functional if RMII mode is selected. 177 not be functional if RMII mode is selected.
@@ -185,6 +185,22 @@ config MACH_TNETV107X
185 help 185 help
186 Say Y here to select the TI TNETV107X Evaluation Module. 186 Say Y here to select the TI TNETV107X Evaluation Module.
187 187
188config MACH_MITYOMAPL138
189 bool "Critical Link MityDSP-L138/MityARM-1808 SoM"
190 depends on ARCH_DAVINCI_DA850
191 help
192 Say Y here to select the Critical Link MityDSP-L138/MityARM-1808
193 System on Module. Information on this SoM may be found at
194 http://www.mitydsp.com
195
196config MACH_OMAPL138_HAWKBOARD
197 bool "TI AM1808 / OMAPL-138 Hawkboard platform"
198 depends on ARCH_DAVINCI_DA850
199 help
200 Say Y here to select the TI AM1808 / OMAPL-138 Hawkboard platform .
201 Information of this board may be found at
202 http://www.hawkboard.org/
203
188config DAVINCI_MUX 204config DAVINCI_MUX
189 bool "DAVINCI multiplexing support" 205 bool "DAVINCI multiplexing support"
190 depends on ARCH_DAVINCI 206 depends on ARCH_DAVINCI
@@ -195,20 +211,20 @@ config DAVINCI_MUX
195 say Y. 211 say Y.
196 212
197config DAVINCI_MUX_DEBUG 213config DAVINCI_MUX_DEBUG
198 bool "Multiplexing debug output" 214 bool "Multiplexing debug output"
199 depends on DAVINCI_MUX 215 depends on DAVINCI_MUX
200 help 216 help
201 Makes the multiplexing functions print out a lot of debug info. 217 Makes the multiplexing functions print out a lot of debug info.
202 This is useful if you want to find out the correct values of the 218 This is useful if you want to find out the correct values of the
203 multiplexing registers. 219 multiplexing registers.
204 220
205config DAVINCI_MUX_WARNINGS 221config DAVINCI_MUX_WARNINGS
206 bool "Warn about pins the bootloader didn't set up" 222 bool "Warn about pins the bootloader didn't set up"
207 depends on DAVINCI_MUX 223 depends on DAVINCI_MUX
208 help 224 help
209 Choose Y here to warn whenever driver initialization logic needs 225 Choose Y here to warn whenever driver initialization logic needs
210 to change the pin multiplexing setup. When there are no warnings 226 to change the pin multiplexing setup. When there are no warnings
211 printed, it's safe to deselect DAVINCI_MUX for your product. 227 printed, it's safe to deselect DAVINCI_MUX for your product.
212 228
213config DAVINCI_RESET_CLOCKS 229config DAVINCI_RESET_CLOCKS
214 bool "Reset unused clocks during boot" 230 bool "Reset unused clocks during boot"
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index eab4c0fd667..0b87a1ca2bb 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -5,7 +5,7 @@
5 5
6# Common objects 6# Common objects
7obj-y := time.o clock.o serial.o io.o psc.o \ 7obj-y := time.o clock.o serial.o io.o psc.o \
8 gpio.o dma.o usb.o common.o sram.o 8 gpio.o dma.o usb.o common.o sram.o aemif.o
9 9
10obj-$(CONFIG_DAVINCI_MUX) += mux.o 10obj-$(CONFIG_DAVINCI_MUX) += mux.o
11 11
@@ -33,6 +33,8 @@ obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o
33obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o 33obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o
34obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o 34obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
35obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o 35obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o
36obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o
37obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
36 38
37# Power Management 39# Power Management
38obj-$(CONFIG_CPU_FREQ) += cpufreq.o 40obj-$(CONFIG_CPU_FREQ) += cpufreq.o
diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c
new file mode 100644
index 00000000000..9c3f500fc12
--- /dev/null
+++ b/arch/arm/mach-davinci/aemif.c
@@ -0,0 +1,133 @@
1/*
2 * AEMIF support for DaVinci SoCs
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/io.h>
13#include <linux/err.h>
14#include <linux/clk.h>
15#include <linux/module.h>
16#include <linux/time.h>
17
18#include <mach/aemif.h>
19
20/* Timing value configuration */
21
22#define TA(x) ((x) << 2)
23#define RHOLD(x) ((x) << 4)
24#define RSTROBE(x) ((x) << 7)
25#define RSETUP(x) ((x) << 13)
26#define WHOLD(x) ((x) << 17)
27#define WSTROBE(x) ((x) << 20)
28#define WSETUP(x) ((x) << 26)
29
30#define TA_MAX 0x3
31#define RHOLD_MAX 0x7
32#define RSTROBE_MAX 0x3f
33#define RSETUP_MAX 0xf
34#define WHOLD_MAX 0x7
35#define WSTROBE_MAX 0x3f
36#define WSETUP_MAX 0xf
37
38#define TIMING_MASK (TA(TA_MAX) | \
39 RHOLD(RHOLD_MAX) | \
40 RSTROBE(RSTROBE_MAX) | \
41 RSETUP(RSETUP_MAX) | \
42 WHOLD(WHOLD_MAX) | \
43 WSTROBE(WSTROBE_MAX) | \
44 WSETUP(WSETUP_MAX))
45
46/*
47 * aemif_calc_rate - calculate timing data.
48 * @wanted: The cycle time needed in nanoseconds.
49 * @clk: The input clock rate in kHz.
50 * @max: The maximum divider value that can be programmed.
51 *
52 * On success, returns the calculated timing value minus 1 for easy
53 * programming into AEMIF timing registers, else negative errno.
54 */
55static int aemif_calc_rate(int wanted, unsigned long clk, int max)
56{
57 int result;
58
59 result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
60
61 pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted);
62
63 /* It is generally OK to have a more relaxed timing than requested... */
64 if (result < 0)
65 result = 0;
66
67 /* ... But configuring tighter timings is not an option. */
68 else if (result > max)
69 result = -EINVAL;
70
71 return result;
72}
73
74/**
75 * davinci_aemif_setup_timing - setup timing values for a given AEMIF interface
76 * @t: timing values to be progammed
77 * @base: The virtual base address of the AEMIF interface
78 * @cs: chip-select to program the timing values for
79 *
80 * This function programs the given timing values (in real clock) into the
81 * AEMIF registers taking the AEMIF clock into account.
82 *
83 * This function does not use any locking while programming the AEMIF
84 * because it is expected that there is only one user of a given
85 * chip-select.
86 *
87 * Returns 0 on success, else negative errno.
88 */
89int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
90 void __iomem *base, unsigned cs)
91{
92 unsigned set, val;
93 unsigned ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
94 unsigned offset = A1CR_OFFSET + cs * 4;
95 struct clk *aemif_clk;
96 unsigned long clkrate;
97
98 if (!t)
99 return 0; /* Nothing to do */
100
101 aemif_clk = clk_get(NULL, "aemif");
102 if (IS_ERR(aemif_clk))
103 return PTR_ERR(aemif_clk);
104
105 clkrate = clk_get_rate(aemif_clk);
106
107 clkrate /= 1000; /* turn clock into kHz for ease of use */
108
109 ta = aemif_calc_rate(t->ta, clkrate, TA_MAX);
110 rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX);
111 rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX);
112 rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX);
113 whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX);
114 wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX);
115 wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX);
116
117 if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
118 whold < 0 || wstrobe < 0 || wsetup < 0) {
119 pr_err("%s: cannot get suitable timings\n", __func__);
120 return -EINVAL;
121 }
122
123 set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
124 WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
125
126 val = __raw_readl(base + offset);
127 val &= ~TIMING_MASK;
128 val |= set;
129 __raw_writel(val, base + offset);
130
131 return 0;
132}
133EXPORT_SYMBOL(davinci_aemif_setup_timing);
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 7f3cdbfc0fb..b52a3a1abd9 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -29,10 +29,9 @@
29#include <mach/nand.h> 29#include <mach/nand.h>
30#include <mach/da8xx.h> 30#include <mach/da8xx.h>
31#include <mach/usb.h> 31#include <mach/usb.h>
32#include <mach/aemif.h>
32 33
33#define DA830_EVM_PHY_MASK 0x0 34#define DA830_EVM_PHY_ID ""
34#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
35
36/* 35/*
37 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. 36 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
38 */ 37 */
@@ -360,6 +359,16 @@ static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
360 .pattern = da830_evm_nand_mirror_pattern 359 .pattern = da830_evm_nand_mirror_pattern
361}; 360};
362 361
362static struct davinci_aemif_timing da830_evm_nandflash_timing = {
363 .wsetup = 24,
364 .wstrobe = 21,
365 .whold = 14,
366 .rsetup = 19,
367 .rstrobe = 50,
368 .rhold = 0,
369 .ta = 20,
370};
371
363static struct davinci_nand_pdata da830_evm_nand_pdata = { 372static struct davinci_nand_pdata da830_evm_nand_pdata = {
364 .parts = da830_evm_nand_partitions, 373 .parts = da830_evm_nand_partitions,
365 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions), 374 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
@@ -368,6 +377,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
368 .options = NAND_USE_FLASH_BBT, 377 .options = NAND_USE_FLASH_BBT,
369 .bbt_td = &da830_evm_nand_bbt_main_descr, 378 .bbt_td = &da830_evm_nand_bbt_main_descr,
370 .bbt_md = &da830_evm_nand_bbt_mirror_descr, 379 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
380 .timing = &da830_evm_nandflash_timing,
371}; 381};
372 382
373static struct resource da830_evm_nand_resources[] = { 383static struct resource da830_evm_nand_resources[] = {
@@ -546,9 +556,8 @@ static __init void da830_evm_init(void)
546 556
547 da830_evm_usb_init(); 557 da830_evm_usb_init();
548 558
549 soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
550 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
551 soc_info->emac_pdata->rmii_en = 1; 559 soc_info->emac_pdata->rmii_en = 1;
560 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
552 561
553 ret = davinci_cfg_reg_list(da830_cpgmac_pins); 562 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
554 if (ret) 563 if (ret)
@@ -586,6 +595,9 @@ static __init void da830_evm_init(void)
586#ifdef CONFIG_SERIAL_8250_CONSOLE 595#ifdef CONFIG_SERIAL_8250_CONSOLE
587static int __init da830_evm_console_init(void) 596static int __init da830_evm_console_init(void)
588{ 597{
598 if (!machine_is_davinci_da830_evm())
599 return 0;
600
589 return add_preferred_console("ttyS", 2, "115200"); 601 return add_preferred_console("ttyS", 2, "115200");
590} 602}
591console_initcall(da830_evm_console_init); 603console_initcall(da830_evm_console_init);
@@ -596,7 +608,7 @@ static void __init da830_evm_map_io(void)
596 da830_init(); 608 da830_init();
597} 609}
598 610
599MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM") 611MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
600 .boot_params = (DA8XX_DDR_BASE + 0x100), 612 .boot_params = (DA8XX_DDR_BASE + 0x100),
601 .map_io = da830_evm_map_io, 613 .map_io = da830_evm_map_io,
602 .init_irq = cp_intc_init, 614 .init_irq = cp_intc_init,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index b26f5cbfce3..c6e11c682e4 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -26,7 +26,6 @@
26#include <linux/mtd/physmap.h> 26#include <linux/mtd/physmap.h>
27#include <linux/regulator/machine.h> 27#include <linux/regulator/machine.h>
28#include <linux/regulator/tps6507x.h> 28#include <linux/regulator/tps6507x.h>
29#include <linux/mfd/tps6507x.h>
30#include <linux/input/tps6507x-ts.h> 29#include <linux/input/tps6507x-ts.h>
31 30
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
@@ -36,10 +35,9 @@
36#include <mach/da8xx.h> 35#include <mach/da8xx.h>
37#include <mach/nand.h> 36#include <mach/nand.h>
38#include <mach/mux.h> 37#include <mach/mux.h>
38#include <mach/aemif.h>
39 39
40#define DA850_EVM_PHY_MASK 0x1 40#define DA850_EVM_PHY_ID "0:00"
41#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
42
43#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) 41#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
44#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) 42#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
45 43
@@ -110,7 +108,7 @@ static struct platform_device da850_pm_device = {
110 * to boot, using TI's tools to install the secondary boot loader 108 * to boot, using TI's tools to install the secondary boot loader
111 * (UBL) and U-Boot. 109 * (UBL) and U-Boot.
112 */ 110 */
113struct mtd_partition da850_evm_nandflash_partition[] = { 111static struct mtd_partition da850_evm_nandflash_partition[] = {
114 { 112 {
115 .name = "u-boot env", 113 .name = "u-boot env",
116 .offset = 0, 114 .offset = 0,
@@ -143,12 +141,23 @@ struct mtd_partition da850_evm_nandflash_partition[] = {
143 }, 141 },
144}; 142};
145 143
144static struct davinci_aemif_timing da850_evm_nandflash_timing = {
145 .wsetup = 24,
146 .wstrobe = 21,
147 .whold = 14,
148 .rsetup = 19,
149 .rstrobe = 50,
150 .rhold = 0,
151 .ta = 20,
152};
153
146static struct davinci_nand_pdata da850_evm_nandflash_data = { 154static struct davinci_nand_pdata da850_evm_nandflash_data = {
147 .parts = da850_evm_nandflash_partition, 155 .parts = da850_evm_nandflash_partition,
148 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), 156 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
149 .ecc_mode = NAND_ECC_HW, 157 .ecc_mode = NAND_ECC_HW,
150 .ecc_bits = 4, 158 .ecc_bits = 4,
151 .options = NAND_USE_FLASH_BBT, 159 .options = NAND_USE_FLASH_BBT,
160 .timing = &da850_evm_nandflash_timing,
152}; 161};
153 162
154static struct resource da850_evm_nandflash_resource[] = { 163static struct resource da850_evm_nandflash_resource[] = {
@@ -196,6 +205,30 @@ static void __init da850_evm_init_nor(void)
196 iounmap(aemif_addr); 205 iounmap(aemif_addr);
197} 206}
198 207
208static const short da850_evm_nand_pins[] = {
209 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
210 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
211 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
212 DA850_NEMA_WE, DA850_NEMA_OE,
213 -1
214};
215
216static const short da850_evm_nor_pins[] = {
217 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
218 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
219 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
220 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
221 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
222 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
223 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
224 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
225 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
226 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
227 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
228 DA850_EMA_A_22, DA850_EMA_A_23,
229 -1
230};
231
199static u32 ui_card_detected; 232static u32 ui_card_detected;
200 233
201#if defined(CONFIG_MMC_DAVINCI) || \ 234#if defined(CONFIG_MMC_DAVINCI) || \
@@ -205,17 +238,17 @@ static u32 ui_card_detected;
205#define HAS_MMC 0 238#define HAS_MMC 0
206#endif 239#endif
207 240
208static __init void da850_evm_setup_nor_nand(void) 241static inline void da850_evm_setup_nor_nand(void)
209{ 242{
210 int ret = 0; 243 int ret = 0;
211 244
212 if (ui_card_detected & !HAS_MMC) { 245 if (ui_card_detected & !HAS_MMC) {
213 ret = davinci_cfg_reg_list(da850_nand_pins); 246 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
214 if (ret) 247 if (ret)
215 pr_warning("da850_evm_init: nand mux setup failed: " 248 pr_warning("da850_evm_init: nand mux setup failed: "
216 "%d\n", ret); 249 "%d\n", ret);
217 250
218 ret = davinci_cfg_reg_list(da850_nor_pins); 251 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
219 if (ret) 252 if (ret)
220 pr_warning("da850_evm_init: nor mux setup failed: %d\n", 253 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
221 ret); 254 ret);
@@ -406,7 +439,7 @@ static int da850_lcd_hw_init(void)
406/* TPS65070 voltage regulator support */ 439/* TPS65070 voltage regulator support */
407 440
408/* 3.3V */ 441/* 3.3V */
409struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { 442static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
410 { 443 {
411 .supply = "usb0_vdda33", 444 .supply = "usb0_vdda33",
412 }, 445 },
@@ -416,7 +449,7 @@ struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
416}; 449};
417 450
418/* 3.3V or 1.8V */ 451/* 3.3V or 1.8V */
419struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { 452static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
420 { 453 {
421 .supply = "dvdd3318_a", 454 .supply = "dvdd3318_a",
422 }, 455 },
@@ -429,14 +462,14 @@ struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
429}; 462};
430 463
431/* 1.2V */ 464/* 1.2V */
432struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { 465static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
433 { 466 {
434 .supply = "cvdd", 467 .supply = "cvdd",
435 }, 468 },
436}; 469};
437 470
438/* 1.8V LDO */ 471/* 1.8V LDO */
439struct regulator_consumer_supply tps65070_ldo1_consumers[] = { 472static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
440 { 473 {
441 .supply = "sata_vddr", 474 .supply = "sata_vddr",
442 }, 475 },
@@ -452,7 +485,7 @@ struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
452}; 485};
453 486
454/* 1.2V LDO */ 487/* 1.2V LDO */
455struct regulator_consumer_supply tps65070_ldo2_consumers[] = { 488static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
456 { 489 {
457 .supply = "sata_vdd", 490 .supply = "sata_vdd",
458 }, 491 },
@@ -475,7 +508,7 @@ static struct tps6507x_reg_platform_data tps6507x_platform_data = {
475 .defdcdc_default = true, 508 .defdcdc_default = true,
476}; 509};
477 510
478struct regulator_init_data tps65070_regulator_data[] = { 511static struct regulator_init_data tps65070_regulator_data[] = {
479 /* dcdc1 */ 512 /* dcdc1 */
480 { 513 {
481 .constraints = { 514 .constraints = {
@@ -576,6 +609,23 @@ static const short da850_evm_lcdc_pins[] = {
576 -1 609 -1
577}; 610};
578 611
612static const short da850_evm_mii_pins[] = {
613 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
614 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
615 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
616 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
617 DA850_MDIO_D,
618 -1
619};
620
621static const short da850_evm_rmii_pins[] = {
622 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
623 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
624 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
625 DA850_MDIO_D,
626 -1
627};
628
579static int __init da850_evm_config_emac(void) 629static int __init da850_evm_config_emac(void)
580{ 630{
581 void __iomem *cfg_chip3_base; 631 void __iomem *cfg_chip3_base;
@@ -593,12 +643,12 @@ static int __init da850_evm_config_emac(void)
593 643
594 if (rmii_en) { 644 if (rmii_en) {
595 val |= BIT(8); 645 val |= BIT(8);
596 ret = davinci_cfg_reg_list(da850_rmii_pins); 646 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
597 pr_info("EMAC: RMII PHY configured, MII PHY will not be" 647 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
598 " functional\n"); 648 " functional\n");
599 } else { 649 } else {
600 val &= ~BIT(8); 650 val &= ~BIT(8);
601 ret = davinci_cfg_reg_list(da850_cpgmac_pins); 651 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
602 pr_info("EMAC: MII PHY configured, RMII PHY will not be" 652 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
603 " functional\n"); 653 " functional\n");
604 } 654 }
@@ -625,8 +675,7 @@ static int __init da850_evm_config_emac(void)
625 /* Enable/Disable MII MDIO clock */ 675 /* Enable/Disable MII MDIO clock */
626 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); 676 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
627 677
628 soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK; 678 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
629 soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
630 679
631 ret = da8xx_register_emac(); 680 ret = da8xx_register_emac();
632 if (ret) 681 if (ret)
@@ -787,7 +836,7 @@ static __init void da850_evm_init(void)
787 if (ret) 836 if (ret)
788 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); 837 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
789 838
790 ret = da850_register_cpufreq(); 839 ret = da850_register_cpufreq("pll0_sysclk3");
791 if (ret) 840 if (ret)
792 pr_warning("da850_evm_init: cpufreq registration failed: %d\n", 841 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
793 ret); 842 ret);
@@ -806,6 +855,9 @@ static __init void da850_evm_init(void)
806#ifdef CONFIG_SERIAL_8250_CONSOLE 855#ifdef CONFIG_SERIAL_8250_CONSOLE
807static int __init da850_evm_console_init(void) 856static int __init da850_evm_console_init(void)
808{ 857{
858 if (!machine_is_davinci_da850_evm())
859 return 0;
860
809 return add_preferred_console("ttyS", 2, "115200"); 861 return add_preferred_console("ttyS", 2, "115200");
810} 862}
811console_initcall(da850_evm_console_init); 863console_initcall(da850_evm_console_init);
@@ -816,7 +868,7 @@ static void __init da850_evm_map_io(void)
816 da850_init(); 868 da850_init();
817} 869}
818 870
819MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM") 871MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
820 .boot_params = (DA8XX_DDR_BASE + 0x100), 872 .boot_params = (DA8XX_DDR_BASE + 0x100),
821 .map_io = da850_evm_map_io, 873 .map_io = da850_evm_map_io,
822 .init_irq = cp_intc_init, 874 .init_irq = cp_intc_init,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 944a0cbaf5c..c67f684ee3e 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -54,9 +54,7 @@ static inline int have_tvp7002(void)
54 return 0; 54 return 0;
55} 55}
56 56
57#define DM365_EVM_PHY_MASK (0x2) 57#define DM365_EVM_PHY_ID "0:01"
58#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
59
60/* 58/*
61 * A MAX-II CPLD is used for various board control functions. 59 * A MAX-II CPLD is used for various board control functions.
62 */ 60 */
@@ -175,7 +173,9 @@ static struct at24_platform_data eeprom_info = {
175 .context = (void *)0x7f00, 173 .context = (void *)0x7f00,
176}; 174};
177 175
178static struct snd_platform_data dm365_evm_snd_data; 176static struct snd_platform_data dm365_evm_snd_data = {
177 .asp_chan_q = EVENTQ_3,
178};
179 179
180static struct i2c_board_info i2c_info[] = { 180static struct i2c_board_info i2c_info[] = {
181 { 181 {
@@ -533,8 +533,7 @@ fail:
533 533
534 /* ... and ENET ... */ 534 /* ... and ENET ... */
535 dm365evm_emac_configure(); 535 dm365evm_emac_configure();
536 soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK; 536 soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID;
537 soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY;
538 resets &= ~BIT(3); 537 resets &= ~BIT(3);
539 538
540 /* ... and AIC33 */ 539 /* ... and AIC33 */
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index d59fba15ba8..0ca90b83458 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -37,10 +37,9 @@
37#include <mach/nand.h> 37#include <mach/nand.h>
38#include <mach/mmc.h> 38#include <mach/mmc.h>
39#include <mach/usb.h> 39#include <mach/usb.h>
40#include <mach/aemif.h>
40 41
41#define DM644X_EVM_PHY_MASK (0x2) 42#define DM644X_EVM_PHY_ID "0:01"
42#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
43
44#define LXT971_PHY_ID (0x001378e2) 43#define LXT971_PHY_ID (0x001378e2)
45#define LXT971_PHY_MASK (0xfffffff0) 44#define LXT971_PHY_MASK (0xfffffff0)
46 45
@@ -137,11 +136,22 @@ static struct mtd_partition davinci_evm_nandflash_partition[] = {
137 */ 136 */
138}; 137};
139 138
139static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
140 .wsetup = 20,
141 .wstrobe = 40,
142 .whold = 20,
143 .rsetup = 10,
144 .rstrobe = 40,
145 .rhold = 10,
146 .ta = 40,
147};
148
140static struct davinci_nand_pdata davinci_evm_nandflash_data = { 149static struct davinci_nand_pdata davinci_evm_nandflash_data = {
141 .parts = davinci_evm_nandflash_partition, 150 .parts = davinci_evm_nandflash_partition,
142 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition), 151 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
143 .ecc_mode = NAND_ECC_HW, 152 .ecc_mode = NAND_ECC_HW,
144 .options = NAND_USE_FLASH_BBT, 153 .options = NAND_USE_FLASH_BBT,
154 .timing = &davinci_evm_nandflash_timing,
145}; 155};
146 156
147static struct resource davinci_evm_nandflash_resource[] = { 157static struct resource davinci_evm_nandflash_resource[] = {
@@ -695,9 +705,7 @@ static __init void davinci_evm_init(void)
695 davinci_serial_init(&uart_config); 705 davinci_serial_init(&uart_config);
696 dm644x_init_asp(&dm644x_evm_snd_data); 706 dm644x_init_asp(&dm644x_evm_snd_data);
697 707
698 soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK; 708 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
699 soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
700
701 /* Register the fixup for PHY on DaVinci */ 709 /* Register the fixup for PHY on DaVinci */
702 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK, 710 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
703 davinci_phy_fixup); 711 davinci_phy_fixup);
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 6890488fb92..f6ac9ba7487 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -42,6 +42,7 @@
42#include <mach/nand.h> 42#include <mach/nand.h>
43#include <mach/clock.h> 43#include <mach/clock.h>
44#include <mach/cdce949.h> 44#include <mach/cdce949.h>
45#include <mach/aemif.h>
45 46
46#include "clock.h" 47#include "clock.h"
47 48
@@ -71,6 +72,16 @@ static struct mtd_partition davinci_nand_partitions[] = {
71 } 72 }
72}; 73};
73 74
75static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
76 .wsetup = 29,
77 .wstrobe = 24,
78 .whold = 14,
79 .rsetup = 19,
80 .rstrobe = 33,
81 .rhold = 0,
82 .ta = 29,
83};
84
74static struct davinci_nand_pdata davinci_nand_data = { 85static struct davinci_nand_pdata davinci_nand_data = {
75 .mask_cle = 0x80000, 86 .mask_cle = 0x80000,
76 .mask_ale = 0x40000, 87 .mask_ale = 0x40000,
@@ -718,9 +729,7 @@ static struct davinci_uart_config uart_config __initdata = {
718 .enabled_uarts = (1 << 0), 729 .enabled_uarts = (1 << 0),
719}; 730};
720 731
721#define DM646X_EVM_PHY_MASK (0x2) 732#define DM646X_EVM_PHY_ID "0:01"
722#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
723
724/* 733/*
725 * The following EDMA channels/slots are not being used by drivers (for 734 * The following EDMA channels/slots are not being used by drivers (for
726 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being 735 * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
@@ -763,6 +772,9 @@ static __init void evm_init(void)
763 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]); 772 dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
764 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]); 773 dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
765 774
775 if (machine_is_davinci_dm6467tevm())
776 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
777
766 platform_device_register(&davinci_nand_device); 778 platform_device_register(&davinci_nand_device);
767 779
768 dm646x_init_edma(dm646x_edma_rsv); 780 dm646x_init_edma(dm646x_edma_rsv);
@@ -770,8 +782,7 @@ static __init void evm_init(void)
770 if (HAS_ATA) 782 if (HAS_ATA)
771 davinci_init_ide(); 783 davinci_init_ide();
772 784
773 soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK; 785 soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
774 soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
775} 786}
776 787
777#define DM646X_EVM_REF_FREQ 27000000 788#define DM646X_EVM_REF_FREQ 27000000
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
new file mode 100644
index 00000000000..194a15ff2b4
--- /dev/null
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -0,0 +1,424 @@
1/*
2 * Critical Link MityOMAP-L138 SoM
3 *
4 * Copyright (C) 2010 Critical Link LLC - http://www.criticallink.com
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of
8 * any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/platform_device.h>
15#include <linux/mtd/partitions.h>
16#include <linux/regulator/machine.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
19#include <linux/etherdevice.h>
20
21#include <asm/mach-types.h>
22#include <asm/mach/arch.h>
23#include <mach/common.h>
24#include <mach/cp_intc.h>
25#include <mach/da8xx.h>
26#include <mach/nand.h>
27#include <mach/mux.h>
28
29#define MITYOMAPL138_PHY_ID "0:03"
30
31#define FACTORY_CONFIG_MAGIC 0x012C0138
32#define FACTORY_CONFIG_VERSION 0x00010001
33
34/* Data Held in On-Board I2C device */
35struct factory_config {
36 u32 magic;
37 u32 version;
38 u8 mac[6];
39 u32 fpga_type;
40 u32 spare;
41 u32 serialnumber;
42 char partnum[32];
43};
44
45static struct factory_config factory_config;
46
47static void read_factory_config(struct memory_accessor *a, void *context)
48{
49 int ret;
50 struct davinci_soc_info *soc_info = &davinci_soc_info;
51
52 ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config));
53 if (ret != sizeof(struct factory_config)) {
54 pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
55 ret);
56 return;
57 }
58
59 if (factory_config.magic != FACTORY_CONFIG_MAGIC) {
60 pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
61 factory_config.magic);
62 return;
63 }
64
65 if (factory_config.version != FACTORY_CONFIG_VERSION) {
66 pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
67 factory_config.version);
68 return;
69 }
70
71 pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac);
72 pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum);
73 if (is_valid_ether_addr(factory_config.mac))
74 memcpy(soc_info->emac_pdata->mac_addr,
75 factory_config.mac, ETH_ALEN);
76 else
77 pr_warning("MityOMAPL138: Invalid MAC found "
78 "in factory config block\n");
79}
80
81static struct at24_platform_data mityomapl138_fd_chip = {
82 .byte_len = 256,
83 .page_size = 8,
84 .flags = AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
85 .setup = read_factory_config,
86 .context = NULL,
87};
88
89static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = {
90 .bus_freq = 100, /* kHz */
91 .bus_delay = 0, /* usec */
92};
93
94/* TPS65023 voltage regulator support */
95/* 1.2V Core */
96static struct regulator_consumer_supply tps65023_dcdc1_consumers[] = {
97 {
98 .supply = "cvdd",
99 },
100};
101
102/* 1.8V */
103static struct regulator_consumer_supply tps65023_dcdc2_consumers[] = {
104 {
105 .supply = "usb0_vdda18",
106 },
107 {
108 .supply = "usb1_vdda18",
109 },
110 {
111 .supply = "ddr_dvdd18",
112 },
113 {
114 .supply = "sata_vddr",
115 },
116};
117
118/* 1.2V */
119static struct regulator_consumer_supply tps65023_dcdc3_consumers[] = {
120 {
121 .supply = "sata_vdd",
122 },
123 {
124 .supply = "usb_cvdd",
125 },
126 {
127 .supply = "pll0_vdda",
128 },
129 {
130 .supply = "pll1_vdda",
131 },
132};
133
134/* 1.8V Aux LDO, not used */
135static struct regulator_consumer_supply tps65023_ldo1_consumers[] = {
136 {
137 .supply = "1.8v_aux",
138 },
139};
140
141/* FPGA VCC Aux (2.5 or 3.3) LDO */
142static struct regulator_consumer_supply tps65023_ldo2_consumers[] = {
143 {
144 .supply = "vccaux",
145 },
146};
147
148static struct regulator_init_data tps65023_regulator_data[] = {
149 /* dcdc1 */
150 {
151 .constraints = {
152 .min_uV = 1150000,
153 .max_uV = 1350000,
154 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
155 REGULATOR_CHANGE_STATUS,
156 .boot_on = 1,
157 },
158 .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers),
159 .consumer_supplies = tps65023_dcdc1_consumers,
160 },
161 /* dcdc2 */
162 {
163 .constraints = {
164 .min_uV = 1800000,
165 .max_uV = 1800000,
166 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
167 .boot_on = 1,
168 },
169 .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers),
170 .consumer_supplies = tps65023_dcdc2_consumers,
171 },
172 /* dcdc3 */
173 {
174 .constraints = {
175 .min_uV = 1200000,
176 .max_uV = 1200000,
177 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
178 .boot_on = 1,
179 },
180 .num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers),
181 .consumer_supplies = tps65023_dcdc3_consumers,
182 },
183 /* ldo1 */
184 {
185 .constraints = {
186 .min_uV = 1800000,
187 .max_uV = 1800000,
188 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
189 .boot_on = 1,
190 },
191 .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers),
192 .consumer_supplies = tps65023_ldo1_consumers,
193 },
194 /* ldo2 */
195 {
196 .constraints = {
197 .min_uV = 2500000,
198 .max_uV = 3300000,
199 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
200 REGULATOR_CHANGE_STATUS,
201 .boot_on = 1,
202 },
203 .num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers),
204 .consumer_supplies = tps65023_ldo2_consumers,
205 },
206};
207
208static struct i2c_board_info __initdata mityomap_tps65023_info[] = {
209 {
210 I2C_BOARD_INFO("tps65023", 0x48),
211 .platform_data = &tps65023_regulator_data[0],
212 },
213 {
214 I2C_BOARD_INFO("24c02", 0x50),
215 .platform_data = &mityomapl138_fd_chip,
216 },
217};
218
219static int __init pmic_tps65023_init(void)
220{
221 return i2c_register_board_info(1, mityomap_tps65023_info,
222 ARRAY_SIZE(mityomap_tps65023_info));
223}
224
225/*
226 * MityDSP-L138 includes a 256 MByte large-page NAND flash
227 * (128K blocks).
228 */
229static struct mtd_partition mityomapl138_nandflash_partition[] = {
230 {
231 .name = "rootfs",
232 .offset = 0,
233 .size = SZ_128M,
234 .mask_flags = 0, /* MTD_WRITEABLE, */
235 },
236 {
237 .name = "homefs",
238 .offset = MTDPART_OFS_APPEND,
239 .size = MTDPART_SIZ_FULL,
240 .mask_flags = 0,
241 },
242};
243
244static struct davinci_nand_pdata mityomapl138_nandflash_data = {
245 .parts = mityomapl138_nandflash_partition,
246 .nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
247 .ecc_mode = NAND_ECC_HW,
248 .options = NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16,
249 .ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
250};
251
252static struct resource mityomapl138_nandflash_resource[] = {
253 {
254 .start = DA8XX_AEMIF_CS3_BASE,
255 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
256 .flags = IORESOURCE_MEM,
257 },
258 {
259 .start = DA8XX_AEMIF_CTL_BASE,
260 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
261 .flags = IORESOURCE_MEM,
262 },
263};
264
265static struct platform_device mityomapl138_nandflash_device = {
266 .name = "davinci_nand",
267 .id = 0,
268 .dev = {
269 .platform_data = &mityomapl138_nandflash_data,
270 },
271 .num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource),
272 .resource = mityomapl138_nandflash_resource,
273};
274
275static struct platform_device *mityomapl138_devices[] __initdata = {
276 &mityomapl138_nandflash_device,
277};
278
279static void __init mityomapl138_setup_nand(void)
280{
281 platform_add_devices(mityomapl138_devices,
282 ARRAY_SIZE(mityomapl138_devices));
283}
284
285static struct davinci_uart_config mityomapl138_uart_config __initdata = {
286 .enabled_uarts = 0x7,
287};
288
289static const short mityomap_mii_pins[] = {
290 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
291 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
292 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
293 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
294 DA850_MDIO_D,
295 -1
296};
297
298static const short mityomap_rmii_pins[] = {
299 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
300 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
301 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
302 DA850_MDIO_D,
303 -1
304};
305
306static void __init mityomapl138_config_emac(void)
307{
308 void __iomem *cfg_chip3_base;
309 int ret;
310 u32 val;
311 struct davinci_soc_info *soc_info = &davinci_soc_info;
312
313 soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */
314
315 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
316 val = __raw_readl(cfg_chip3_base);
317
318 if (soc_info->emac_pdata->rmii_en) {
319 val |= BIT(8);
320 ret = davinci_cfg_reg_list(mityomap_rmii_pins);
321 pr_info("RMII PHY configured\n");
322 } else {
323 val &= ~BIT(8);
324 ret = davinci_cfg_reg_list(mityomap_mii_pins);
325 pr_info("MII PHY configured\n");
326 }
327
328 if (ret) {
329 pr_warning("mii/rmii mux setup failed: %d\n", ret);
330 return;
331 }
332
333 /* configure the CFGCHIP3 register for RMII or MII */
334 __raw_writel(val, cfg_chip3_base);
335
336 soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID;
337
338 ret = da8xx_register_emac();
339 if (ret)
340 pr_warning("emac registration failed: %d\n", ret);
341}
342
343static struct davinci_pm_config da850_pm_pdata = {
344 .sleepcount = 128,
345};
346
347static struct platform_device da850_pm_device = {
348 .name = "pm-davinci",
349 .dev = {
350 .platform_data = &da850_pm_pdata,
351 },
352 .id = -1,
353};
354
355static void __init mityomapl138_init(void)
356{
357 int ret;
358
359 /* for now, no special EDMA channels are reserved */
360 ret = da850_register_edma(NULL);
361 if (ret)
362 pr_warning("edma registration failed: %d\n", ret);
363
364 ret = da8xx_register_watchdog();
365 if (ret)
366 pr_warning("watchdog registration failed: %d\n", ret);
367
368 davinci_serial_init(&mityomapl138_uart_config);
369
370 ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata);
371 if (ret)
372 pr_warning("i2c0 registration failed: %d\n", ret);
373
374 ret = pmic_tps65023_init();
375 if (ret)
376 pr_warning("TPS65023 PMIC init failed: %d\n", ret);
377
378 mityomapl138_setup_nand();
379
380 mityomapl138_config_emac();
381
382 ret = da8xx_register_rtc();
383 if (ret)
384 pr_warning("rtc setup failed: %d\n", ret);
385
386 ret = da850_register_cpufreq("pll0_sysclk3");
387 if (ret)
388 pr_warning("cpufreq registration failed: %d\n", ret);
389
390 ret = da8xx_register_cpuidle();
391 if (ret)
392 pr_warning("cpuidle registration failed: %d\n", ret);
393
394 ret = da850_register_pm(&da850_pm_device);
395 if (ret)
396 pr_warning("da850_evm_init: suspend registration failed: %d\n",
397 ret);
398}
399
400#ifdef CONFIG_SERIAL_8250_CONSOLE
401static int __init mityomapl138_console_init(void)
402{
403 if (!machine_is_mityomapl138())
404 return 0;
405
406 return add_preferred_console("ttyS", 1, "115200");
407}
408console_initcall(mityomapl138_console_init);
409#endif
410
411static void __init mityomapl138_map_io(void)
412{
413 da850_init();
414}
415
416MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
417 .phys_io = IO_PHYS,
418 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
419 .boot_params = (DA8XX_DDR_BASE + 0x100),
420 .map_io = mityomapl138_map_io,
421 .init_irq = cp_intc_init,
422 .timer = &davinci_timer,
423 .init_machine = mityomapl138_init,
424MACHINE_END
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index a4def889275..6c389ff1020 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -39,9 +39,7 @@
39#include <mach/mmc.h> 39#include <mach/mmc.h>
40#include <mach/usb.h> 40#include <mach/usb.h>
41 41
42#define NEUROS_OSD2_PHY_MASK 0x2 42#define NEUROS_OSD2_PHY_ID "0:01"
43#define NEUROS_OSD2_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
44
45#define LXT971_PHY_ID 0x001378e2 43#define LXT971_PHY_ID 0x001378e2
46#define LXT971_PHY_MASK 0xfffffff0 44#define LXT971_PHY_MASK 0xfffffff0
47 45
@@ -252,8 +250,7 @@ static __init void davinci_ntosd2_init(void)
252 davinci_serial_init(&uart_config); 250 davinci_serial_init(&uart_config);
253 dm644x_init_asp(&dm644x_ntosd2_snd_data); 251 dm644x_init_asp(&dm644x_ntosd2_snd_data);
254 252
255 soc_info->emac_pdata->phy_mask = NEUROS_OSD2_PHY_MASK; 253 soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
256 soc_info->emac_pdata->mdio_max_freq = NEUROS_OSD2_MDIO_FREQUENCY;
257 254
258 davinci_setup_usb(1000, 8); 255 davinci_setup_usb(1000, 8);
259 /* 256 /*
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
new file mode 100644
index 00000000000..c472dd88ad9
--- /dev/null
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -0,0 +1,64 @@
1/*
2 * Hawkboard.org based on TI's OMAP-L138 Platform
3 *
4 * Initial code: Syed Mohammed Khasim
5 *
6 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of
10 * any kind, whether express or implied.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/console.h>
15#include <linux/gpio.h>
16
17#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
19
20#include <mach/cp_intc.h>
21#include <mach/da8xx.h>
22
23static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
24 .enabled_uarts = 0x7,
25};
26
27static __init void omapl138_hawk_init(void)
28{
29 int ret;
30
31 davinci_serial_init(&omapl138_hawk_uart_config);
32
33 ret = da8xx_register_watchdog();
34 if (ret)
35 pr_warning("omapl138_hawk_init: "
36 "watchdog registration failed: %d\n",
37 ret);
38}
39
40#ifdef CONFIG_SERIAL_8250_CONSOLE
41static int __init omapl138_hawk_console_init(void)
42{
43 if (!machine_is_omapl138_hawkboard())
44 return 0;
45
46 return add_preferred_console("ttyS", 2, "115200");
47}
48console_initcall(omapl138_hawk_console_init);
49#endif
50
51static void __init omapl138_hawk_map_io(void)
52{
53 da850_init();
54}
55
56MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
57 .phys_io = IO_PHYS,
58 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
59 .boot_params = (DA8XX_DDR_BASE + 0x100),
60 .map_io = omapl138_hawk_map_io,
61 .init_irq = cp_intc_init,
62 .timer = &davinci_timer,
63 .init_machine = omapl138_hawk_init,
64MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 9bdf8aafcc8..61ac96d8f00 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -42,9 +42,7 @@
42#include <mach/mux.h> 42#include <mach/mux.h>
43#include <mach/usb.h> 43#include <mach/usb.h>
44 44
45#define SFFSDR_PHY_MASK (0x2) 45#define SFFSDR_PHY_ID "0:01"
46#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
47
48static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { 46static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
49 /* U-Boot Environment: Block 0 47 /* U-Boot Environment: Block 0
50 * UBL: Block 1 48 * UBL: Block 1
@@ -143,8 +141,7 @@ static __init void davinci_sffsdr_init(void)
143 ARRAY_SIZE(davinci_sffsdr_devices)); 141 ARRAY_SIZE(davinci_sffsdr_devices));
144 sffsdr_init_i2c(); 142 sffsdr_init_i2c();
145 davinci_serial_init(&uart_config); 143 davinci_serial_init(&uart_config);
146 soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK; 144 soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID;
147 soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY;
148 davinci_setup_usb(0, 0); /* We support only peripheral mode. */ 145 davinci_setup_usb(0, 0); /* We support only peripheral mode. */
149 146
150 /* mux VLYNQ pins */ 147 /* mux VLYNQ pins */
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index b4de35b7890..a6db8546022 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -23,6 +23,9 @@
23#include <linux/ratelimit.h> 23#include <linux/ratelimit.h>
24#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/input.h>
27#include <linux/input/matrix_keypad.h>
28
26#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
27#include <asm/mach-types.h> 30#include <asm/mach-types.h>
28 31
@@ -141,10 +144,63 @@ static struct davinci_uart_config serial_config __initconst = {
141 .enabled_uarts = BIT(1), 144 .enabled_uarts = BIT(1),
142}; 145};
143 146
147static const uint32_t keymap[] = {
148 KEY(0, 0, KEY_NUMERIC_1),
149 KEY(0, 1, KEY_NUMERIC_2),
150 KEY(0, 2, KEY_NUMERIC_3),
151 KEY(0, 3, KEY_FN_F1),
152 KEY(0, 4, KEY_MENU),
153
154 KEY(1, 0, KEY_NUMERIC_4),
155 KEY(1, 1, KEY_NUMERIC_5),
156 KEY(1, 2, KEY_NUMERIC_6),
157 KEY(1, 3, KEY_UP),
158 KEY(1, 4, KEY_FN_F2),
159
160 KEY(2, 0, KEY_NUMERIC_7),
161 KEY(2, 1, KEY_NUMERIC_8),
162 KEY(2, 2, KEY_NUMERIC_9),
163 KEY(2, 3, KEY_LEFT),
164 KEY(2, 4, KEY_ENTER),
165
166 KEY(3, 0, KEY_NUMERIC_STAR),
167 KEY(3, 1, KEY_NUMERIC_0),
168 KEY(3, 2, KEY_NUMERIC_POUND),
169 KEY(3, 3, KEY_DOWN),
170 KEY(3, 4, KEY_RIGHT),
171
172 KEY(4, 0, KEY_FN_F3),
173 KEY(4, 1, KEY_FN_F4),
174 KEY(4, 2, KEY_MUTE),
175 KEY(4, 3, KEY_HOME),
176 KEY(4, 4, KEY_BACK),
177
178 KEY(5, 0, KEY_VOLUMEDOWN),
179 KEY(5, 1, KEY_VOLUMEUP),
180 KEY(5, 2, KEY_F1),
181 KEY(5, 3, KEY_F2),
182 KEY(5, 4, KEY_F3),
183};
184
185static const struct matrix_keymap_data keymap_data = {
186 .keymap = keymap,
187 .keymap_size = ARRAY_SIZE(keymap),
188};
189
190static struct matrix_keypad_platform_data keypad_config = {
191 .keymap_data = &keymap_data,
192 .num_row_gpios = 6,
193 .num_col_gpios = 5,
194 .debounce_ms = 0, /* minimum */
195 .active_low = 0, /* pull up realization */
196 .no_autorepeat = 0,
197};
198
144static struct tnetv107x_device_info evm_device_info __initconst = { 199static struct tnetv107x_device_info evm_device_info __initconst = {
145 .serial_config = &serial_config, 200 .serial_config = &serial_config,
146 .mmc_config[1] = &mmc_config, /* controller 1 */ 201 .mmc_config[1] = &mmc_config, /* controller 1 */
147 .nand_config[0] = &nand_config, /* chip select 0 */ 202 .nand_config[0] = &nand_config, /* chip select 0 */
203 .keypad_config = &keypad_config,
148}; 204};
149 205
150static __init void tnetv107x_evm_board_init(void) 206static __init void tnetv107x_evm_board_init(void)
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 054c303caea..01ba080433d 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -236,7 +236,7 @@ static int __init clk_disable_unused(void)
236 if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc)) 236 if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc))
237 continue; 237 continue;
238 238
239 pr_info("Clocks: disable unused %s\n", ck->name); 239 pr_debug("Clocks: disable unused %s\n", ck->name);
240 240
241 davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, 241 davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc,
242 (ck->flags & PSC_SWRSTDISABLE) ? 242 (ck->flags & PSC_SWRSTDISABLE) ?
@@ -287,6 +287,79 @@ static unsigned long clk_sysclk_recalc(struct clk *clk)
287 return rate; 287 return rate;
288} 288}
289 289
290int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
291{
292 unsigned v;
293 struct pll_data *pll;
294 unsigned long input;
295 unsigned ratio = 0;
296
297 /* If this is the PLL base clock, wrong function to call */
298 if (clk->pll_data)
299 return -EINVAL;
300
301 /* There must be a parent... */
302 if (WARN_ON(!clk->parent))
303 return -EINVAL;
304
305 /* ... the parent must be a PLL... */
306 if (WARN_ON(!clk->parent->pll_data))
307 return -EINVAL;
308
309 /* ... and this clock must have a divider. */
310 if (WARN_ON(!clk->div_reg))
311 return -EINVAL;
312
313 pll = clk->parent->pll_data;
314
315 input = clk->parent->rate;
316
317 /* If pre-PLL, source clock is before the multiplier and divider(s) */
318 if (clk->flags & PRE_PLL)
319 input = pll->input_rate;
320
321 if (input > rate) {
322 /*
323 * Can afford to provide an output little higher than requested
324 * only if maximum rate supported by hardware on this sysclk
325 * is known.
326 */
327 if (clk->maxrate) {
328 ratio = DIV_ROUND_CLOSEST(input, rate);
329 if (input / ratio > clk->maxrate)
330 ratio = 0;
331 }
332
333 if (ratio == 0)
334 ratio = DIV_ROUND_UP(input, rate);
335
336 ratio--;
337 }
338
339 if (ratio > PLLDIV_RATIO_MASK)
340 return -EINVAL;
341
342 do {
343 v = __raw_readl(pll->base + PLLSTAT);
344 } while (v & PLLSTAT_GOSTAT);
345
346 v = __raw_readl(pll->base + clk->div_reg);
347 v &= ~PLLDIV_RATIO_MASK;
348 v |= ratio | PLLDIV_EN;
349 __raw_writel(v, pll->base + clk->div_reg);
350
351 v = __raw_readl(pll->base + PLLCMD);
352 v |= PLLCMD_GOSET;
353 __raw_writel(v, pll->base + PLLCMD);
354
355 do {
356 v = __raw_readl(pll->base + PLLSTAT);
357 } while (v & PLLSTAT_GOSTAT);
358
359 return 0;
360}
361EXPORT_SYMBOL(davinci_set_sysclk_rate);
362
290static unsigned long clk_leafclk_recalc(struct clk *clk) 363static unsigned long clk_leafclk_recalc(struct clk *clk)
291{ 364{
292 if (WARN_ON(!clk->parent)) 365 if (WARN_ON(!clk->parent))
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 01e36483ac3..11099980b58 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -70,6 +70,9 @@
70#include <linux/list.h> 70#include <linux/list.h>
71#include <asm/clkdev.h> 71#include <asm/clkdev.h>
72 72
73#define PLLSTAT_GOSTAT BIT(0)
74#define PLLCMD_GOSET BIT(0)
75
73struct pll_data { 76struct pll_data {
74 u32 phys_base; 77 u32 phys_base;
75 void __iomem *base; 78 void __iomem *base;
@@ -86,6 +89,7 @@ struct clk {
86 struct module *owner; 89 struct module *owner;
87 const char *name; 90 const char *name;
88 unsigned long rate; 91 unsigned long rate;
92 unsigned long maxrate; /* H/W supported max rate */
89 u8 usecount; 93 u8 usecount;
90 u8 lpsc; 94 u8 lpsc;
91 u8 gpsc; 95 u8 gpsc;
@@ -118,6 +122,7 @@ struct clk {
118int davinci_clk_init(struct clk_lookup *clocks); 122int davinci_clk_init(struct clk_lookup *clocks);
119int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, 123int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
120 unsigned int mult, unsigned int postdiv); 124 unsigned int mult, unsigned int postdiv);
125int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
121 126
122extern struct platform_device davinci_wdt_device; 127extern struct platform_device davinci_wdt_device;
123extern void davinci_watchdog_reset(struct platform_device *); 128extern void davinci_watchdog_reset(struct platform_device *);
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
index d3fa6de1e20..343de73161f 100644
--- a/arch/arm/mach-davinci/cpufreq.c
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -34,6 +34,8 @@
34struct davinci_cpufreq { 34struct davinci_cpufreq {
35 struct device *dev; 35 struct device *dev;
36 struct clk *armclk; 36 struct clk *armclk;
37 struct clk *asyncclk;
38 unsigned long asyncrate;
37}; 39};
38static struct davinci_cpufreq cpufreq; 40static struct davinci_cpufreq cpufreq;
39 41
@@ -104,15 +106,27 @@ static int davinci_target(struct cpufreq_policy *policy,
104 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 106 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
105 107
106 /* if moving to higher frequency, up the voltage beforehand */ 108 /* if moving to higher frequency, up the voltage beforehand */
107 if (pdata->set_voltage && freqs.new > freqs.old) 109 if (pdata->set_voltage && freqs.new > freqs.old) {
108 pdata->set_voltage(idx); 110 ret = pdata->set_voltage(idx);
111 if (ret)
112 goto out;
113 }
109 114
110 ret = clk_set_rate(armclk, idx); 115 ret = clk_set_rate(armclk, idx);
116 if (ret)
117 goto out;
118
119 if (cpufreq.asyncclk) {
120 ret = clk_set_rate(cpufreq.asyncclk, cpufreq.asyncrate);
121 if (ret)
122 goto out;
123 }
111 124
112 /* if moving to lower freq, lower the voltage after lowering freq */ 125 /* if moving to lower freq, lower the voltage after lowering freq */
113 if (pdata->set_voltage && freqs.new < freqs.old) 126 if (pdata->set_voltage && freqs.new < freqs.old)
114 pdata->set_voltage(idx); 127 pdata->set_voltage(idx);
115 128
129out:
116 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 130 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
117 131
118 return ret; 132 return ret;
@@ -185,6 +199,7 @@ static struct cpufreq_driver davinci_driver = {
185static int __init davinci_cpufreq_probe(struct platform_device *pdev) 199static int __init davinci_cpufreq_probe(struct platform_device *pdev)
186{ 200{
187 struct davinci_cpufreq_config *pdata = pdev->dev.platform_data; 201 struct davinci_cpufreq_config *pdata = pdev->dev.platform_data;
202 struct clk *asyncclk;
188 203
189 if (!pdata) 204 if (!pdata)
190 return -EINVAL; 205 return -EINVAL;
@@ -199,6 +214,12 @@ static int __init davinci_cpufreq_probe(struct platform_device *pdev)
199 return PTR_ERR(cpufreq.armclk); 214 return PTR_ERR(cpufreq.armclk);
200 } 215 }
201 216
217 asyncclk = clk_get(cpufreq.dev, "async");
218 if (!IS_ERR(asyncclk)) {
219 cpufreq.asyncclk = asyncclk;
220 cpufreq.asyncrate = clk_get_rate(asyncclk);
221 }
222
202 return cpufreq_register_driver(&davinci_driver); 223 return cpufreq_register_driver(&davinci_driver);
203} 224}
204 225
@@ -206,6 +227,9 @@ static int __exit davinci_cpufreq_remove(struct platform_device *pdev)
206{ 227{
207 clk_put(cpufreq.armclk); 228 clk_put(cpufreq.armclk);
208 229
230 if (cpufreq.asyncclk)
231 clk_put(cpufreq.asyncclk);
232
209 return cpufreq_unregister_driver(&davinci_driver); 233 return cpufreq_unregister_driver(&davinci_driver);
210} 234}
211 235
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 68ed58a4825..63916b90276 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -86,6 +86,8 @@ static struct clk pll0_sysclk3 = {
86 .parent = &pll0_clk, 86 .parent = &pll0_clk,
87 .flags = CLK_PLL, 87 .flags = CLK_PLL,
88 .div_reg = PLLDIV3, 88 .div_reg = PLLDIV3,
89 .set_rate = davinci_set_sysclk_rate,
90 .maxrate = 100000000,
89}; 91};
90 92
91static struct clk pll0_sysclk4 = { 93static struct clk pll0_sysclk4 = {
@@ -323,12 +325,19 @@ static struct clk lcdc_clk = {
323 .gpsc = 1, 325 .gpsc = 1,
324}; 326};
325 327
326static struct clk mmcsd_clk = { 328static struct clk mmcsd0_clk = {
327 .name = "mmcsd", 329 .name = "mmcsd0",
328 .parent = &pll0_sysclk2, 330 .parent = &pll0_sysclk2,
329 .lpsc = DA8XX_LPSC0_MMC_SD, 331 .lpsc = DA8XX_LPSC0_MMC_SD,
330}; 332};
331 333
334static struct clk mmcsd1_clk = {
335 .name = "mmcsd1",
336 .parent = &pll0_sysclk2,
337 .lpsc = DA850_LPSC1_MMC_SD1,
338 .gpsc = 1,
339};
340
332static struct clk aemif_clk = { 341static struct clk aemif_clk = {
333 .name = "aemif", 342 .name = "aemif",
334 .parent = &pll0_sysclk3, 343 .parent = &pll0_sysclk3,
@@ -375,7 +384,8 @@ static struct clk_lookup da850_clks[] = {
375 CLK("davinci_emac.1", NULL, &emac_clk), 384 CLK("davinci_emac.1", NULL, &emac_clk),
376 CLK("davinci-mcasp.0", NULL, &mcasp_clk), 385 CLK("davinci-mcasp.0", NULL, &mcasp_clk),
377 CLK("da8xx_lcdc.0", NULL, &lcdc_clk), 386 CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
378 CLK("davinci_mmc.0", NULL, &mmcsd_clk), 387 CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
388 CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
379 CLK(NULL, "aemif", &aemif_clk), 389 CLK(NULL, "aemif", &aemif_clk),
380 CLK(NULL, NULL, NULL), 390 CLK(NULL, NULL, NULL),
381}; 391};
@@ -572,15 +582,9 @@ const short da850_cpgmac_pins[] __initdata = {
572 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, 582 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
573 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, 583 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
574 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, 584 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
575 DA850_MDIO_D, 585 DA850_MDIO_D, DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
576 -1 586 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER,
577}; 587 DA850_RMII_MHZ_50_CLK,
578
579const short da850_rmii_pins[] __initdata = {
580 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
581 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
582 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
583 DA850_MDIO_D,
584 -1 588 -1
585}; 589};
586 590
@@ -607,27 +611,19 @@ const short da850_mmcsd0_pins[] __initdata = {
607 -1 611 -1
608}; 612};
609 613
610const short da850_nand_pins[] __initdata = { 614const short da850_emif25_pins[] __initdata = {
611 DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4,
612 DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0,
613 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
614 DA850_NEMA_WE, DA850_NEMA_OE,
615 -1
616};
617
618const short da850_nor_pins[] __initdata = {
619 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, 615 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
620 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, 616 DA850_NEMA_CS_3, DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE,
621 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, 617 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
622 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, 618 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
623 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, 619 DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
624 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, 620 DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
625 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, 621 DA850_EMA_A_0, DA850_EMA_A_1, DA850_EMA_A_2, DA850_EMA_A_3,
626 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, 622 DA850_EMA_A_4, DA850_EMA_A_5, DA850_EMA_A_6, DA850_EMA_A_7,
627 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, 623 DA850_EMA_A_8, DA850_EMA_A_9, DA850_EMA_A_10, DA850_EMA_A_11,
628 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, 624 DA850_EMA_A_12, DA850_EMA_A_13, DA850_EMA_A_14, DA850_EMA_A_15,
629 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, 625 DA850_EMA_A_16, DA850_EMA_A_17, DA850_EMA_A_18, DA850_EMA_A_19,
630 DA850_EMA_A_22, DA850_EMA_A_23, 626 DA850_EMA_A_20, DA850_EMA_A_21, DA850_EMA_A_22, DA850_EMA_A_23,
631 -1 627 -1
632}; 628};
633 629
@@ -851,7 +847,7 @@ static const struct da850_opp da850_opp_300 = {
851 .prediv = 1, 847 .prediv = 1,
852 .mult = 25, 848 .mult = 25,
853 .postdiv = 2, 849 .postdiv = 2,
854 .cvdd_min = 1140000, 850 .cvdd_min = 1200000,
855 .cvdd_max = 1320000, 851 .cvdd_max = 1320000,
856}; 852};
857 853
@@ -860,7 +856,7 @@ static const struct da850_opp da850_opp_200 = {
860 .prediv = 1, 856 .prediv = 1,
861 .mult = 25, 857 .mult = 25,
862 .postdiv = 3, 858 .postdiv = 3,
863 .cvdd_min = 1050000, 859 .cvdd_min = 1100000,
864 .cvdd_max = 1160000, 860 .cvdd_max = 1160000,
865}; 861};
866 862
@@ -869,7 +865,7 @@ static const struct da850_opp da850_opp_96 = {
869 .prediv = 1, 865 .prediv = 1,
870 .mult = 20, 866 .mult = 20,
871 .postdiv = 5, 867 .postdiv = 5,
872 .cvdd_min = 950000, 868 .cvdd_min = 1000000,
873 .cvdd_max = 1050000, 869 .cvdd_max = 1050000,
874}; 870};
875 871
@@ -929,10 +925,16 @@ static struct platform_device da850_cpufreq_device = {
929 .dev = { 925 .dev = {
930 .platform_data = &cpufreq_info, 926 .platform_data = &cpufreq_info,
931 }, 927 },
928 .id = -1,
932}; 929};
933 930
934int __init da850_register_cpufreq(void) 931int __init da850_register_cpufreq(char *async_clk)
935{ 932{
933 /* cpufreq driver can help keep an "async" clock constant */
934 if (async_clk)
935 clk_add_alias("async", da850_cpufreq_device.name,
936 async_clk, NULL);
937
936 return platform_device_register(&da850_cpufreq_device); 938 return platform_device_register(&da850_cpufreq_device);
937} 939}
938 940
@@ -983,7 +985,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index)
983 return 0; 985 return 0;
984} 986}
985#else 987#else
986int __init da850_register_cpufreq(void) 988int __init da850_register_cpufreq(char *async_clk)
987{ 989{
988 return 0; 990 return 0;
989} 991}
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 52bc7b1c6ca..9eec63070e0 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -24,6 +24,7 @@
24#include "clock.h" 24#include "clock.h"
25 25
26#define DA8XX_TPCC_BASE 0x01c00000 26#define DA8XX_TPCC_BASE 0x01c00000
27#define DA850_MMCSD1_BASE 0x01e1b000
27#define DA850_TPCC1_BASE 0x01e30000 28#define DA850_TPCC1_BASE 0x01e30000
28#define DA8XX_TPTC0_BASE 0x01c08000 29#define DA8XX_TPTC0_BASE 0x01c08000
29#define DA8XX_TPTC1_BASE 0x01c08400 30#define DA8XX_TPTC1_BASE 0x01c08400
@@ -41,7 +42,6 @@
41#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 42#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
42#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 43#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
43#define DA8XX_EMAC_RAM_OFFSET 0x0000 44#define DA8XX_EMAC_RAM_OFFSET 0x0000
44#define DA8XX_MDIO_REG_OFFSET 0x4000
45#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K 45#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
46 46
47void __iomem *da8xx_syscfg0_base; 47void __iomem *da8xx_syscfg0_base;
@@ -351,7 +351,7 @@ int __init da8xx_register_watchdog(void)
351static struct resource da8xx_emac_resources[] = { 351static struct resource da8xx_emac_resources[] = {
352 { 352 {
353 .start = DA8XX_EMAC_CPPI_PORT_BASE, 353 .start = DA8XX_EMAC_CPPI_PORT_BASE,
354 .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1, 354 .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
355 .flags = IORESOURCE_MEM, 355 .flags = IORESOURCE_MEM,
356 }, 356 },
357 { 357 {
@@ -380,7 +380,6 @@ struct emac_platform_data da8xx_emac_pdata = {
380 .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, 380 .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET,
381 .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, 381 .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET,
382 .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, 382 .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET,
383 .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET,
384 .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, 383 .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE,
385 .version = EMAC_VERSION_2, 384 .version = EMAC_VERSION_2,
386}; 385};
@@ -395,9 +394,34 @@ static struct platform_device da8xx_emac_device = {
395 .resource = da8xx_emac_resources, 394 .resource = da8xx_emac_resources,
396}; 395};
397 396
397static struct resource da8xx_mdio_resources[] = {
398 {
399 .start = DA8XX_EMAC_MDIO_BASE,
400 .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
401 .flags = IORESOURCE_MEM,
402 },
403};
404
405static struct platform_device da8xx_mdio_device = {
406 .name = "davinci_mdio",
407 .id = 0,
408 .num_resources = ARRAY_SIZE(da8xx_mdio_resources),
409 .resource = da8xx_mdio_resources,
410};
411
398int __init da8xx_register_emac(void) 412int __init da8xx_register_emac(void)
399{ 413{
400 return platform_device_register(&da8xx_emac_device); 414 int ret;
415
416 ret = platform_device_register(&da8xx_mdio_device);
417 if (ret < 0)
418 return ret;
419 ret = platform_device_register(&da8xx_emac_device);
420 if (ret < 0)
421 return ret;
422 ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
423 NULL, &da8xx_emac_device.dev);
424 return ret;
401} 425}
402 426
403static struct resource da830_mcasp1_resources[] = { 427static struct resource da830_mcasp1_resources[] = {
@@ -566,6 +590,44 @@ int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
566 return platform_device_register(&da8xx_mmcsd0_device); 590 return platform_device_register(&da8xx_mmcsd0_device);
567} 591}
568 592
593#ifdef CONFIG_ARCH_DAVINCI_DA850
594static struct resource da850_mmcsd1_resources[] = {
595 { /* registers */
596 .start = DA850_MMCSD1_BASE,
597 .end = DA850_MMCSD1_BASE + SZ_4K - 1,
598 .flags = IORESOURCE_MEM,
599 },
600 { /* interrupt */
601 .start = IRQ_DA850_MMCSDINT0_1,
602 .end = IRQ_DA850_MMCSDINT0_1,
603 .flags = IORESOURCE_IRQ,
604 },
605 { /* DMA RX */
606 .start = EDMA_CTLR_CHAN(1, 28),
607 .end = EDMA_CTLR_CHAN(1, 28),
608 .flags = IORESOURCE_DMA,
609 },
610 { /* DMA TX */
611 .start = EDMA_CTLR_CHAN(1, 29),
612 .end = EDMA_CTLR_CHAN(1, 29),
613 .flags = IORESOURCE_DMA,
614 },
615};
616
617static struct platform_device da850_mmcsd1_device = {
618 .name = "davinci_mmc",
619 .id = 1,
620 .num_resources = ARRAY_SIZE(da850_mmcsd1_resources),
621 .resource = da850_mmcsd1_resources,
622};
623
624int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
625{
626 da850_mmcsd1_device.dev.platform_data = config;
627 return platform_device_register(&da850_mmcsd1_device);
628}
629#endif
630
569static struct resource da8xx_rtc_resources[] = { 631static struct resource da8xx_rtc_resources[] = {
570 { 632 {
571 .start = DA8XX_RTC_BASE, 633 .start = DA8XX_RTC_BASE,
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 2718a3a90df..c9a86d8130d 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -31,8 +31,10 @@
31#define TNETV107X_TPTC0_BASE 0x01c10000 31#define TNETV107X_TPTC0_BASE 0x01c10000
32#define TNETV107X_TPTC1_BASE 0x01c10400 32#define TNETV107X_TPTC1_BASE 0x01c10400
33#define TNETV107X_WDOG_BASE 0x08086700 33#define TNETV107X_WDOG_BASE 0x08086700
34#define TNETV107X_TSC_BASE 0x08088500
34#define TNETV107X_SDIO0_BASE 0x08088700 35#define TNETV107X_SDIO0_BASE 0x08088700
35#define TNETV107X_SDIO1_BASE 0x08088800 36#define TNETV107X_SDIO1_BASE 0x08088800
37#define TNETV107X_KEYPAD_BASE 0x08088a00
36#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000 38#define TNETV107X_ASYNC_EMIF_CNTRL_BASE 0x08200000
37#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000 39#define TNETV107X_ASYNC_EMIF_DATA_CE0_BASE 0x30000000
38#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000 40#define TNETV107X_ASYNC_EMIF_DATA_CE1_BASE 0x40000000
@@ -298,12 +300,55 @@ static int __init nand_init(int chipsel, struct davinci_nand_pdata *data)
298 return platform_device_register(pdev); 300 return platform_device_register(pdev);
299} 301}
300 302
303static struct resource keypad_resources[] = {
304 {
305 .start = TNETV107X_KEYPAD_BASE,
306 .end = TNETV107X_KEYPAD_BASE + 0xff,
307 .flags = IORESOURCE_MEM,
308 },
309 {
310 .start = IRQ_TNETV107X_KEYPAD,
311 .flags = IORESOURCE_IRQ,
312 .name = "press",
313 },
314 {
315 .start = IRQ_TNETV107X_KEYPAD_FREE,
316 .flags = IORESOURCE_IRQ,
317 .name = "release",
318 },
319};
320
321static struct platform_device keypad_device = {
322 .name = "tnetv107x-keypad",
323 .num_resources = ARRAY_SIZE(keypad_resources),
324 .resource = keypad_resources,
325};
326
327static struct resource tsc_resources[] = {
328 {
329 .start = TNETV107X_TSC_BASE,
330 .end = TNETV107X_TSC_BASE + 0xff,
331 .flags = IORESOURCE_MEM,
332 },
333 {
334 .start = IRQ_TNETV107X_TSC,
335 .flags = IORESOURCE_IRQ,
336 },
337};
338
339static struct platform_device tsc_device = {
340 .name = "tnetv107x-ts",
341 .num_resources = ARRAY_SIZE(tsc_resources),
342 .resource = tsc_resources,
343};
344
301void __init tnetv107x_devices_init(struct tnetv107x_device_info *info) 345void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
302{ 346{
303 int i; 347 int i;
304 348
305 platform_device_register(&edma_device); 349 platform_device_register(&edma_device);
306 platform_device_register(&tnetv107x_wdt_device); 350 platform_device_register(&tnetv107x_wdt_device);
351 platform_device_register(&tsc_device);
307 352
308 if (info->serial_config) 353 if (info->serial_config)
309 davinci_serial_init(info->serial_config); 354 davinci_serial_init(info->serial_config);
@@ -317,4 +362,9 @@ void __init tnetv107x_devices_init(struct tnetv107x_device_info *info)
317 for (i = 0; i < 4; i++) 362 for (i = 0; i < 4; i++)
318 if (info->nand_config[i]) 363 if (info->nand_config[i])
319 nand_init(i, info->nand_config[i]); 364 nand_init(i, info->nand_config[i]);
365
366 if (info->keypad_config) {
367 keypad_device.dev.platform_data = info->keypad_config;
368 platform_device_register(&keypad_device);
369 }
320} 370}
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 8b7201e4c79..2a9a252327d 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -213,7 +213,7 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
213 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c); 213 IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
214 214
215 /* Configure pull down control */ 215 /* Configure pull down control */
216 __raw_writel((__raw_readl(pupdctl1) & ~0x400), 216 __raw_writel((__raw_readl(pupdctl1) & ~0xfc0),
217 pupdctl1); 217 pupdctl1);
218 218
219 mmcsd1_resources[0].start = DM365_MMCSD1_BASE; 219 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 7781e35daec..a12065e8726 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -691,7 +691,6 @@ static struct emac_platform_data dm365_emac_pdata = {
691 .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, 691 .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET,
692 .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, 692 .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET,
693 .ctrl_ram_offset = DM365_EMAC_CNTRL_RAM_OFFSET, 693 .ctrl_ram_offset = DM365_EMAC_CNTRL_RAM_OFFSET,
694 .mdio_reg_offset = DM365_EMAC_MDIO_OFFSET,
695 .ctrl_ram_size = DM365_EMAC_CNTRL_RAM_SIZE, 694 .ctrl_ram_size = DM365_EMAC_CNTRL_RAM_SIZE,
696 .version = EMAC_VERSION_2, 695 .version = EMAC_VERSION_2,
697}; 696};
@@ -699,7 +698,7 @@ static struct emac_platform_data dm365_emac_pdata = {
699static struct resource dm365_emac_resources[] = { 698static struct resource dm365_emac_resources[] = {
700 { 699 {
701 .start = DM365_EMAC_BASE, 700 .start = DM365_EMAC_BASE,
702 .end = DM365_EMAC_BASE + 0x47ff, 701 .end = DM365_EMAC_BASE + SZ_16K - 1,
703 .flags = IORESOURCE_MEM, 702 .flags = IORESOURCE_MEM,
704 }, 703 },
705 { 704 {
@@ -734,6 +733,21 @@ static struct platform_device dm365_emac_device = {
734 .resource = dm365_emac_resources, 733 .resource = dm365_emac_resources,
735}; 734};
736 735
736static struct resource dm365_mdio_resources[] = {
737 {
738 .start = DM365_EMAC_MDIO_BASE,
739 .end = DM365_EMAC_MDIO_BASE + SZ_4K - 1,
740 .flags = IORESOURCE_MEM,
741 },
742};
743
744static struct platform_device dm365_mdio_device = {
745 .name = "davinci_mdio",
746 .id = 0,
747 .num_resources = ARRAY_SIZE(dm365_mdio_resources),
748 .resource = dm365_mdio_resources,
749};
750
737static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { 751static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
738 [IRQ_VDINT0] = 2, 752 [IRQ_VDINT0] = 2,
739 [IRQ_VDINT1] = 6, 753 [IRQ_VDINT1] = 6,
@@ -1219,7 +1233,12 @@ static int __init dm365_init_devices(void)
1219 1233
1220 davinci_cfg_reg(DM365_INT_EDMA_CC); 1234 davinci_cfg_reg(DM365_INT_EDMA_CC);
1221 platform_device_register(&dm365_edma_device); 1235 platform_device_register(&dm365_edma_device);
1236
1237 platform_device_register(&dm365_mdio_device);
1222 platform_device_register(&dm365_emac_device); 1238 platform_device_register(&dm365_emac_device);
1239 clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev),
1240 NULL, &dm365_emac_device.dev);
1241
1223 /* Add isif clock alias */ 1242 /* Add isif clock alias */
1224 clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL); 1243 clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL);
1225 platform_device_register(&dm365_vpss_device); 1244 platform_device_register(&dm365_vpss_device);
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 5e5b0a7831f..0608dd776a1 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -322,7 +322,6 @@ static struct emac_platform_data dm644x_emac_pdata = {
322 .ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET, 322 .ctrl_reg_offset = DM644X_EMAC_CNTRL_OFFSET,
323 .ctrl_mod_reg_offset = DM644X_EMAC_CNTRL_MOD_OFFSET, 323 .ctrl_mod_reg_offset = DM644X_EMAC_CNTRL_MOD_OFFSET,
324 .ctrl_ram_offset = DM644X_EMAC_CNTRL_RAM_OFFSET, 324 .ctrl_ram_offset = DM644X_EMAC_CNTRL_RAM_OFFSET,
325 .mdio_reg_offset = DM644X_EMAC_MDIO_OFFSET,
326 .ctrl_ram_size = DM644X_EMAC_CNTRL_RAM_SIZE, 325 .ctrl_ram_size = DM644X_EMAC_CNTRL_RAM_SIZE,
327 .version = EMAC_VERSION_1, 326 .version = EMAC_VERSION_1,
328}; 327};
@@ -330,7 +329,7 @@ static struct emac_platform_data dm644x_emac_pdata = {
330static struct resource dm644x_emac_resources[] = { 329static struct resource dm644x_emac_resources[] = {
331 { 330 {
332 .start = DM644X_EMAC_BASE, 331 .start = DM644X_EMAC_BASE,
333 .end = DM644X_EMAC_BASE + 0x47ff, 332 .end = DM644X_EMAC_BASE + SZ_16K - 1,
334 .flags = IORESOURCE_MEM, 333 .flags = IORESOURCE_MEM,
335 }, 334 },
336 { 335 {
@@ -350,6 +349,21 @@ static struct platform_device dm644x_emac_device = {
350 .resource = dm644x_emac_resources, 349 .resource = dm644x_emac_resources,
351}; 350};
352 351
352static struct resource dm644x_mdio_resources[] = {
353 {
354 .start = DM644X_EMAC_MDIO_BASE,
355 .end = DM644X_EMAC_MDIO_BASE + SZ_4K - 1,
356 .flags = IORESOURCE_MEM,
357 },
358};
359
360static struct platform_device dm644x_mdio_device = {
361 .name = "davinci_mdio",
362 .id = 0,
363 .num_resources = ARRAY_SIZE(dm644x_mdio_resources),
364 .resource = dm644x_mdio_resources,
365};
366
353/* 367/*
354 * Device specific mux setup 368 * Device specific mux setup
355 * 369 *
@@ -776,7 +790,12 @@ static int __init dm644x_init_devices(void)
776 clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); 790 clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
777 clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); 791 clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
778 platform_device_register(&dm644x_edma_device); 792 platform_device_register(&dm644x_edma_device);
793
794 platform_device_register(&dm644x_mdio_device);
779 platform_device_register(&dm644x_emac_device); 795 platform_device_register(&dm644x_emac_device);
796 clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev),
797 NULL, &dm644x_emac_device.dev);
798
780 platform_device_register(&dm644x_vpss_device); 799 platform_device_register(&dm644x_vpss_device);
781 platform_device_register(&dm644x_ccdc_dev); 800 platform_device_register(&dm644x_ccdc_dev);
782 platform_device_register(&vpfe_capture_dev); 801 platform_device_register(&vpfe_capture_dev);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 26e8a9c7f50..1e0f809644b 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -358,7 +358,6 @@ static struct emac_platform_data dm646x_emac_pdata = {
358 .ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET, 358 .ctrl_reg_offset = DM646X_EMAC_CNTRL_OFFSET,
359 .ctrl_mod_reg_offset = DM646X_EMAC_CNTRL_MOD_OFFSET, 359 .ctrl_mod_reg_offset = DM646X_EMAC_CNTRL_MOD_OFFSET,
360 .ctrl_ram_offset = DM646X_EMAC_CNTRL_RAM_OFFSET, 360 .ctrl_ram_offset = DM646X_EMAC_CNTRL_RAM_OFFSET,
361 .mdio_reg_offset = DM646X_EMAC_MDIO_OFFSET,
362 .ctrl_ram_size = DM646X_EMAC_CNTRL_RAM_SIZE, 361 .ctrl_ram_size = DM646X_EMAC_CNTRL_RAM_SIZE,
363 .version = EMAC_VERSION_2, 362 .version = EMAC_VERSION_2,
364}; 363};
@@ -366,7 +365,7 @@ static struct emac_platform_data dm646x_emac_pdata = {
366static struct resource dm646x_emac_resources[] = { 365static struct resource dm646x_emac_resources[] = {
367 { 366 {
368 .start = DM646X_EMAC_BASE, 367 .start = DM646X_EMAC_BASE,
369 .end = DM646X_EMAC_BASE + 0x47ff, 368 .end = DM646X_EMAC_BASE + SZ_16K - 1,
370 .flags = IORESOURCE_MEM, 369 .flags = IORESOURCE_MEM,
371 }, 370 },
372 { 371 {
@@ -401,6 +400,21 @@ static struct platform_device dm646x_emac_device = {
401 .resource = dm646x_emac_resources, 400 .resource = dm646x_emac_resources,
402}; 401};
403 402
403static struct resource dm646x_mdio_resources[] = {
404 {
405 .start = DM646X_EMAC_MDIO_BASE,
406 .end = DM646X_EMAC_MDIO_BASE + SZ_4K - 1,
407 .flags = IORESOURCE_MEM,
408 },
409};
410
411static struct platform_device dm646x_mdio_device = {
412 .name = "davinci_mdio",
413 .id = 0,
414 .num_resources = ARRAY_SIZE(dm646x_mdio_resources),
415 .resource = dm646x_mdio_resources,
416};
417
404/* 418/*
405 * Device specific mux setup 419 * Device specific mux setup
406 * 420 *
@@ -896,7 +910,11 @@ static int __init dm646x_init_devices(void)
896 if (!cpu_is_davinci_dm646x()) 910 if (!cpu_is_davinci_dm646x())
897 return 0; 911 return 0;
898 912
913 platform_device_register(&dm646x_mdio_device);
899 platform_device_register(&dm646x_emac_device); 914 platform_device_register(&dm646x_emac_device);
915 clk_add_alias(NULL, dev_name(&dm646x_mdio_device.dev),
916 NULL, &dm646x_emac_device.dev);
917
900 return 0; 918 return 0;
901} 919}
902postcore_initcall(dm646x_init_devices); 920postcore_initcall(dm646x_init_devices);
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 2ede598b77d..6b9669869c4 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -354,10 +354,12 @@ static int irq2ctlr(int irq)
354static irqreturn_t dma_irq_handler(int irq, void *data) 354static irqreturn_t dma_irq_handler(int irq, void *data)
355{ 355{
356 int i; 356 int i;
357 unsigned ctlr; 357 int ctlr;
358 unsigned int cnt = 0; 358 unsigned int cnt = 0;
359 359
360 ctlr = irq2ctlr(irq); 360 ctlr = irq2ctlr(irq);
361 if (ctlr < 0)
362 return IRQ_NONE;
361 363
362 dev_dbg(data, "dma_irq_handler\n"); 364 dev_dbg(data, "dma_irq_handler\n");
363 365
@@ -408,10 +410,12 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
408static irqreturn_t dma_ccerr_handler(int irq, void *data) 410static irqreturn_t dma_ccerr_handler(int irq, void *data)
409{ 411{
410 int i; 412 int i;
411 unsigned ctlr; 413 int ctlr;
412 unsigned int cnt = 0; 414 unsigned int cnt = 0;
413 415
414 ctlr = irq2ctlr(irq); 416 ctlr = irq2ctlr(irq);
417 if (ctlr < 0)
418 return IRQ_NONE;
415 419
416 dev_dbg(data, "dma_ccerr_handler\n"); 420 dev_dbg(data, "dma_ccerr_handler\n");
417 421
diff --git a/arch/arm/mach-davinci/include/mach/aemif.h b/arch/arm/mach-davinci/include/mach/aemif.h
new file mode 100644
index 00000000000..05b29344309
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/aemif.h
@@ -0,0 +1,36 @@
1/*
2 * TI DaVinci AEMIF support
3 *
4 * Copyright 2010 (C) Texas Instruments, Inc. http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10#ifndef _MACH_DAVINCI_AEMIF_H
11#define _MACH_DAVINCI_AEMIF_H
12
13#define NRCSR_OFFSET 0x00
14#define AWCCR_OFFSET 0x04
15#define A1CR_OFFSET 0x10
16
17#define ACR_ASIZE_MASK 0x3
18#define ACR_EW_MASK BIT(30)
19#define ACR_SS_MASK BIT(31)
20
21/* All timings in nanoseconds */
22struct davinci_aemif_timing {
23 u8 wsetup;
24 u8 wstrobe;
25 u8 whold;
26
27 u8 rsetup;
28 u8 rstrobe;
29 u8 rhold;
30
31 u8 ta;
32};
33
34int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
35 void __iomem *base, unsigned cs);
36#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 3c07059f526..4247b3f53b3 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -76,9 +76,10 @@ int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
76int da8xx_register_emac(void); 76int da8xx_register_emac(void);
77int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); 77int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
78int da8xx_register_mmcsd0(struct davinci_mmc_config *config); 78int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
79int da850_register_mmcsd1(struct davinci_mmc_config *config);
79void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); 80void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
80int da8xx_register_rtc(void); 81int da8xx_register_rtc(void);
81int da850_register_cpufreq(void); 82int da850_register_cpufreq(char *async_clk);
82int da8xx_register_cpuidle(void); 83int da8xx_register_cpuidle(void);
83void __iomem * __init da8xx_get_mem_ctlr(void); 84void __iomem * __init da8xx_get_mem_ctlr(void);
84int da850_register_pm(struct platform_device *pdev); 85int da850_register_pm(struct platform_device *pdev);
@@ -121,11 +122,9 @@ extern const short da850_uart2_pins[];
121extern const short da850_i2c0_pins[]; 122extern const short da850_i2c0_pins[];
122extern const short da850_i2c1_pins[]; 123extern const short da850_i2c1_pins[];
123extern const short da850_cpgmac_pins[]; 124extern const short da850_cpgmac_pins[];
124extern const short da850_rmii_pins[];
125extern const short da850_mcasp_pins[]; 125extern const short da850_mcasp_pins[];
126extern const short da850_lcdcntl_pins[]; 126extern const short da850_lcdcntl_pins[];
127extern const short da850_mmcsd0_pins[]; 127extern const short da850_mmcsd0_pins[];
128extern const short da850_nand_pins[]; 128extern const short da850_emif25_pins[];
129extern const short da850_nor_pins[];
130 129
131#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ 130#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index ea5df3b49ec..2563bf4e93a 100644
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -21,10 +21,10 @@
21#include <media/davinci/vpfe_capture.h> 21#include <media/davinci/vpfe_capture.h>
22 22
23#define DM365_EMAC_BASE (0x01D07000) 23#define DM365_EMAC_BASE (0x01D07000)
24#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000)
24#define DM365_EMAC_CNTRL_OFFSET (0x0000) 25#define DM365_EMAC_CNTRL_OFFSET (0x0000)
25#define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) 26#define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000)
26#define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) 27#define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000)
27#define DM365_EMAC_MDIO_OFFSET (0x4000)
28#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) 28#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000)
29 29
30/* Base of key scan register bank */ 30/* Base of key scan register bank */
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 6fca568a0fd..5a1b26d4e68 100644
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -28,10 +28,10 @@
28#include <media/davinci/vpfe_capture.h> 28#include <media/davinci/vpfe_capture.h>
29 29
30#define DM644X_EMAC_BASE (0x01C80000) 30#define DM644X_EMAC_BASE (0x01C80000)
31#define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000)
31#define DM644X_EMAC_CNTRL_OFFSET (0x0000) 32#define DM644X_EMAC_CNTRL_OFFSET (0x0000)
32#define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000) 33#define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000)
33#define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000) 34#define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000)
34#define DM644X_EMAC_MDIO_OFFSET (0x4000)
35#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) 35#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000)
36 36
37#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000 37#define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 0a27ee9a70e..7a27f3f1391 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -19,10 +19,10 @@
19#include <linux/davinci_emac.h> 19#include <linux/davinci_emac.h>
20 20
21#define DM646X_EMAC_BASE (0x01C80000) 21#define DM646X_EMAC_BASE (0x01C80000)
22#define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000)
22#define DM646X_EMAC_CNTRL_OFFSET (0x0000) 23#define DM646X_EMAC_CNTRL_OFFSET (0x0000)
23#define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000) 24#define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000)
24#define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000) 25#define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000)
25#define DM646X_EMAC_MDIO_OFFSET (0x4000)
26#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) 26#define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000)
27 27
28#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 28#define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
diff --git a/arch/arm/mach-davinci/include/mach/nand.h b/arch/arm/mach-davinci/include/mach/nand.h
index b2ad8090bd1..025151049f0 100644
--- a/arch/arm/mach-davinci/include/mach/nand.h
+++ b/arch/arm/mach-davinci/include/mach/nand.h
@@ -30,9 +30,6 @@
30 30
31#include <linux/mtd/nand.h> 31#include <linux/mtd/nand.h>
32 32
33#define NRCSR_OFFSET 0x00
34#define AWCCR_OFFSET 0x04
35#define A1CR_OFFSET 0x10
36#define NANDFCR_OFFSET 0x60 33#define NANDFCR_OFFSET 0x60
37#define NANDFSR_OFFSET 0x64 34#define NANDFSR_OFFSET 0x64
38#define NANDF1ECC_OFFSET 0x70 35#define NANDF1ECC_OFFSET 0x70
@@ -83,6 +80,9 @@ struct davinci_nand_pdata { /* platform_data */
83 /* Main and mirror bbt descriptor overrides */ 80 /* Main and mirror bbt descriptor overrides */
84 struct nand_bbt_descr *bbt_td; 81 struct nand_bbt_descr *bbt_td;
85 struct nand_bbt_descr *bbt_md; 82 struct nand_bbt_descr *bbt_md;
83
84 /* Access timings */
85 struct davinci_aemif_timing *timing;
86}; 86};
87 87
88#endif /* __ARCH_ARM_DAVINCI_NAND_H */ 88#endif /* __ARCH_ARM_DAVINCI_NAND_H */
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 983da6e4554..62b0858f68c 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -172,6 +172,7 @@
172#define DA8XX_LPSC1_UART2 13 172#define DA8XX_LPSC1_UART2 13
173#define DA8XX_LPSC1_LCDC 16 173#define DA8XX_LPSC1_LCDC 16
174#define DA8XX_LPSC1_PWM 17 174#define DA8XX_LPSC1_PWM 17
175#define DA850_LPSC1_MMC_SD1 18
175#define DA8XX_LPSC1_ECAP 20 176#define DA8XX_LPSC1_ECAP 20
176#define DA830_LPSC1_EQEP 21 177#define DA830_LPSC1_EQEP 21
177#define DA850_LPSC1_TPTC2 21 178#define DA850_LPSC1_TPTC2 21
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index c7206473312..5a681d880dc 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -33,6 +33,8 @@
33#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
34 34
35#include <linux/serial_8250.h> 35#include <linux/serial_8250.h>
36#include <linux/input/matrix_keypad.h>
37
36#include <mach/mmc.h> 38#include <mach/mmc.h>
37#include <mach/nand.h> 39#include <mach/nand.h>
38#include <mach/serial.h> 40#include <mach/serial.h>
@@ -41,6 +43,7 @@ struct tnetv107x_device_info {
41 struct davinci_uart_config *serial_config; 43 struct davinci_uart_config *serial_config;
42 struct davinci_mmc_config *mmc_config[2]; /* 2 controllers */ 44 struct davinci_mmc_config *mmc_config[2]; /* 2 controllers */
43 struct davinci_nand_pdata *nand_config[4]; /* 4 chipsels */ 45 struct davinci_nand_pdata *nand_config[4]; /* 4 chipsels */
46 struct matrix_keypad_platform_data *keypad_config;
44}; 47};
45 48
46extern struct platform_device tnetv107x_wdt_device; 49extern struct platform_device tnetv107x_wdt_device;
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 15a6192ad6e..47723e8d75a 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -88,6 +88,8 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
88 /* DA8xx boards */ 88 /* DA8xx boards */
89 DEBUG_LL_DA8XX(davinci_da830_evm, 2); 89 DEBUG_LL_DA8XX(davinci_da830_evm, 2);
90 DEBUG_LL_DA8XX(davinci_da850_evm, 2); 90 DEBUG_LL_DA8XX(davinci_da850_evm, 2);
91 DEBUG_LL_DA8XX(mityomapl138, 1);
92 DEBUG_LL_DA8XX(omapl138_hawkboard, 2);
91 93
92 /* TNETV107x boards */ 94 /* TNETV107x boards */
93 DEBUG_LL_TNETV107X(tnetv107x, 1); 95 DEBUG_LL_TNETV107X(tnetv107x, 1);
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 864e60482c5..daeae06430b 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -104,7 +104,7 @@ static u32 pll_ext_freq[] = {
104}; 104};
105 105
106/* PSC control registers */ 106/* PSC control registers */
107static u32 psc_regs[] __initconst = { TNETV107X_PSC_BASE }; 107static u32 psc_regs[] = { TNETV107X_PSC_BASE };
108 108
109/* Host map for interrupt controller */ 109/* Host map for interrupt controller */
110static u32 intc_host_map[] = { 0x01010000, 0x01010101, -1 }; 110static u32 intc_host_map[] = { 0x01010000, 0x01010101, -1 };
@@ -581,7 +581,14 @@ static struct davinci_id ids[] = {
581 .part_no = 0xb8a1, 581 .part_no = 0xb8a1,
582 .manufacturer = 0x017, 582 .manufacturer = 0x017,
583 .cpu_id = DAVINCI_CPU_ID_TNETV107X, 583 .cpu_id = DAVINCI_CPU_ID_TNETV107X,
584 .name = "tnetv107x rev1.0", 584 .name = "tnetv107x rev 1.0",
585 },
586 {
587 .variant = 0x1,
588 .part_no = 0xb8a1,
589 .manufacturer = 0x017,
590 .cpu_id = DAVINCI_CPU_ID_TNETV107X,
591 .name = "tnetv107x rev 1.1/1.2",
585 }, 592 },
586}; 593};
587 594
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 15:41:43 -0400