davinci: dm6467/T EVM: fix setting up of reference clock rate

The DM6467 and DM6467T EVMs use different reference clock
frequencies. This difference is currently supported by having
the SoC code call a public board routine which sets up the reference
clock frequency. This does not scale as more boards are added.

Instead, use the clk_set_rate() API to setup the reference clock
frequency to a different value from the board file.

Suggested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Kevin Hilman <khilman@ti.com>

1 files changed, 3 insertions, 1 deletions

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 1e0f809644b..46739c96cd3 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -42,6 +42,7 @@
 /*
  * Device specific clocks
  */
+#define DM646X_REF_FREQ         27000000
 #define DM646X_AUX_FREQ         24000000
 
 static struct pll_data pll1_data = {
@@ -56,6 +57,8 @@ static struct pll_data pll2_data = {
 
 static struct clk ref_clk = {
         .name = "ref_clk",
+        .rate = DM646X_REF_FREQ,
+        .set_rate = davinci_simple_set_rate,
 };
 
 static struct clk aux_clkin = {
@@ -901,7 +904,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv)
 
 void __init dm646x_init(void)
 {
-        dm646x_board_setup_refclk(&ref_clk);
         davinci_common_init(&davinci_soc_info_dm646x);
 }