ARM: at91: pit add DT support

Retreive registers address and IRQ from device tree entry.
Called from at91_dt_init_irq() so that timers are up-n-running
when timers initialization will occur.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: change error path and interrupts property handling]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

1 files changed, 61 insertions, 2 deletions

diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index d89ead740a9..5d71476a283 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -14,6 +14,9 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
 #include <linux/clockchips.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
 
 #include <asm/mach/time.h>
 
@@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 static struct irqaction at91sam926x_pit_irq = {
         .name           = "at91_tick",
         .flags          = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = at91sam926x_pit_interrupt
+        .handler        = at91sam926x_pit_interrupt,
+        .irq            = AT91_ID_SYS,
 };
 
 static void at91sam926x_pit_reset(void)
@@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)
         pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
 }
 
+#ifdef CONFIG_OF
+static struct of_device_id pit_timer_ids[] = {
+        { .compatible = "atmel,at91sam9260-pit" },
+        { /* sentinel */ }
+};
+
+static int __init of_at91sam926x_pit_init(void)
+{
+        struct device_node      *np;
+        int                     ret;
+
+        np = of_find_matching_node(NULL, pit_timer_ids);
+        if (!np)
+                goto err;
+
+        pit_base_addr = of_iomap(np, 0);
+        if (!pit_base_addr)
+                goto node_err;
+
+        /* Get the interrupts property */
+        ret = irq_of_parse_and_map(np, 0);
+        if (!ret)
+                goto ioremap_err;
+        at91sam926x_pit_irq.irq = ret;
+
+        of_node_put(np);
+
+        return 0;
+
+ioremap_err:
+        iounmap(pit_base_addr);
+node_err:
+        of_node_put(np);
+err:
+        return -EINVAL;
+}
+#else
+static int __init of_at91sam926x_pit_init(void)
+{
+        return -EINVAL;
+}
+#endif
+
 /*
  * Set up both clocksource and clockevent support.
  */
@@ -157,6 +204,9 @@ static void __init at91sam926x_pit_init(void)
         unsigned long   pit_rate;
         unsigned        bits;
 
+        /* For device tree enabled device: initialize here */
+        of_at91sam926x_pit_init();
+
         /*
          * Use our actual MCK to figure out how many MCK/16 ticks per
          * 1/HZ period (instead of a compile-time constant LATCH).
@@ -177,7 +227,7 @@ static void __init at91sam926x_pit_init(void)
         clocksource_register_hz(&pit_clk, pit_rate);
 
         /* Set up irq handler */
-        setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
+        setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);
 
         /* Set up and register clockevents */
         pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
@@ -193,6 +243,15 @@ static void at91sam926x_pit_suspend(void)
 
 void __init at91sam926x_ioremap_pit(u32 addr)
 {
+#if defined(CONFIG_OF)
+        struct device_node *np =
+                of_find_matching_node(NULL, pit_timer_ids);
+
+        if (np) {
+                of_node_put(np);
+                return;
+        }
+#endif
         pit_base_addr = ioremap(addr, 16);
 
         if (!pit_base_addr)