diff options
author | Richard Zhao <richard.zhao@linaro.org> | 2011-12-13 20:26:45 -0500 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2011-12-14 08:25:44 -0500 |
commit | 8f9ffecfa9c6d4d813e6fa9f20f549b01f8d070e (patch) | |
tree | 2d23d19868a0b049ebc94c399af63e83961e6262 /arch/arm/boot/dts/imx6q.dtsi | |
parent | 4d191868a658a5b8bcbb93fe32d95688e84da1e6 (diff) |
dts/imx: rename uart labels to consistent with hw spec
UART1/UART2/... is more readable than UART0/UART1/... .
Remove redundant UART comments.
Signed-off-by: Richard Zhao <richard.zhao@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 9d0bf4b4fb3..263e8f3664b 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -14,11 +14,11 @@ | |||
14 | 14 | ||
15 | / { | 15 | / { |
16 | aliases { | 16 | aliases { |
17 | serial0 = &uart0; | 17 | serial0 = &uart1; |
18 | serial1 = &uart1; | 18 | serial1 = &uart2; |
19 | serial2 = &uart2; | 19 | serial2 = &uart3; |
20 | serial3 = &uart3; | 20 | serial3 = &uart4; |
21 | serial4 = &uart4; | 21 | serial4 = &uart5; |
22 | }; | 22 | }; |
23 | 23 | ||
24 | cpus { | 24 | cpus { |
@@ -165,7 +165,7 @@ | |||
165 | status = "disabled"; | 165 | status = "disabled"; |
166 | }; | 166 | }; |
167 | 167 | ||
168 | uart0: uart@02020000 { /* UART1 */ | 168 | uart1: uart@02020000 { |
169 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 169 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
170 | reg = <0x02020000 0x4000>; | 170 | reg = <0x02020000 0x4000>; |
171 | interrupts = <0 26 0x04>; | 171 | interrupts = <0 26 0x04>; |
@@ -543,28 +543,28 @@ | |||
543 | interrupts = <0 18 0x04>; | 543 | interrupts = <0 18 0x04>; |
544 | }; | 544 | }; |
545 | 545 | ||
546 | uart1: uart@021e8000 { /* UART2 */ | 546 | uart2: uart@021e8000 { |
547 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 547 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
548 | reg = <0x021e8000 0x4000>; | 548 | reg = <0x021e8000 0x4000>; |
549 | interrupts = <0 27 0x04>; | 549 | interrupts = <0 27 0x04>; |
550 | status = "disabled"; | 550 | status = "disabled"; |
551 | }; | 551 | }; |
552 | 552 | ||
553 | uart2: uart@021ec000 { /* UART3 */ | 553 | uart3: uart@021ec000 { |
554 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 554 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
555 | reg = <0x021ec000 0x4000>; | 555 | reg = <0x021ec000 0x4000>; |
556 | interrupts = <0 28 0x04>; | 556 | interrupts = <0 28 0x04>; |
557 | status = "disabled"; | 557 | status = "disabled"; |
558 | }; | 558 | }; |
559 | 559 | ||
560 | uart3: uart@021f0000 { /* UART4 */ | 560 | uart4: uart@021f0000 { |
561 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 561 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
562 | reg = <0x021f0000 0x4000>; | 562 | reg = <0x021f0000 0x4000>; |
563 | interrupts = <0 29 0x04>; | 563 | interrupts = <0 29 0x04>; |
564 | status = "disabled"; | 564 | status = "disabled"; |
565 | }; | 565 | }; |
566 | 566 | ||
567 | uart4: uart@021f4000 { /* UART5 */ | 567 | uart5: uart@021f4000 { |
568 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; | 568 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
569 | reg = <0x021f4000 0x4000>; | 569 | reg = <0x021f4000 0x4000>; |
570 | interrupts = <0 30 0x04>; | 570 | interrupts = <0 30 0x04>; |