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authorSourav Poddar <sourav.poddar@ti.com>2012-10-01 07:01:22 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2012-10-01 09:27:48 -0400
commit8284328cd98b9ac9eebf646e6fcb9047bc12bf55 (patch)
tree1c7ab08de0e003d300ab194512cb2847a971b45a /Documentation/smsc_ece1099.txt
parentc6bed9deb6047179a6c58ace847f8b2129085e37 (diff)
mfd: smsc: Add support for smsc gpio io/keypad driver
smsc ece1099 is a keyboard scan or gpio expansion device. The patch create keypad and gpio expander child for this multi function smsc driver. Cc: Benoit Cousson <b-cousson@ti.com> Cc: Felipe Balbi <balbi@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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1What is smsc-ece1099?
2----------------------
3
4The ECE1099 is a 40-Pin 3.3V Keyboard Scan Expansion
5or GPIO Expansion device. The device supports a keyboard
6scan matrix of 23x8. The device is connected to a Master
7via the SMSC BC-Link interface or via the SMBus.
8Keypad scan Input(KSI) and Keypad Scan Output(KSO) signals
9are multiplexed with GPIOs.
10
11Interrupt generation
12--------------------
13
14Interrupts can be generated by an edge detection on a GPIO
15pin or an edge detection on one of the bus interface pins.
16Interrupts can also be detected on the keyboard scan interface.
17The bus interrupt pin (BC_INT# or SMBUS_INT#) is asserted if
18any bit in one of the Interrupt Status registers is 1 and
19the corresponding Interrupt Mask bit is also 1.
20
21In order for software to determine which device is the source
22of an interrupt, it should first read the Group Interrupt Status Register
23to determine which Status register group is a source for the interrupt.
24Software should read both the Status register and the associated Mask register,
25then AND the two values together. Bits that are 1 in the result of the AND
26are active interrupts. Software clears an interrupt by writing a 1 to the
27corresponding bit in the Status register.
28
29Communication Protocol
30----------------------
31
32- SMbus slave Interface
33 The host processor communicates with the ECE1099 device
34 through a series of read/write registers via the SMBus
35 interface. SMBus is a serial communication protocol between
36 a computer host and its peripheral devices. The SMBus data
37 rate is 10KHz minimum to 400 KHz maximum
38
39- Slave Bus Interface
40 The ECE1099 device SMBus implementation is a subset of the
41 SMBus interface to the host. The device is a slave-only SMBus device.
42 The implementation in the device is a subset of SMBus since it
43 only supports four protocols.
44
45 The Write Byte, Read Byte, Send Byte, and Receive Byte protocols are the
46 only valid SMBus protocols for the device.
47
48- BC-LinkTM Interface
49 The BC-Link is a proprietary bus that allows communication
50 between a Master device and a Companion device. The Master
51 device uses this serial bus to read and write registers
52 located on the Companion device. The bus comprises three signals,
53 BC_CLK, BC_DAT and BC_INT#. The Master device always provides the
54 clock, BC_CLK, and the Companion device is the source for an
55 independent asynchronous interrupt signal, BC_INT#. The ECE1099
56 supports BC-Link speeds up to 24MHz.