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author | Ingo Molnar <mingo@elte.hu> | 2008-07-31 12:43:41 -0400 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-31 12:43:41 -0400 |
commit | 85e9ca333d03fbd56b9e123c8456f0d98e20faad (patch) | |
tree | 7bb15ada5f536950efa23ad60ea9eea60380ca1c /Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt | |
parent | a300bec952127d9a15e666b391bb35c9aecb3002 (diff) | |
parent | 6e86841d05f371b5b9b86ce76c02aaee83352298 (diff) |
Merge branch 'linus' into timers/hpet
Diffstat (limited to 'Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt new file mode 100644 index 00000000000..78790d58dc2 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt | |||
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1 | * Freescale QUICC Engine module (QE) | ||
2 | This represents qe module that is installed on PowerQUICC II Pro. | ||
3 | |||
4 | NOTE: This is an interim binding; it should be updated to fit | ||
5 | in with the CPM binding later in this document. | ||
6 | |||
7 | Basically, it is a bus of devices, that could act more or less | ||
8 | as a complete entity (UCC, USB etc ). All of them should be siblings on | ||
9 | the "root" qe node, using the common properties from there. | ||
10 | The description below applies to the qe of MPC8360 and | ||
11 | more nodes and properties would be extended in the future. | ||
12 | |||
13 | i) Root QE device | ||
14 | |||
15 | Required properties: | ||
16 | - compatible : should be "fsl,qe"; | ||
17 | - model : precise model of the QE, Can be "QE", "CPM", or "CPM2" | ||
18 | - reg : offset and length of the device registers. | ||
19 | - bus-frequency : the clock frequency for QUICC Engine. | ||
20 | |||
21 | Recommended properties | ||
22 | - brg-frequency : the internal clock source frequency for baud-rate | ||
23 | generators in Hz. | ||
24 | |||
25 | Example: | ||
26 | qe@e0100000 { | ||
27 | #address-cells = <1>; | ||
28 | #size-cells = <1>; | ||
29 | #interrupt-cells = <2>; | ||
30 | compatible = "fsl,qe"; | ||
31 | ranges = <0 e0100000 00100000>; | ||
32 | reg = <e0100000 480>; | ||
33 | brg-frequency = <0>; | ||
34 | bus-frequency = <179A7B00>; | ||
35 | } | ||
36 | |||
37 | * Multi-User RAM (MURAM) | ||
38 | |||
39 | Required properties: | ||
40 | - compatible : should be "fsl,qe-muram", "fsl,cpm-muram". | ||
41 | - mode : the could be "host" or "slave". | ||
42 | - ranges : Should be defined as specified in 1) to describe the | ||
43 | translation of MURAM addresses. | ||
44 | - data-only : sub-node which defines the address area under MURAM | ||
45 | bus that can be allocated as data/parameter | ||
46 | |||
47 | Example: | ||
48 | |||
49 | muram@10000 { | ||
50 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; | ||
51 | ranges = <0 00010000 0000c000>; | ||
52 | |||
53 | data-only@0{ | ||
54 | compatible = "fsl,qe-muram-data", | ||
55 | "fsl,cpm-muram-data"; | ||
56 | reg = <0 c000>; | ||
57 | }; | ||
58 | }; | ||