diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2009-06-19 09:31:05 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2009-06-23 09:09:58 -0400 |
commit | b053dc5a722eade28514f2cc922caf7a4baad987 (patch) | |
tree | 10cd99454c250f207510ed6bda25bac80a970e01 /Documentation/powerpc/dts-bindings/4xx | |
parent | cb1ffb6204712b04396ae0a9f3d1bf93cd8df8fb (diff) |
powerpc: Refactor device tree binding
Split device tree binding out of booting-without-of.txt and put them
into their own files per binding.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/powerpc/dts-bindings/4xx')
-rw-r--r-- | Documentation/powerpc/dts-bindings/4xx/emac.txt | 148 |
1 files changed, 148 insertions, 0 deletions
diff --git a/Documentation/powerpc/dts-bindings/4xx/emac.txt b/Documentation/powerpc/dts-bindings/4xx/emac.txt new file mode 100644 index 00000000000..2161334a7ca --- /dev/null +++ b/Documentation/powerpc/dts-bindings/4xx/emac.txt | |||
@@ -0,0 +1,148 @@ | |||
1 | 4xx/Axon EMAC ethernet nodes | ||
2 | |||
3 | The EMAC ethernet controller in IBM and AMCC 4xx chips, and also | ||
4 | the Axon bridge. To operate this needs to interact with a ths | ||
5 | special McMAL DMA controller, and sometimes an RGMII or ZMII | ||
6 | interface. In addition to the nodes and properties described | ||
7 | below, the node for the OPB bus on which the EMAC sits must have a | ||
8 | correct clock-frequency property. | ||
9 | |||
10 | i) The EMAC node itself | ||
11 | |||
12 | Required properties: | ||
13 | - device_type : "network" | ||
14 | |||
15 | - compatible : compatible list, contains 2 entries, first is | ||
16 | "ibm,emac-CHIP" where CHIP is the host ASIC (440gx, | ||
17 | 405gp, Axon) and second is either "ibm,emac" or | ||
18 | "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", | ||
19 | "ibm,emac4" | ||
20 | - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> | ||
21 | - interrupt-parent : optional, if needed for interrupt mapping | ||
22 | - reg : <registers mapping> | ||
23 | - local-mac-address : 6 bytes, MAC address | ||
24 | - mal-device : phandle of the associated McMAL node | ||
25 | - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated | ||
26 | with this EMAC | ||
27 | - mal-rx-channel : 1 cell, index of the rx channel on McMAL associated | ||
28 | with this EMAC | ||
29 | - cell-index : 1 cell, hardware index of the EMAC cell on a given | ||
30 | ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on | ||
31 | each Axon chip) | ||
32 | - max-frame-size : 1 cell, maximum frame size supported in bytes | ||
33 | - rx-fifo-size : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec | ||
34 | operations. | ||
35 | For Axon, 2048 | ||
36 | - tx-fifo-size : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec | ||
37 | operations. | ||
38 | For Axon, 2048. | ||
39 | - fifo-entry-size : 1 cell, size of a fifo entry (used to calculate | ||
40 | thresholds). | ||
41 | For Axon, 0x00000010 | ||
42 | - mal-burst-size : 1 cell, MAL burst size (used to calculate thresholds) | ||
43 | in bytes. | ||
44 | For Axon, 0x00000100 (I think ...) | ||
45 | - phy-mode : string, mode of operations of the PHY interface. | ||
46 | Supported values are: "mii", "rmii", "smii", "rgmii", | ||
47 | "tbi", "gmii", rtbi", "sgmii". | ||
48 | For Axon on CAB, it is "rgmii" | ||
49 | - mdio-device : 1 cell, required iff using shared MDIO registers | ||
50 | (440EP). phandle of the EMAC to use to drive the | ||
51 | MDIO lines for the PHY used by this EMAC. | ||
52 | - zmii-device : 1 cell, required iff connected to a ZMII. phandle of | ||
53 | the ZMII device node | ||
54 | - zmii-channel : 1 cell, required iff connected to a ZMII. Which ZMII | ||
55 | channel or 0xffffffff if ZMII is only used for MDIO. | ||
56 | - rgmii-device : 1 cell, required iff connected to an RGMII. phandle | ||
57 | of the RGMII device node. | ||
58 | For Axon: phandle of plb5/plb4/opb/rgmii | ||
59 | - rgmii-channel : 1 cell, required iff connected to an RGMII. Which | ||
60 | RGMII channel is used by this EMAC. | ||
61 | Fox Axon: present, whatever value is appropriate for each | ||
62 | EMAC, that is the content of the current (bogus) "phy-port" | ||
63 | property. | ||
64 | |||
65 | Optional properties: | ||
66 | - phy-address : 1 cell, optional, MDIO address of the PHY. If absent, | ||
67 | a search is performed. | ||
68 | - phy-map : 1 cell, optional, bitmap of addresses to probe the PHY | ||
69 | for, used if phy-address is absent. bit 0x00000001 is | ||
70 | MDIO address 0. | ||
71 | For Axon it can be absent, though my current driver | ||
72 | doesn't handle phy-address yet so for now, keep | ||
73 | 0x00ffffff in it. | ||
74 | - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec | ||
75 | operations (if absent the value is the same as | ||
76 | rx-fifo-size). For Axon, either absent or 2048. | ||
77 | - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec | ||
78 | operations (if absent the value is the same as | ||
79 | tx-fifo-size). For Axon, either absent or 2048. | ||
80 | - tah-device : 1 cell, optional. If connected to a TAH engine for | ||
81 | offload, phandle of the TAH device node. | ||
82 | - tah-channel : 1 cell, optional. If appropriate, channel used on the | ||
83 | TAH engine. | ||
84 | |||
85 | Example: | ||
86 | |||
87 | EMAC0: ethernet@40000800 { | ||
88 | device_type = "network"; | ||
89 | compatible = "ibm,emac-440gp", "ibm,emac"; | ||
90 | interrupt-parent = <&UIC1>; | ||
91 | interrupts = <1c 4 1d 4>; | ||
92 | reg = <40000800 70>; | ||
93 | local-mac-address = [00 04 AC E3 1B 1E]; | ||
94 | mal-device = <&MAL0>; | ||
95 | mal-tx-channel = <0 1>; | ||
96 | mal-rx-channel = <0>; | ||
97 | cell-index = <0>; | ||
98 | max-frame-size = <5dc>; | ||
99 | rx-fifo-size = <1000>; | ||
100 | tx-fifo-size = <800>; | ||
101 | phy-mode = "rmii"; | ||
102 | phy-map = <00000001>; | ||
103 | zmii-device = <&ZMII0>; | ||
104 | zmii-channel = <0>; | ||
105 | }; | ||
106 | |||
107 | ii) McMAL node | ||
108 | |||
109 | Required properties: | ||
110 | - device_type : "dma-controller" | ||
111 | - compatible : compatible list, containing 2 entries, first is | ||
112 | "ibm,mcmal-CHIP" where CHIP is the host ASIC (like | ||
113 | emac) and the second is either "ibm,mcmal" or | ||
114 | "ibm,mcmal2". | ||
115 | For Axon, "ibm,mcmal-axon","ibm,mcmal2" | ||
116 | - interrupts : <interrupt mapping for the MAL interrupts sources: | ||
117 | 5 sources: tx_eob, rx_eob, serr, txde, rxde>. | ||
118 | For Axon: This is _different_ from the current | ||
119 | firmware. We use the "delayed" interrupts for txeob | ||
120 | and rxeob. Thus we end up with mapping those 5 MPIC | ||
121 | interrupts, all level positive sensitive: 10, 11, 32, | ||
122 | 33, 34 (in decimal) | ||
123 | - dcr-reg : < DCR registers range > | ||
124 | - dcr-parent : if needed for dcr-reg | ||
125 | - num-tx-chans : 1 cell, number of Tx channels | ||
126 | - num-rx-chans : 1 cell, number of Rx channels | ||
127 | |||
128 | iii) ZMII node | ||
129 | |||
130 | Required properties: | ||
131 | - compatible : compatible list, containing 2 entries, first is | ||
132 | "ibm,zmii-CHIP" where CHIP is the host ASIC (like | ||
133 | EMAC) and the second is "ibm,zmii". | ||
134 | For Axon, there is no ZMII node. | ||
135 | - reg : <registers mapping> | ||
136 | |||
137 | iv) RGMII node | ||
138 | |||
139 | Required properties: | ||
140 | - compatible : compatible list, containing 2 entries, first is | ||
141 | "ibm,rgmii-CHIP" where CHIP is the host ASIC (like | ||
142 | EMAC) and the second is "ibm,rgmii". | ||
143 | For Axon, "ibm,rgmii-axon","ibm,rgmii" | ||
144 | - reg : <registers mapping> | ||
145 | - revision : as provided by the RGMII new version register if | ||
146 | available. | ||
147 | For Axon: 0x0000012a | ||
148 | |||