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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /Documentation/i2c
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'Documentation/i2c')
-rw-r--r--Documentation/i2c/busses/i2c-i80115
-rw-r--r--Documentation/i2c/busses/i2c-piix49
-rw-r--r--Documentation/i2c/busses/i2c-viapro6
-rw-r--r--Documentation/i2c/busses/scx200_acb2
-rw-r--r--Documentation/i2c/functionality9
-rw-r--r--Documentation/i2c/i2c-protocol9
-rw-r--r--Documentation/i2c/instantiating-devices6
-rw-r--r--Documentation/i2c/muxes/i2c-mux-gpio83
-rw-r--r--Documentation/i2c/smbus-protocol48
-rw-r--r--Documentation/i2c/ten-bit-addresses36
-rw-r--r--Documentation/i2c/writing-clients23
11 files changed, 46 insertions, 200 deletions
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801
index 157416e78cc..2871fd50034 100644
--- a/Documentation/i2c/busses/i2c-i801
+++ b/Documentation/i2c/busses/i2c-i801
@@ -20,8 +20,6 @@ Supported adapters:
20 * Intel Patsburg (PCH) 20 * Intel Patsburg (PCH)
21 * Intel DH89xxCC (PCH) 21 * Intel DH89xxCC (PCH)
22 * Intel Panther Point (PCH) 22 * Intel Panther Point (PCH)
23 * Intel Lynx Point (PCH)
24 * Intel Lynx Point-LP (PCH)
25 Datasheets: Publicly available at the Intel website 23 Datasheets: Publicly available at the Intel website
26 24
27On Intel Patsburg and later chipsets, both the normal host SMBus controller 25On Intel Patsburg and later chipsets, both the normal host SMBus controller
@@ -39,10 +37,9 @@ Module Parameters
39Disable selected features normally supported by the device. This makes it 37Disable selected features normally supported by the device. This makes it
40possible to work around possible driver or hardware bugs if the feature in 38possible to work around possible driver or hardware bugs if the feature in
41question doesn't work as intended for whatever reason. Bit values: 39question doesn't work as intended for whatever reason. Bit values:
42 0x01 disable SMBus PEC 40 1 disable SMBus PEC
43 0x02 disable the block buffer 41 2 disable the block buffer
44 0x08 disable the I2C block read functionality 42 8 disable the I2C block read functionality
45 0x10 don't use interrupts
46 43
47 44
48Description 45Description
@@ -88,12 +85,6 @@ SMBus 2.0 Support
88The 82801DB (ICH4) and later chips support several SMBus 2.0 features. 85The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
89 86
90 87
91Interrupt Support
92-----------------
93
94PCI interrupt support is supported on the 82801EB (ICH5) and later chips.
95
96
97Hidden ICH SMBus 88Hidden ICH SMBus
98---------------- 89----------------
99 90
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4
index 1e6634f54c5..475bb4ae072 100644
--- a/Documentation/i2c/busses/i2c-piix4
+++ b/Documentation/i2c/busses/i2c-piix4
@@ -8,11 +8,6 @@ Supported adapters:
8 Datasheet: Only available via NDA from ServerWorks 8 Datasheet: Only available via NDA from ServerWorks
9 * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges 9 * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
10 Datasheet: Not publicly available 10 Datasheet: Not publicly available
11 SB700 register reference available at:
12 http://support.amd.com/us/Embedded_TechDocs/43009_sb7xx_rrg_pub_1.00.pdf
13 * AMD SP5100 (SB700 derivative found on some server mainboards)
14 Datasheet: Publicly available at the AMD website
15 http://support.amd.com/us/Embedded_TechDocs/44413.pdf
16 * AMD Hudson-2 11 * AMD Hudson-2
17 Datasheet: Not publicly available 12 Datasheet: Not publicly available
18 * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge 13 * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
@@ -73,10 +68,6 @@ this driver on those mainboards.
73The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are 68The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
74identical to the PIIX4 in I2C/SMBus support. 69identical to the PIIX4 in I2C/SMBus support.
75 70
76The AMD SB700 and SP5100 chipsets implement two PIIX4-compatible SMBus
77controllers. If your BIOS initializes the secondary controller, it will
78be detected by this driver as an "Auxiliary SMBus Host Controller".
79
80If you own Force CPCI735 motherboard or other OSB4 based systems you may need 71If you own Force CPCI735 motherboard or other OSB4 based systems you may need
81to change the SMBus Interrupt Select register so the SMBus controller uses 72to change the SMBus Interrupt Select register so the SMBus controller uses
82the SMI mode. 73the SMI mode.
diff --git a/Documentation/i2c/busses/i2c-viapro b/Documentation/i2c/busses/i2c-viapro
index b88f91ae580..2e758b0e945 100644
--- a/Documentation/i2c/busses/i2c-viapro
+++ b/Documentation/i2c/busses/i2c-viapro
@@ -20,10 +20,7 @@ Supported adapters:
20 Datasheet: available on http://linux.via.com.tw 20 Datasheet: available on http://linux.via.com.tw
21 21
22 * VIA Technologies, Inc. VX855/VX875 22 * VIA Technologies, Inc. VX855/VX875
23 Datasheet: available on http://linux.via.com.tw 23 Datasheet: Availability unknown
24
25 * VIA Technologies, Inc. VX900
26 Datasheet: available on http://linux.via.com.tw
27 24
28Authors: 25Authors:
29 Kyösti Mälkki <kmalkki@cc.hut.fi>, 26 Kyösti Mälkki <kmalkki@cc.hut.fi>,
@@ -60,7 +57,6 @@ Your lspci -n listing must show one of these :
60 device 1106:8324 (CX700) 57 device 1106:8324 (CX700)
61 device 1106:8353 (VX800/VX820) 58 device 1106:8353 (VX800/VX820)
62 device 1106:8409 (VX855/VX875) 59 device 1106:8409 (VX855/VX875)
63 device 1106:8410 (VX900)
64 60
65If none of these show up, you should look in the BIOS for settings like 61If none of these show up, you should look in the BIOS for settings like
66enable ACPI / SMBus or even USB. 62enable ACPI / SMBus or even USB.
diff --git a/Documentation/i2c/busses/scx200_acb b/Documentation/i2c/busses/scx200_acb
index ce83c871fe9..7c07883d4df 100644
--- a/Documentation/i2c/busses/scx200_acb
+++ b/Documentation/i2c/busses/scx200_acb
@@ -28,5 +28,5 @@ If the scx200_acb driver is built into the kernel, add the following
28parameter to your boot command line: 28parameter to your boot command line:
29 scx200_acb.base=0x810,0x820 29 scx200_acb.base=0x810,0x820
30If the scx200_acb driver is built as a module, add the following line to 30If the scx200_acb driver is built as a module, add the following line to
31a configuration file in /etc/modprobe.d/ instead: 31the file /etc/modprobe.conf instead:
32 options scx200_acb base=0x810,0x820 32 options scx200_acb base=0x810,0x820
diff --git a/Documentation/i2c/functionality b/Documentation/i2c/functionality
index b0ff2ab596c..42c17c1fb3c 100644
--- a/Documentation/i2c/functionality
+++ b/Documentation/i2c/functionality
@@ -18,9 +18,9 @@ For the most up-to-date list of functionality constants, please check
18 adapters typically can not do these) 18 adapters typically can not do these)
19 I2C_FUNC_10BIT_ADDR Handles the 10-bit address extensions 19 I2C_FUNC_10BIT_ADDR Handles the 10-bit address extensions
20 I2C_FUNC_PROTOCOL_MANGLING Knows about the I2C_M_IGNORE_NAK, 20 I2C_FUNC_PROTOCOL_MANGLING Knows about the I2C_M_IGNORE_NAK,
21 I2C_M_REV_DIR_ADDR and I2C_M_NO_RD_ACK 21 I2C_M_REV_DIR_ADDR, I2C_M_NOSTART and
22 flags (which modify the I2C protocol!) 22 I2C_M_NO_RD_ACK flags (which modify the
23 I2C_FUNC_NOSTART Can skip repeated start sequence 23 I2C protocol!)
24 I2C_FUNC_SMBUS_QUICK Handles the SMBus write_quick command 24 I2C_FUNC_SMBUS_QUICK Handles the SMBus write_quick command
25 I2C_FUNC_SMBUS_READ_BYTE Handles the SMBus read_byte command 25 I2C_FUNC_SMBUS_READ_BYTE Handles the SMBus read_byte command
26 I2C_FUNC_SMBUS_WRITE_BYTE Handles the SMBus write_byte command 26 I2C_FUNC_SMBUS_WRITE_BYTE Handles the SMBus write_byte command
@@ -50,9 +50,6 @@ A few combinations of the above flags are also defined for your convenience:
50 emulated by a real I2C adapter (using 50 emulated by a real I2C adapter (using
51 the transparent emulation layer) 51 the transparent emulation layer)
52 52
53In kernel versions prior to 3.5 I2C_FUNC_NOSTART was implemented as
54part of I2C_FUNC_PROTOCOL_MANGLING.
55
56 53
57ADAPTER IMPLEMENTATION 54ADAPTER IMPLEMENTATION
58---------------------- 55----------------------
diff --git a/Documentation/i2c/i2c-protocol b/Documentation/i2c/i2c-protocol
index 0b3e62d1f77..10518dd5881 100644
--- a/Documentation/i2c/i2c-protocol
+++ b/Documentation/i2c/i2c-protocol
@@ -49,9 +49,7 @@ a byte read, followed by a byte write:
49Modified transactions 49Modified transactions
50===================== 50=====================
51 51
52The following modifications to the I2C protocol can also be generated, 52We have found some I2C devices that needs the following modifications:
53with the exception of I2C_M_NOSTART these are usually only needed to
54work around device issues:
55 53
56 Flag I2C_M_NOSTART: 54 Flag I2C_M_NOSTART:
57 In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some 55 In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
@@ -62,11 +60,6 @@ work around device issues:
62 we do not generate Addr, but we do generate the startbit S. This will 60 we do not generate Addr, but we do generate the startbit S. This will
63 probably confuse all other clients on your bus, so don't try this. 61 probably confuse all other clients on your bus, so don't try this.
64 62
65 This is often used to gather transmits from multiple data buffers in
66 system memory into something that appears as a single transfer to the
67 I2C device but may also be used between direction changes by some
68 rare devices.
69
70 Flags I2C_M_REV_DIR_ADDR 63 Flags I2C_M_REV_DIR_ADDR
71 This toggles the Rd/Wr flag. That is, if you want to do a write, but 64 This toggles the Rd/Wr flag. That is, if you want to do a write, but
72 need to emit an Rd instead of a Wr, or vice versa, you set this 65 need to emit an Rd instead of a Wr, or vice versa, you set this
diff --git a/Documentation/i2c/instantiating-devices b/Documentation/i2c/instantiating-devices
index 22182660dda..9edb75d8c9b 100644
--- a/Documentation/i2c/instantiating-devices
+++ b/Documentation/i2c/instantiating-devices
@@ -87,11 +87,11 @@ it may have different addresses from one board to the next (manufacturer
87changing its design without notice). In this case, you can call 87changing its design without notice). In this case, you can call
88i2c_new_probed_device() instead of i2c_new_device(). 88i2c_new_probed_device() instead of i2c_new_device().
89 89
90Example (from the nxp OHCI driver): 90Example (from the pnx4008 OHCI driver):
91 91
92static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END }; 92static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };
93 93
94static int usb_hcd_nxp_probe(struct platform_device *pdev) 94static int __devinit usb_hcd_pnx4008_probe(struct platform_device *pdev)
95{ 95{
96 (...) 96 (...)
97 struct i2c_adapter *i2c_adap; 97 struct i2c_adapter *i2c_adap;
@@ -100,7 +100,7 @@ static int usb_hcd_nxp_probe(struct platform_device *pdev)
100 (...) 100 (...)
101 i2c_adap = i2c_get_adapter(2); 101 i2c_adap = i2c_get_adapter(2);
102 memset(&i2c_info, 0, sizeof(struct i2c_board_info)); 102 memset(&i2c_info, 0, sizeof(struct i2c_board_info));
103 strlcpy(i2c_info.type, "isp1301_nxp", I2C_NAME_SIZE); 103 strlcpy(i2c_info.type, "isp1301_pnx", I2C_NAME_SIZE);
104 isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info, 104 isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info,
105 normal_i2c, NULL); 105 normal_i2c, NULL);
106 i2c_put_adapter(i2c_adap); 106 i2c_put_adapter(i2c_adap);
diff --git a/Documentation/i2c/muxes/i2c-mux-gpio b/Documentation/i2c/muxes/i2c-mux-gpio
deleted file mode 100644
index d4d91a53fc3..00000000000
--- a/Documentation/i2c/muxes/i2c-mux-gpio
+++ /dev/null
@@ -1,83 +0,0 @@
1Kernel driver i2c-gpio-mux
2
3Author: Peter Korsgaard <peter.korsgaard@barco.com>
4
5Description
6-----------
7
8i2c-gpio-mux is an i2c mux driver providing access to I2C bus segments
9from a master I2C bus and a hardware MUX controlled through GPIO pins.
10
11E.G.:
12
13 ---------- ---------- Bus segment 1 - - - - -
14 | | SCL/SDA | |-------------- | |
15 | |------------| |
16 | | | | Bus segment 2 | |
17 | Linux | GPIO 1..N | MUX |--------------- Devices
18 | |------------| | | |
19 | | | | Bus segment M
20 | | | |---------------| |
21 ---------- ---------- - - - - -
22
23SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
24according to the settings of the GPIO pins 1..N.
25
26Usage
27-----
28
29i2c-gpio-mux uses the platform bus, so you need to provide a struct
30platform_device with the platform_data pointing to a struct
31gpio_i2cmux_platform_data with the I2C adapter number of the master
32bus, the number of bus segments to create and the GPIO pins used
33to control it. See include/linux/i2c-gpio-mux.h for details.
34
35E.G. something like this for a MUX providing 4 bus segments
36controlled through 3 GPIO pins:
37
38#include <linux/i2c-gpio-mux.h>
39#include <linux/platform_device.h>
40
41static const unsigned myboard_gpiomux_gpios[] = {
42 AT91_PIN_PC26, AT91_PIN_PC25, AT91_PIN_PC24
43};
44
45static const unsigned myboard_gpiomux_values[] = {
46 0, 1, 2, 3
47};
48
49static struct gpio_i2cmux_platform_data myboard_i2cmux_data = {
50 .parent = 1,
51 .base_nr = 2, /* optional */
52 .values = myboard_gpiomux_values,
53 .n_values = ARRAY_SIZE(myboard_gpiomux_values),
54 .gpios = myboard_gpiomux_gpios,
55 .n_gpios = ARRAY_SIZE(myboard_gpiomux_gpios),
56 .idle = 4, /* optional */
57};
58
59static struct platform_device myboard_i2cmux = {
60 .name = "i2c-gpio-mux",
61 .id = 0,
62 .dev = {
63 .platform_data = &myboard_i2cmux_data,
64 },
65};
66
67If you don't know the absolute GPIO pin numbers at registration time,
68you can instead provide a chip name (.chip_name) and relative GPIO pin
69numbers, and the i2c-gpio-mux driver will do the work for you,
70including deferred probing if the GPIO chip isn't immediately
71available.
72
73Device Registration
74-------------------
75
76When registering your i2c-gpio-mux device, you should pass the number
77of any GPIO pin it uses as the device ID. This guarantees that every
78instance has a different ID.
79
80Alternatively, if you don't need a stable device name, you can simply
81pass PLATFORM_DEVID_AUTO as the device ID, and the platform core will
82assign a dynamic ID to your device. If you do not know the absolute
83GPIO pin numbers at registration time, this is even the only option.
diff --git a/Documentation/i2c/smbus-protocol b/Documentation/i2c/smbus-protocol
index d1f22618e14..7c19d1a2bea 100644
--- a/Documentation/i2c/smbus-protocol
+++ b/Documentation/i2c/smbus-protocol
@@ -23,12 +23,6 @@ don't match these function names. For some of the operations which pass a
23single data byte, the functions using SMBus protocol operation names execute 23single data byte, the functions using SMBus protocol operation names execute
24a different protocol operation entirely. 24a different protocol operation entirely.
25 25
26Each transaction type corresponds to a functionality flag. Before calling a
27transaction function, a device driver should always check (just once) for
28the corresponding functionality flag to ensure that the underlying I2C
29adapter supports the transaction in question. See
30<file:Documentation/i2c/functionality> for the details.
31
32 26
33Key to symbols 27Key to symbols
34============== 28==============
@@ -55,8 +49,6 @@ This sends a single bit to the device, at the place of the Rd/Wr bit.
55 49
56A Addr Rd/Wr [A] P 50A Addr Rd/Wr [A] P
57 51
58Functionality flag: I2C_FUNC_SMBUS_QUICK
59
60 52
61SMBus Receive Byte: i2c_smbus_read_byte() 53SMBus Receive Byte: i2c_smbus_read_byte()
62========================================== 54==========================================
@@ -68,8 +60,6 @@ the previous SMBus command.
68 60
69S Addr Rd [A] [Data] NA P 61S Addr Rd [A] [Data] NA P
70 62
71Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
72
73 63
74SMBus Send Byte: i2c_smbus_write_byte() 64SMBus Send Byte: i2c_smbus_write_byte()
75======================================== 65========================================
@@ -79,8 +69,6 @@ to a device. See Receive Byte for more information.
79 69
80S Addr Wr [A] Data [A] P 70S Addr Wr [A] Data [A] P
81 71
82Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
83
84 72
85SMBus Read Byte: i2c_smbus_read_byte_data() 73SMBus Read Byte: i2c_smbus_read_byte_data()
86============================================ 74============================================
@@ -90,8 +78,6 @@ The register is specified through the Comm byte.
90 78
91S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P 79S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
92 80
93Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
94
95 81
96SMBus Read Word: i2c_smbus_read_word_data() 82SMBus Read Word: i2c_smbus_read_word_data()
97============================================ 83============================================
@@ -102,12 +88,6 @@ byte. But this time, the data is a complete word (16 bits).
102 88
103S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P 89S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
104 90
105Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
106
107Note the convenience function i2c_smbus_read_word_swapped is
108available for reads where the two data bytes are the other way
109around (not SMBus compliant, but very popular.)
110
111 91
112SMBus Write Byte: i2c_smbus_write_byte_data() 92SMBus Write Byte: i2c_smbus_write_byte_data()
113============================================== 93==============================================
@@ -118,8 +98,6 @@ the Read Byte operation.
118 98
119S Addr Wr [A] Comm [A] Data [A] P 99S Addr Wr [A] Comm [A] Data [A] P
120 100
121Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
122
123 101
124SMBus Write Word: i2c_smbus_write_word_data() 102SMBus Write Word: i2c_smbus_write_word_data()
125============================================== 103==============================================
@@ -130,12 +108,6 @@ specified through the Comm byte.
130 108
131S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P 109S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
132 110
133Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
134
135Note the convenience function i2c_smbus_write_word_swapped is
136available for writes where the two data bytes are the other way
137around (not SMBus compliant, but very popular.)
138
139 111
140SMBus Process Call: i2c_smbus_process_call() 112SMBus Process Call: i2c_smbus_process_call()
141============================================= 113=============================================
@@ -146,8 +118,6 @@ This command selects a device register (through the Comm byte), sends
146S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 118S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
147 S Addr Rd [A] [DataLow] A [DataHigh] NA P 119 S Addr Rd [A] [DataLow] A [DataHigh] NA P
148 120
149Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
150
151 121
152SMBus Block Read: i2c_smbus_read_block_data() 122SMBus Block Read: i2c_smbus_read_block_data()
153============================================== 123==============================================
@@ -159,8 +129,6 @@ of data is specified by the device in the Count byte.
159S Addr Wr [A] Comm [A] 129S Addr Wr [A] Comm [A]
160 S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P 130 S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
161 131
162Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
163
164 132
165SMBus Block Write: i2c_smbus_write_block_data() 133SMBus Block Write: i2c_smbus_write_block_data()
166================================================ 134================================================
@@ -171,8 +139,6 @@ Comm byte. The amount of data is specified in the Count byte.
171 139
172S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P 140S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
173 141
174Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
175
176 142
177SMBus Block Write - Block Read Process Call 143SMBus Block Write - Block Read Process Call
178=========================================== 144===========================================
@@ -186,8 +152,6 @@ This command selects a device register (through the Comm byte), sends
186S Addr Wr [A] Comm [A] Count [A] Data [A] ... 152S Addr Wr [A] Comm [A] Count [A] Data [A] ...
187 S Addr Rd [A] [Count] A [Data] ... A P 153 S Addr Rd [A] [Count] A [Data] ... A P
188 154
189Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
190
191 155
192SMBus Host Notify 156SMBus Host Notify
193================= 157=================
@@ -257,7 +221,15 @@ designated register that is specified through the Comm byte.
257S Addr Wr [A] Comm [A] 221S Addr Wr [A] Comm [A]
258 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 222 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
259 223
260Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK 224
225I2C Block Read (2 Comm bytes)
226=============================
227
228This command reads a block of bytes from a device, from a
229designated register that is specified through the two Comm bytes.
230
231S Addr Wr [A] Comm1 [A] Comm2 [A]
232 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
261 233
262 234
263I2C Block Write: i2c_smbus_write_i2c_block_data() 235I2C Block Write: i2c_smbus_write_i2c_block_data()
@@ -269,5 +241,3 @@ Comm byte. Note that command lengths of 0, 2, or more bytes are
269supported as they are indistinguishable from data. 241supported as they are indistinguishable from data.
270 242
271S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P 243S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
272
273Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
diff --git a/Documentation/i2c/ten-bit-addresses b/Documentation/i2c/ten-bit-addresses
index cdfe13901b9..e9890709c50 100644
--- a/Documentation/i2c/ten-bit-addresses
+++ b/Documentation/i2c/ten-bit-addresses
@@ -1,24 +1,22 @@
1The I2C protocol knows about two kinds of device addresses: normal 7 bit 1The I2C protocol knows about two kinds of device addresses: normal 7 bit
2addresses, and an extended set of 10 bit addresses. The sets of addresses 2addresses, and an extended set of 10 bit addresses. The sets of addresses
3do not intersect: the 7 bit address 0x10 is not the same as the 10 bit 3do not intersect: the 7 bit address 0x10 is not the same as the 10 bit
4address 0x10 (though a single device could respond to both of them). 4address 0x10 (though a single device could respond to both of them). You
5select a 10 bit address by adding an extra byte after the address
6byte:
7 S Addr7 Rd/Wr ....
8becomes
9 S 11110 Addr10 Rd/Wr
10S is the start bit, Rd/Wr the read/write bit, and if you count the number
11of bits, you will see the there are 8 after the S bit for 7 bit addresses,
12and 16 after the S bit for 10 bit addresses.
5 13
6I2C messages to and from 10-bit address devices have a different format. 14WARNING! The current 10 bit address support is EXPERIMENTAL. There are
7See the I2C specification for the details. 15several places in the code that will cause SEVERE PROBLEMS with 10 bit
16addresses, even though there is some basic handling and hooks. Also,
17almost no supported adapter handles the 10 bit addresses correctly.
8 18
9The current 10 bit address support is minimal. It should work, however 19As soon as a real 10 bit address device is spotted 'in the wild', we
10you can expect some problems along the way: 20can and will add proper support. Right now, 10 bit address devices
11* Not all bus drivers support 10-bit addresses. Some don't because the 21are defined by the I2C protocol, but we have never seen a single device
12 hardware doesn't support them (SMBus doesn't require 10-bit address 22which supports them.
13 support for example), some don't because nobody bothered adding the
14 code (or it's there but not working properly.) Software implementation
15 (i2c-algo-bit) is known to work.
16* Some optional features do not support 10-bit addresses. This is the
17 case of automatic detection and instantiation of devices by their,
18 drivers, for example.
19* Many user-space packages (for example i2c-tools) lack support for
20 10-bit addresses.
21
22Note that 10-bit address devices are still pretty rare, so the limitations
23listed above could stay for a long time, maybe even forever if nobody
24needs them to be fixed.
diff --git a/Documentation/i2c/writing-clients b/Documentation/i2c/writing-clients
index 3a94b0e6f60..5aa53374ea2 100644
--- a/Documentation/i2c/writing-clients
+++ b/Documentation/i2c/writing-clients
@@ -245,26 +245,11 @@ static int __init foo_init(void)
245{ 245{
246 return i2c_add_driver(&foo_driver); 246 return i2c_add_driver(&foo_driver);
247} 247}
248module_init(foo_init);
249 248
250static void __exit foo_cleanup(void) 249static void __exit foo_cleanup(void)
251{ 250{
252 i2c_del_driver(&foo_driver); 251 i2c_del_driver(&foo_driver);
253} 252}
254module_exit(foo_cleanup);
255
256The module_i2c_driver() macro can be used to reduce above code.
257
258module_i2c_driver(foo_driver);
259
260Note that some functions are marked by `__init'. These functions can
261be removed after kernel booting (or module loading) is completed.
262Likewise, functions marked by `__exit' are dropped by the compiler when
263the code is built into the kernel, as they would never be called.
264
265
266Driver Information
267==================
268 253
269/* Substitute your own name and email address */ 254/* Substitute your own name and email address */
270MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>" 255MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>"
@@ -273,6 +258,14 @@ MODULE_DESCRIPTION("Driver for Barf Inc. Foo I2C devices");
273/* a few non-GPL license types are also allowed */ 258/* a few non-GPL license types are also allowed */
274MODULE_LICENSE("GPL"); 259MODULE_LICENSE("GPL");
275 260
261module_init(foo_init);
262module_exit(foo_cleanup);
263
264Note that some functions are marked by `__init'. These functions can
265be removed after kernel booting (or module loading) is completed.
266Likewise, functions marked by `__exit' are dropped by the compiler when
267the code is built into the kernel, as they would never be called.
268
276 269
277Power Management 270Power Management
278================ 271================