diff options
author | Bhaskar Upadhaya <bhaskar.upadhaya@freescale.com> | 2011-04-19 09:58:31 -0400 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-05-19 02:14:31 -0400 |
commit | 9c817f183b8e02e418d3d5396a16879dc11f921d (patch) | |
tree | 049500845dbb36a7850b1d3fae0740b3ad4fbed2 /Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | |
parent | b637cf7bf82d0692609821cd84e3a345e56cd96c (diff) |
powerpc: Adding bindings for flexcan controller
Signed-off-by: Bhaskar Upadhaya <bhaskar.upadhaya@freescale.com>
Acked-By: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'Documentation/devicetree/bindings/net/can/fsl-flexcan.txt')
-rwxr-xr-x | Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt new file mode 100755 index 00000000000..1a729f08986 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | |||
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1 | CAN Device Tree Bindings | ||
2 | ------------------------ | ||
3 | 2011 Freescale Semiconductor, Inc. | ||
4 | |||
5 | fsl,flexcan-v1.0 nodes | ||
6 | ----------------------- | ||
7 | In addition to the required compatible-, reg- and interrupt-properties, you can | ||
8 | also specify which clock source shall be used for the controller. | ||
9 | |||
10 | CPI Clock- Can Protocol Interface Clock | ||
11 | This CLK_SRC bit of CTRL(control register) selects the clock source to | ||
12 | the CAN Protocol Interface(CPI) to be either the peripheral clock | ||
13 | (driven by the PLL) or the crystal oscillator clock. The selected clock | ||
14 | is the one fed to the prescaler to generate the Serial Clock (Sclock). | ||
15 | The PRESDIV field of CTRL(control register) controls a prescaler that | ||
16 | generates the Serial Clock (Sclock), whose period defines the | ||
17 | time quantum used to compose the CAN waveform. | ||
18 | |||
19 | Can Engine Clock Source | ||
20 | There are two sources for CAN clock | ||
21 | - Platform Clock It represents the bus clock | ||
22 | - Oscillator Clock | ||
23 | |||
24 | Peripheral Clock (PLL) | ||
25 | -------------- | ||
26 | | | ||
27 | --------- ------------- | ||
28 | | |CPI Clock | Prescaler | Sclock | ||
29 | | |---------------->| (1.. 256) |------------> | ||
30 | --------- ------------- | ||
31 | | | | ||
32 | -------------- ---------------------CLK_SRC | ||
33 | Oscillator Clock | ||
34 | |||
35 | - fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects | ||
36 | the peripheral clock. PLL clock is fed to the | ||
37 | prescaler to generate the Serial Clock (Sclock). | ||
38 | Valid values are "oscillator" and "platform" | ||
39 | "oscillator": CAN engine clock source is oscillator clock. | ||
40 | "platform" The CAN engine clock source is the bus clock | ||
41 | (platform clock). | ||
42 | |||
43 | - fsl,flexcan-clock-divider : for the reference and system clock, an additional | ||
44 | clock divider can be specified. | ||
45 | - clock-frequency: frequency required to calculate the bitrate for FlexCAN. | ||
46 | |||
47 | Note: | ||
48 | - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC. | ||
49 | - P1010 does not have oscillator as the Clock Source.So the default | ||
50 | Clock Source is platform clock. | ||
51 | Examples: | ||
52 | |||
53 | can0@1c000 { | ||
54 | compatible = "fsl,flexcan-v1.0"; | ||
55 | reg = <0x1c000 0x1000>; | ||
56 | interrupts = <48 0x2>; | ||
57 | interrupt-parent = <&mpic>; | ||
58 | fsl,flexcan-clock-source = "platform"; | ||
59 | fsl,flexcan-clock-divider = <2>; | ||
60 | clock-frequency = <fixed by u-boot>; | ||
61 | }; | ||