diff options
author | Muli Ben-Yehuda <muli@il.ibm.com> | 2007-07-21 11:10:50 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-21 21:37:11 -0400 |
commit | ff297b8c081bdc60507eaeb1838996e0c67141c8 (patch) | |
tree | 9bbf72551be697bda605322a2d3af3e6190bacf2 | |
parent | b8d2ea1b87b02fc94ffcab58b29c83fbbb6a1e4e (diff) |
x86_64: introduce chipset specific ops
Calgary and CalIOC2 share most of the same logic. Introduce struct
cal_chipset_ops for quirks and tce flush logic which are
[akpm@linux-foundation.org: make calgary_chip_ops static]
Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | arch/x86_64/kernel/pci-calgary.c | 24 | ||||
-rw-r--r-- | include/asm-x86_64/calgary.h | 8 |
2 files changed, 24 insertions, 8 deletions
diff --git a/arch/x86_64/kernel/pci-calgary.c b/arch/x86_64/kernel/pci-calgary.c index 9f6dd445370..7218b5b51e0 100644 --- a/arch/x86_64/kernel/pci-calgary.c +++ b/arch/x86_64/kernel/pci-calgary.c | |||
@@ -155,9 +155,15 @@ struct calgary_bus_info { | |||
155 | void __iomem *bbar; | 155 | void __iomem *bbar; |
156 | }; | 156 | }; |
157 | 157 | ||
158 | static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, }; | 158 | static void calgary_handle_quirks(struct iommu_table *tbl, struct pci_dev *dev); |
159 | static void calgary_tce_cache_blast(struct iommu_table *tbl); | ||
160 | |||
161 | static struct cal_chipset_ops calgary_chip_ops = { | ||
162 | .handle_quirks = calgary_handle_quirks, | ||
163 | .tce_cache_blast = calgary_tce_cache_blast | ||
164 | }; | ||
159 | 165 | ||
160 | static void tce_cache_blast(struct iommu_table *tbl); | 166 | static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, }; |
161 | 167 | ||
162 | /* enable this to stress test the chip's TCE cache */ | 168 | /* enable this to stress test the chip's TCE cache */ |
163 | #ifdef CONFIG_IOMMU_DEBUG | 169 | #ifdef CONFIG_IOMMU_DEBUG |
@@ -243,7 +249,7 @@ static unsigned long iommu_range_alloc(struct iommu_table *tbl, | |||
243 | offset = find_next_zero_string(tbl->it_map, tbl->it_hint, | 249 | offset = find_next_zero_string(tbl->it_map, tbl->it_hint, |
244 | tbl->it_size, npages); | 250 | tbl->it_size, npages); |
245 | if (offset == ~0UL) { | 251 | if (offset == ~0UL) { |
246 | tce_cache_blast(tbl); | 252 | tbl->chip_ops->tce_cache_blast(tbl); |
247 | offset = find_next_zero_string(tbl->it_map, 0, | 253 | offset = find_next_zero_string(tbl->it_map, 0, |
248 | tbl->it_size, npages); | 254 | tbl->it_size, npages); |
249 | if (offset == ~0UL) { | 255 | if (offset == ~0UL) { |
@@ -552,7 +558,7 @@ static inline void __iomem* calgary_reg(void __iomem *bar, unsigned long offset) | |||
552 | return (void __iomem*)target; | 558 | return (void __iomem*)target; |
553 | } | 559 | } |
554 | 560 | ||
555 | static void tce_cache_blast(struct iommu_table *tbl) | 561 | static void calgary_tce_cache_blast(struct iommu_table *tbl) |
556 | { | 562 | { |
557 | u64 val; | 563 | u64 val; |
558 | u32 aer; | 564 | u32 aer; |
@@ -698,6 +704,8 @@ static int __init calgary_setup_tar(struct pci_dev *dev, void __iomem *bbar) | |||
698 | tbl->it_base = (unsigned long)bus_info[dev->bus->number].tce_space; | 704 | tbl->it_base = (unsigned long)bus_info[dev->bus->number].tce_space; |
699 | tce_free(tbl, 0, tbl->it_size); | 705 | tce_free(tbl, 0, tbl->it_size); |
700 | 706 | ||
707 | tbl->chip_ops = &calgary_chip_ops; | ||
708 | |||
701 | calgary_reserve_regions(dev); | 709 | calgary_reserve_regions(dev); |
702 | 710 | ||
703 | /* set TARs for each PHB */ | 711 | /* set TARs for each PHB */ |
@@ -807,10 +815,10 @@ static void __init calgary_set_split_completion_timeout(void __iomem *bbar, | |||
807 | readq(target); /* flush */ | 815 | readq(target); /* flush */ |
808 | } | 816 | } |
809 | 817 | ||
810 | static void __init calgary_handle_quirks(struct pci_dev* dev) | 818 | static void __init calgary_handle_quirks(struct iommu_table *tbl, |
819 | struct pci_dev *dev) | ||
811 | { | 820 | { |
812 | unsigned char busnum = dev->bus->number; | 821 | unsigned char busnum = dev->bus->number; |
813 | struct iommu_table *tbl = dev->sysdata; | ||
814 | 822 | ||
815 | /* | 823 | /* |
816 | * Give split completion a longer timeout on bus 1 for aic94xx | 824 | * Give split completion a longer timeout on bus 1 for aic94xx |
@@ -885,6 +893,7 @@ static void __init calgary_init_one_nontraslated(struct pci_dev *dev) | |||
885 | static int __init calgary_init_one(struct pci_dev *dev) | 893 | static int __init calgary_init_one(struct pci_dev *dev) |
886 | { | 894 | { |
887 | void __iomem *bbar; | 895 | void __iomem *bbar; |
896 | struct iommu_table *tbl; | ||
888 | int ret; | 897 | int ret; |
889 | 898 | ||
890 | BUG_ON(dev->bus->number >= MAX_PHB_BUS_NUM); | 899 | BUG_ON(dev->bus->number >= MAX_PHB_BUS_NUM); |
@@ -897,7 +906,8 @@ static int __init calgary_init_one(struct pci_dev *dev) | |||
897 | pci_dev_get(dev); | 906 | pci_dev_get(dev); |
898 | dev->bus->self = dev; | 907 | dev->bus->self = dev; |
899 | 908 | ||
900 | calgary_handle_quirks(dev); | 909 | tbl = dev->sysdata; |
910 | tbl->chip_ops->handle_quirks(tbl, dev); | ||
901 | 911 | ||
902 | calgary_enable_translation(dev); | 912 | calgary_enable_translation(dev); |
903 | 913 | ||
diff --git a/include/asm-x86_64/calgary.h b/include/asm-x86_64/calgary.h index 4d5747a0923..458ab19a70f 100644 --- a/include/asm-x86_64/calgary.h +++ b/include/asm-x86_64/calgary.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Derived from include/asm-powerpc/iommu.h | 2 | * Derived from include/asm-powerpc/iommu.h |
3 | * | 3 | * |
4 | * Copyright (C) IBM Corporation, 2006 | 4 | * Copyright IBM Corporation, 2006-2007 |
5 | * | 5 | * |
6 | * Author: Jon Mason <jdmason@us.ibm.com> | 6 | * Author: Jon Mason <jdmason@us.ibm.com> |
7 | * Author: Muli Ben-Yehuda <muli@il.ibm.com> | 7 | * Author: Muli Ben-Yehuda <muli@il.ibm.com> |
@@ -31,6 +31,7 @@ | |||
31 | #include <asm/types.h> | 31 | #include <asm/types.h> |
32 | 32 | ||
33 | struct iommu_table { | 33 | struct iommu_table { |
34 | struct cal_chipset_ops *chip_ops; /* chipset specific funcs */ | ||
34 | unsigned long it_base; /* mapped address of tce table */ | 35 | unsigned long it_base; /* mapped address of tce table */ |
35 | unsigned long it_hint; /* Hint for next alloc */ | 36 | unsigned long it_hint; /* Hint for next alloc */ |
36 | unsigned long *it_map; /* A simple allocation bitmap for now */ | 37 | unsigned long *it_map; /* A simple allocation bitmap for now */ |
@@ -42,6 +43,11 @@ struct iommu_table { | |||
42 | unsigned char it_busno; /* Bus number this table belongs to */ | 43 | unsigned char it_busno; /* Bus number this table belongs to */ |
43 | }; | 44 | }; |
44 | 45 | ||
46 | struct cal_chipset_ops { | ||
47 | void (*handle_quirks)(struct iommu_table *tbl, struct pci_dev *dev); | ||
48 | void (*tce_cache_blast)(struct iommu_table *tbl); | ||
49 | }; | ||
50 | |||
45 | #define TCE_TABLE_SIZE_UNSPECIFIED ~0 | 51 | #define TCE_TABLE_SIZE_UNSPECIFIED ~0 |
46 | #define TCE_TABLE_SIZE_64K 0 | 52 | #define TCE_TABLE_SIZE_64K 0 |
47 | #define TCE_TABLE_SIZE_128K 1 | 53 | #define TCE_TABLE_SIZE_128K 1 |