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author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2012-11-14 09:27:23 -0500 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2012-11-14 15:30:06 -0500 |
commit | fd072a86bde1c5f7cf04618903c5ce8658011c1c (patch) | |
tree | 5cfbb1ff358c96da8e875802e6680b0f3e9efcb3 | |
parent | e245f54a06f6aeb025b50eb02c2969fb4e254b46 (diff) |
ARM: tegra: Implement 6395/1 for Tegra
This patch implements ARM linux patch 6395/1 for Tegra. See commit
1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache
controller) AuxCtlr register" for details.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
[swarren: added commit subject for referenced patch]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 89d3ebc06eb..3e03e5f15c1 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -121,7 +121,7 @@ static void __init tegra_init_cache(void) | |||
121 | 121 | ||
122 | cache_type = readl(p + L2X0_CACHE_TYPE); | 122 | cache_type = readl(p + L2X0_CACHE_TYPE); |
123 | aux_ctrl = (cache_type & 0x700) << (17-8); | 123 | aux_ctrl = (cache_type & 0x700) << (17-8); |
124 | aux_ctrl |= 0x7C000001; | 124 | aux_ctrl |= 0x7C400001; |
125 | 125 | ||
126 | l2x0_of_init(aux_ctrl, 0x8200c3fe); | 126 | l2x0_of_init(aux_ctrl, 0x8200c3fe); |
127 | #endif | 127 | #endif |