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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-12 13:27:12 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-17 04:10:02 -0400
commitfac3274c4ee090140410b2f29d3fbd8f10eae186 (patch)
tree76dddaff935feeb008bb4c3d35538325ce92e176
parentd2434ab7fb085ac6848acd9d82366f96a642e471 (diff)
drm/i915: simplify dvo dpms interface
All dvo drivers only support 2 dpms states, and our dvo driver even switches of the dvo port for anything else than DPMS_ON. Hence ditch this complexity and simply use bool enable. While reading through this code I've noticed that the mode_set function of ch7017 is a bit peculiar - it disable the lvds again, even though the crtc helper code should have done that ... This might be to work around an issue at driver load, we pretty much ignore the hw state when taking over. v2: Also do the conversion for the new ns2501 driver. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/dvo.h9
-rw-r--r--drivers/gpu/drm/i915/dvo_ch7017.c8
-rw-r--r--drivers/gpu/drm/i915/dvo_ch7xxx.c4
-rw-r--r--drivers/gpu/drm/i915/dvo_ivch.c8
-rw-r--r--drivers/gpu/drm/i915/dvo_ns2501.c14
-rw-r--r--drivers/gpu/drm/i915/dvo_sil164.c4
-rw-r--r--drivers/gpu/drm/i915/dvo_tfp410.c4
-rw-r--r--drivers/gpu/drm/i915/intel_dvo.c4
8 files changed, 26 insertions, 29 deletions
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
index 0c8ac4d92de..0fa839e439b 100644
--- a/drivers/gpu/drm/i915/dvo.h
+++ b/drivers/gpu/drm/i915/dvo.h
@@ -58,13 +58,12 @@ struct intel_dvo_dev_ops {
58 void (*create_resources)(struct intel_dvo_device *dvo); 58 void (*create_resources)(struct intel_dvo_device *dvo);
59 59
60 /* 60 /*
61 * Turn on/off output or set intermediate power levels if available. 61 * Turn on/off output.
62 * 62 *
63 * Unsupported intermediate modes drop to the lower power setting. 63 * Because none of our dvo drivers support an intermediate power levels,
64 * If the mode is DPMSModeOff, the output must be disabled, 64 * we don't expose this in the interfac.
65 * as the DPLL may be disabled afterwards.
66 */ 65 */
67 void (*dpms)(struct intel_dvo_device *dvo, int mode); 66 void (*dpms)(struct intel_dvo_device *dvo, bool enable);
68 67
69 /* 68 /*
70 * Callback for testing a video mode for a given output. 69 * Callback for testing a video mode for a given output.
diff --git a/drivers/gpu/drm/i915/dvo_ch7017.c b/drivers/gpu/drm/i915/dvo_ch7017.c
index 1ca799a1e1f..71e7650a299 100644
--- a/drivers/gpu/drm/i915/dvo_ch7017.c
+++ b/drivers/gpu/drm/i915/dvo_ch7017.c
@@ -163,7 +163,7 @@ struct ch7017_priv {
163}; 163};
164 164
165static void ch7017_dump_regs(struct intel_dvo_device *dvo); 165static void ch7017_dump_regs(struct intel_dvo_device *dvo);
166static void ch7017_dpms(struct intel_dvo_device *dvo, int mode); 166static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable);
167 167
168static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val) 168static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val)
169{ 169{
@@ -309,7 +309,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
309 lvds_power_down = CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED | 309 lvds_power_down = CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED |
310 (mode->hdisplay & 0x0700) >> 8; 310 (mode->hdisplay & 0x0700) >> 8;
311 311
312 ch7017_dpms(dvo, DRM_MODE_DPMS_OFF); 312 ch7017_dpms(dvo, false);
313 ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT, 313 ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT,
314 horizontal_active_pixel_input); 314 horizontal_active_pixel_input);
315 ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT, 315 ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT,
@@ -331,7 +331,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
331} 331}
332 332
333/* set the CH7017 power state */ 333/* set the CH7017 power state */
334static void ch7017_dpms(struct intel_dvo_device *dvo, int mode) 334static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable)
335{ 335{
336 uint8_t val; 336 uint8_t val;
337 337
@@ -345,7 +345,7 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, int mode)
345 CH7017_DAC3_POWER_DOWN | 345 CH7017_DAC3_POWER_DOWN |
346 CH7017_TV_POWER_DOWN_EN); 346 CH7017_TV_POWER_DOWN_EN);
347 347
348 if (mode == DRM_MODE_DPMS_ON) { 348 if (enable) {
349 /* Turn on the LVDS */ 349 /* Turn on the LVDS */
350 ch7017_write(dvo, CH7017_LVDS_POWER_DOWN, 350 ch7017_write(dvo, CH7017_LVDS_POWER_DOWN,
351 val & ~CH7017_LVDS_POWER_DOWN_EN); 351 val & ~CH7017_LVDS_POWER_DOWN_EN);
diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
index 4a036600e80..c1dea5b11f9 100644
--- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
@@ -289,9 +289,9 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
289} 289}
290 290
291/* set the CH7xxx power state */ 291/* set the CH7xxx power state */
292static void ch7xxx_dpms(struct intel_dvo_device *dvo, int mode) 292static void ch7xxx_dpms(struct intel_dvo_device *dvo, bool enable)
293{ 293{
294 if (mode == DRM_MODE_DPMS_ON) 294 if (enable)
295 ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_DVIL | CH7xxx_PM_DVIP); 295 ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_DVIL | CH7xxx_PM_DVIP);
296 else 296 else
297 ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD); 297 ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD);
diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
index 04f2893d5e3..fa8ff6b050f 100644
--- a/drivers/gpu/drm/i915/dvo_ivch.c
+++ b/drivers/gpu/drm/i915/dvo_ivch.c
@@ -288,7 +288,7 @@ static enum drm_mode_status ivch_mode_valid(struct intel_dvo_device *dvo,
288} 288}
289 289
290/** Sets the power state of the panel connected to the ivch */ 290/** Sets the power state of the panel connected to the ivch */
291static void ivch_dpms(struct intel_dvo_device *dvo, int mode) 291static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)
292{ 292{
293 int i; 293 int i;
294 uint16_t vr01, vr30, backlight; 294 uint16_t vr01, vr30, backlight;
@@ -297,13 +297,13 @@ static void ivch_dpms(struct intel_dvo_device *dvo, int mode)
297 if (!ivch_read(dvo, VR01, &vr01)) 297 if (!ivch_read(dvo, VR01, &vr01))
298 return; 298 return;
299 299
300 if (mode == DRM_MODE_DPMS_ON) 300 if (enable)
301 backlight = 1; 301 backlight = 1;
302 else 302 else
303 backlight = 0; 303 backlight = 0;
304 ivch_write(dvo, VR80, backlight); 304 ivch_write(dvo, VR80, backlight);
305 305
306 if (mode == DRM_MODE_DPMS_ON) 306 if (enable)
307 vr01 |= VR01_LCD_ENABLE | VR01_DVO_ENABLE; 307 vr01 |= VR01_LCD_ENABLE | VR01_DVO_ENABLE;
308 else 308 else
309 vr01 &= ~(VR01_LCD_ENABLE | VR01_DVO_ENABLE); 309 vr01 &= ~(VR01_LCD_ENABLE | VR01_DVO_ENABLE);
@@ -315,7 +315,7 @@ static void ivch_dpms(struct intel_dvo_device *dvo, int mode)
315 if (!ivch_read(dvo, VR30, &vr30)) 315 if (!ivch_read(dvo, VR30, &vr30))
316 break; 316 break;
317 317
318 if (((vr30 & VR30_PANEL_ON) != 0) == (mode == DRM_MODE_DPMS_ON)) 318 if (((vr30 & VR30_PANEL_ON) != 0) == enable)
319 break; 319 break;
320 udelay(1000); 320 udelay(1000);
321 } 321 }
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c
index 6bd383dfbb0..c4d9f2f395e 100644
--- a/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -493,19 +493,19 @@ static void ns2501_mode_set(struct intel_dvo_device *dvo,
493} 493}
494 494
495/* set the NS2501 power state */ 495/* set the NS2501 power state */
496static void ns2501_dpms(struct intel_dvo_device *dvo, int mode) 496static void ns2501_dpms(struct intel_dvo_device *dvo, bool enable)
497{ 497{
498 bool ok; 498 bool ok;
499 bool restore = false; 499 bool restore = false;
500 struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); 500 struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv);
501 unsigned char ch; 501 unsigned char ch;
502 502
503 DRM_DEBUG_KMS("%s: Trying set the dpms of the DVO to %d\n", 503 DRM_DEBUG_KMS("%s: Trying set the dpms of the DVO to %i\n",
504 __FUNCTION__, mode); 504 __FUNCTION__, enable);
505 505
506 ch = ns->reg_8_shadow; 506 ch = ns->reg_8_shadow;
507 507
508 if (mode == DRM_MODE_DPMS_ON) 508 if (enable)
509 ch |= NS2501_8_PD; 509 ch |= NS2501_8_PD;
510 else 510 else
511 ch &= ~NS2501_8_PD; 511 ch &= ~NS2501_8_PD;
@@ -519,12 +519,10 @@ static void ns2501_dpms(struct intel_dvo_device *dvo, int mode)
519 ok &= ns2501_writeb(dvo, NS2501_REG8, ch); 519 ok &= ns2501_writeb(dvo, NS2501_REG8, ch);
520 ok &= 520 ok &=
521 ns2501_writeb(dvo, 0x34, 521 ns2501_writeb(dvo, 0x34,
522 (mode == 522 enable ? 0x03 : 0x00);
523 DRM_MODE_DPMS_ON) ? (0x03) : (0x00));
524 ok &= 523 ok &=
525 ns2501_writeb(dvo, 0x35, 524 ns2501_writeb(dvo, 0x35,
526 (mode == 525 enable ? 0xff : 0x00);
527 DRM_MODE_DPMS_ON) ? (0xff) : (0x00));
528 if (!ok) { 526 if (!ok) {
529 if (restore) 527 if (restore)
530 restore_dvo(dvo); 528 restore_dvo(dvo);
diff --git a/drivers/gpu/drm/i915/dvo_sil164.c b/drivers/gpu/drm/i915/dvo_sil164.c
index a0b13a6f619..cc24c1cabec 100644
--- a/drivers/gpu/drm/i915/dvo_sil164.c
+++ b/drivers/gpu/drm/i915/dvo_sil164.c
@@ -208,7 +208,7 @@ static void sil164_mode_set(struct intel_dvo_device *dvo,
208} 208}
209 209
210/* set the SIL164 power state */ 210/* set the SIL164 power state */
211static void sil164_dpms(struct intel_dvo_device *dvo, int mode) 211static void sil164_dpms(struct intel_dvo_device *dvo, bool enable)
212{ 212{
213 int ret; 213 int ret;
214 unsigned char ch; 214 unsigned char ch;
@@ -217,7 +217,7 @@ static void sil164_dpms(struct intel_dvo_device *dvo, int mode)
217 if (ret == false) 217 if (ret == false)
218 return; 218 return;
219 219
220 if (mode == DRM_MODE_DPMS_ON) 220 if (enable)
221 ch |= SIL164_8_PD; 221 ch |= SIL164_8_PD;
222 else 222 else
223 ch &= ~SIL164_8_PD; 223 ch &= ~SIL164_8_PD;
diff --git a/drivers/gpu/drm/i915/dvo_tfp410.c b/drivers/gpu/drm/i915/dvo_tfp410.c
index aa2cd3ec54a..097b3e82b00 100644
--- a/drivers/gpu/drm/i915/dvo_tfp410.c
+++ b/drivers/gpu/drm/i915/dvo_tfp410.c
@@ -234,14 +234,14 @@ static void tfp410_mode_set(struct intel_dvo_device *dvo,
234} 234}
235 235
236/* set the tfp410 power state */ 236/* set the tfp410 power state */
237static void tfp410_dpms(struct intel_dvo_device *dvo, int mode) 237static void tfp410_dpms(struct intel_dvo_device *dvo, bool enable)
238{ 238{
239 uint8_t ctl1; 239 uint8_t ctl1;
240 240
241 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) 241 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
242 return; 242 return;
243 243
244 if (mode == DRM_MODE_DPMS_ON) 244 if (enable)
245 ctl1 |= TFP410_CTL_1_PD; 245 ctl1 |= TFP410_CTL_1_PD;
246 else 246 else
247 ctl1 &= ~TFP410_CTL_1_PD; 247 ctl1 &= ~TFP410_CTL_1_PD;
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 03dfdff8e00..227551f12d2 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -115,9 +115,9 @@ static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
115 if (mode == DRM_MODE_DPMS_ON) { 115 if (mode == DRM_MODE_DPMS_ON) {
116 I915_WRITE(dvo_reg, temp | DVO_ENABLE); 116 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
117 I915_READ(dvo_reg); 117 I915_READ(dvo_reg);
118 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode); 118 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
119 } else { 119 } else {
120 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode); 120 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
121 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); 121 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
122 I915_READ(dvo_reg); 122 I915_READ(dvo_reg);
123 } 123 }