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authorBenoit Cousson <b-cousson@ti.com>2011-02-02 14:27:21 -0500
committerBenoit Cousson <b-cousson@ti.com>2011-02-17 12:25:33 -0500
commitec5df927a8f3d3eca9514c9a9ad6db830ae20acc (patch)
treee0615dc99d7b80d177ea11e9c5faea97595f53b2
parentd63bd74fbb5fb2161d9cb90cd7a93a2c5db47c63 (diff)
OMAP4: hwmod data: Add mailbox
Mailbox hwmod data for omap4. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com> [b-cousson@ti.com: Re-order the structures and remove the irq line name]
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c68
1 files changed, 67 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index aafe60dc711..efdf26655b4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -530,7 +530,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
530 * ipu 530 * ipu
531 * iss 531 * iss
532 * kbd 532 * kbd
533 * mailbox
534 * mcasp 533 * mcasp
535 * mcbsp1 534 * mcbsp1
536 * mcbsp2 535 * mcbsp2
@@ -2006,6 +2005,70 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
2006}; 2005};
2007 2006
2008/* 2007/*
2008 * 'mailbox' class
2009 * mailbox module allowing communication between the on-chip processors using a
2010 * queued mailbox-interrupt mechanism.
2011 */
2012
2013static struct omap_hwmod_class_sysconfig omap44xx_mailbox_sysc = {
2014 .rev_offs = 0x0000,
2015 .sysc_offs = 0x0010,
2016 .sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
2017 SYSC_HAS_SOFTRESET),
2018 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
2019 .sysc_fields = &omap_hwmod_sysc_type2,
2020};
2021
2022static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = {
2023 .name = "mailbox",
2024 .sysc = &omap44xx_mailbox_sysc,
2025};
2026
2027/* mailbox */
2028static struct omap_hwmod omap44xx_mailbox_hwmod;
2029static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = {
2030 { .irq = 26 + OMAP44XX_IRQ_GIC_START },
2031};
2032
2033static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {
2034 {
2035 .pa_start = 0x4a0f4000,
2036 .pa_end = 0x4a0f41ff,
2037 .flags = ADDR_TYPE_RT
2038 },
2039};
2040
2041/* l4_cfg -> mailbox */
2042static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = {
2043 .master = &omap44xx_l4_cfg_hwmod,
2044 .slave = &omap44xx_mailbox_hwmod,
2045 .clk = "l4_div_ck",
2046 .addr = omap44xx_mailbox_addrs,
2047 .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs),
2048 .user = OCP_USER_MPU | OCP_USER_SDMA,
2049};
2050
2051/* mailbox slave ports */
2052static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = {
2053 &omap44xx_l4_cfg__mailbox,
2054};
2055
2056static struct omap_hwmod omap44xx_mailbox_hwmod = {
2057 .name = "mailbox",
2058 .class = &omap44xx_mailbox_hwmod_class,
2059 .mpu_irqs = omap44xx_mailbox_irqs,
2060 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs),
2061 .prcm = {
2062 .omap4 = {
2063 .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL,
2064 },
2065 },
2066 .slaves = omap44xx_mailbox_slaves,
2067 .slaves_cnt = ARRAY_SIZE(omap44xx_mailbox_slaves),
2068 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
2069};
2070
2071/*
2009 * 'mcspi' class 2072 * 'mcspi' class
2010 * multichannel serial port interface (mcspi) / master/slave synchronous serial 2073 * multichannel serial port interface (mcspi) / master/slave synchronous serial
2011 * bus 2074 * bus
@@ -3539,6 +3602,9 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
3539 &omap44xx_iva_seq0_hwmod, 3602 &omap44xx_iva_seq0_hwmod,
3540 &omap44xx_iva_seq1_hwmod, 3603 &omap44xx_iva_seq1_hwmod,
3541 3604
3605 /* mailbox class */
3606 &omap44xx_mailbox_hwmod,
3607
3542 /* mcspi class */ 3608 /* mcspi class */
3543 &omap44xx_mcspi1_hwmod, 3609 &omap44xx_mcspi1_hwmod,
3544 &omap44xx_mcspi2_hwmod, 3610 &omap44xx_mcspi2_hwmod,