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authorArnd Bergmann <arnd@arndb.de>2011-12-27 18:20:31 -0500
committerArnd Bergmann <arnd@arndb.de>2011-12-27 18:20:49 -0500
commite817e49f400b3fd5a7dd68f8f10b31451c4beef0 (patch)
treeb557cfc209769242587af4ec97678cfa93193668
parent384703b8e6cd4c8ef08512e596024e028c91c339 (diff)
parentf5ce5e7e9cc3f69c3e6a0a4599262f740aff92c0 (diff)
Merge branch 'tegra/cleanup' into next/dt
Dependency for tegra/dt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm/mach-tegra/Makefile26
-rw-r--r--arch/arm/mach-tegra/include/mach/entry-macro.S23
-rw-r--r--arch/arm/mach-tegra/irq.c4
3 files changed, 13 insertions, 40 deletions
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 91a07e18720..5be8e9eefc9 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -18,20 +18,20 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
18obj-$(CONFIG_TEGRA_PCI) += pcie.o 18obj-$(CONFIG_TEGRA_PCI) += pcie.o
19obj-$(CONFIG_USB_SUPPORT) += usb_phy.o 19obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
20 20
21obj-${CONFIG_MACH_HARMONY} += board-harmony.o 21obj-$(CONFIG_MACH_HARMONY) += board-harmony.o
22obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o 22obj-$(CONFIG_MACH_HARMONY) += board-harmony-pinmux.o
23obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o 23obj-$(CONFIG_MACH_HARMONY) += board-harmony-pcie.o
24obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o 24obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o
25 25
26obj-${CONFIG_MACH_PAZ00} += board-paz00.o 26obj-$(CONFIG_MACH_PAZ00) += board-paz00.o
27obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o 27obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o
28 28
29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 29obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o
30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 30obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o
31 31
32obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o 32obj-$(CONFIG_MACH_TEGRA_DT) += board-dt.o
33obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o 33obj-$(CONFIG_MACH_TEGRA_DT) += board-harmony-pinmux.o
34obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o 34obj-$(CONFIG_MACH_TEGRA_DT) += board-seaboard-pinmux.o
35 35
36obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o 36obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o
37obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o 37obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index dd165c53889..485a11eeace 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -15,7 +15,6 @@
15#include <mach/iomap.h> 15#include <mach/iomap.h>
16#include <mach/io.h> 16#include <mach/io.h>
17 17
18#if defined(CONFIG_ARM_GIC)
19#define HAVE_GET_IRQNR_PREAMBLE 18#define HAVE_GET_IRQNR_PREAMBLE
20#include <asm/hardware/entry-macro-gic.S> 19#include <asm/hardware/entry-macro-gic.S>
21 20
@@ -32,25 +31,3 @@
32 31
33 .macro arch_ret_to_user, tmp1, tmp2 32 .macro arch_ret_to_user, tmp1, tmp2
34 .endm 33 .endm
35#else
36 /* legacy interrupt controller for AP16 */
37 .macro disable_fiq
38 .endm
39
40 .macro get_irqnr_preamble, base, tmp
41 @ enable imprecise aborts
42 cpsie a
43 @ EVP base at 0xf010f000
44 mov \base, #0xf0000000
45 orr \base, #0x00100000
46 orr \base, #0x0000f000
47 .endm
48
49 .macro arch_ret_to_user, tmp1, tmp2
50 .endm
51
52 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
53 ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS
54 cmp \irqnr, #0x80
55 .endm
56#endif
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 4956c3cea73..8ad82af6a29 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -28,10 +28,6 @@
28 28
29#include "board.h" 29#include "board.h"
30 30
31#define INT_SYS_NR (INT_GPIO_BASE - INT_PRI_BASE)
32#define INT_SYS_SZ (INT_SEC_BASE - INT_PRI_BASE)
33#define PPI_NR ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ)
34
35#define ICTLR_CPU_IEP_VFIQ 0x08 31#define ICTLR_CPU_IEP_VFIQ 0x08
36#define ICTLR_CPU_IEP_FIR 0x14 32#define ICTLR_CPU_IEP_FIR 0x14
37#define ICTLR_CPU_IEP_FIR_SET 0x18 33#define ICTLR_CPU_IEP_FIR_SET 0x18