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authorVinod Koul <vinod.koul@linux.intel.com>2011-10-13 13:04:23 -0400
committerVinod Koul <vinod.koul@linux.intel.com>2011-10-27 11:23:43 -0400
commitdb8196df4bb6f117caa163aa73b0f16fd62290bd (patch)
treeb86531031482037d9b31ad57479f2f7091020957
parent49920bc66984a512f4bcc7735a61642cd0e4d6f2 (diff)
dmaengine: move drivers to dma_transfer_direction
fixup usage of dma direction by introducing dma_transfer_direction, this patch moves dma/drivers/* to use new enum Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Viresh Kumar <viresh.kumar@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Mika Westerberg <mika.westerberg@iki.fi> Cc: H Hartley Sweeten <hartleys@visionengravers.com> Cc: Li Yang <leoli@freescale.com> Cc: Zhang Wei <zw@zh-kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Yong Wang <yong.y.wang@intel.com> Cc: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Cc: Boojin Kim <boojin.kim@samsung.com> Cc: Barry Song <Baohua.Song@csr.com> Acked-by: Mika Westerberg <mika.westerberg@iki.fi> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
-rw-r--r--arch/arm/mach-ep93xx/include/mach/dma.h6
-rw-r--r--arch/arm/plat-nomadik/include/plat/ste_dma40.h4
-rw-r--r--drivers/dma/amba-pl08x.c24
-rw-r--r--drivers/dma/at_hdmac.c22
-rw-r--r--drivers/dma/coh901318.c12
-rw-r--r--drivers/dma/coh901318_lli.c23
-rw-r--r--drivers/dma/coh901318_lli.h4
-rw-r--r--drivers/dma/dw_dmac.c14
-rw-r--r--drivers/dma/ep93xx_dma.c22
-rw-r--r--drivers/dma/fsldma.c4
-rw-r--r--drivers/dma/imx-dma.c10
-rw-r--r--drivers/dma/imx-sdma.c10
-rw-r--r--drivers/dma/intel_mid_dma.c14
-rw-r--r--drivers/dma/intel_mid_dma_regs.h2
-rw-r--r--drivers/dma/ipu/ipu_idmac.c4
-rw-r--r--drivers/dma/mxs-dma.c8
-rw-r--r--drivers/dma/pch_dma.c12
-rw-r--r--drivers/dma/pl330.c18
-rw-r--r--drivers/dma/shdma.c25
-rw-r--r--drivers/dma/ste_dma40.c26
-rw-r--r--drivers/dma/timb_dma.c18
-rw-r--r--drivers/dma/txx9dmac.c12
-rw-r--r--include/linux/amba/pl08x.h4
-rw-r--r--include/linux/dw_dmac.h2
-rw-r--r--include/linux/sh_dma.h2
25 files changed, 150 insertions, 152 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
index 46d4d876e6f..e82c642fa53 100644
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ b/arch/arm/mach-ep93xx/include/mach/dma.h
@@ -37,7 +37,7 @@
37 */ 37 */
38struct ep93xx_dma_data { 38struct ep93xx_dma_data {
39 int port; 39 int port;
40 enum dma_data_direction direction; 40 enum dma_transfer_direction direction;
41 const char *name; 41 const char *name;
42}; 42};
43 43
@@ -80,14 +80,14 @@ static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan)
80 * channel supports given DMA direction. Only M2P channels have such 80 * channel supports given DMA direction. Only M2P channels have such
81 * limitation, for M2M channels the direction is configurable. 81 * limitation, for M2M channels the direction is configurable.
82 */ 82 */
83static inline enum dma_data_direction 83static inline enum dma_transfer_direction
84ep93xx_dma_chan_direction(struct dma_chan *chan) 84ep93xx_dma_chan_direction(struct dma_chan *chan)
85{ 85{
86 if (!ep93xx_dma_chan_is_m2p(chan)) 86 if (!ep93xx_dma_chan_is_m2p(chan))
87 return DMA_NONE; 87 return DMA_NONE;
88 88
89 /* even channels are for TX, odd for RX */ 89 /* even channels are for TX, odd for RX */
90 return (chan->chan_id % 2 == 0) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; 90 return (chan->chan_id % 2 == 0) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
91} 91}
92 92
93#endif /* __ASM_ARCH_DMA_H */ 93#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index 685c78716d9..38b041a40db 100644
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -187,7 +187,7 @@ static inline struct
187dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, 187dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
188 dma_addr_t addr, 188 dma_addr_t addr,
189 unsigned int size, 189 unsigned int size,
190 enum dma_data_direction direction, 190 enum dma_transfer_direction direction,
191 unsigned long flags) 191 unsigned long flags)
192{ 192{
193 struct scatterlist sg; 193 struct scatterlist sg;
@@ -209,7 +209,7 @@ static inline struct
209dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, 209dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
210 dma_addr_t addr, 210 dma_addr_t addr,
211 unsigned int size, 211 unsigned int size,
212 enum dma_data_direction direction, 212 enum dma_transfer_direction direction,
213 unsigned long flags) 213 unsigned long flags)
214{ 214{
215 return NULL; 215 return NULL;
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index b7cbd1ab1db..41c62fd0680 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -882,9 +882,9 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan,
882 ch->signal = ret; 882 ch->signal = ret;
883 883
884 /* Assign the flow control signal to this channel */ 884 /* Assign the flow control signal to this channel */
885 if (txd->direction == DMA_TO_DEVICE) 885 if (txd->direction == DMA_MEM_TO_DEV)
886 txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT; 886 txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT;
887 else if (txd->direction == DMA_FROM_DEVICE) 887 else if (txd->direction == DMA_DEV_TO_MEM)
888 txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT; 888 txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT;
889 } 889 }
890 890
@@ -1102,10 +1102,10 @@ static int dma_set_runtime_config(struct dma_chan *chan,
1102 1102
1103 /* Transfer direction */ 1103 /* Transfer direction */
1104 plchan->runtime_direction = config->direction; 1104 plchan->runtime_direction = config->direction;
1105 if (config->direction == DMA_TO_DEVICE) { 1105 if (config->direction == DMA_MEM_TO_DEV) {
1106 addr_width = config->dst_addr_width; 1106 addr_width = config->dst_addr_width;
1107 maxburst = config->dst_maxburst; 1107 maxburst = config->dst_maxburst;
1108 } else if (config->direction == DMA_FROM_DEVICE) { 1108 } else if (config->direction == DMA_DEV_TO_MEM) {
1109 addr_width = config->src_addr_width; 1109 addr_width = config->src_addr_width;
1110 maxburst = config->src_maxburst; 1110 maxburst = config->src_maxburst;
1111 } else { 1111 } else {
@@ -1136,7 +1136,7 @@ static int dma_set_runtime_config(struct dma_chan *chan,
1136 cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; 1136 cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT;
1137 cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; 1137 cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
1138 1138
1139 if (plchan->runtime_direction == DMA_FROM_DEVICE) { 1139 if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
1140 plchan->src_addr = config->src_addr; 1140 plchan->src_addr = config->src_addr;
1141 plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR | 1141 plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
1142 pl08x_select_bus(plchan->cd->periph_buses, 1142 pl08x_select_bus(plchan->cd->periph_buses,
@@ -1152,7 +1152,7 @@ static int dma_set_runtime_config(struct dma_chan *chan,
1152 "configured channel %s (%s) for %s, data width %d, " 1152 "configured channel %s (%s) for %s, data width %d, "
1153 "maxburst %d words, LE, CCTL=0x%08x\n", 1153 "maxburst %d words, LE, CCTL=0x%08x\n",
1154 dma_chan_name(chan), plchan->name, 1154 dma_chan_name(chan), plchan->name,
1155 (config->direction == DMA_FROM_DEVICE) ? "RX" : "TX", 1155 (config->direction == DMA_DEV_TO_MEM) ? "RX" : "TX",
1156 addr_width, 1156 addr_width,
1157 maxburst, 1157 maxburst,
1158 cctl); 1158 cctl);
@@ -1322,7 +1322,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
1322 1322
1323static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( 1323static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1324 struct dma_chan *chan, struct scatterlist *sgl, 1324 struct dma_chan *chan, struct scatterlist *sgl,
1325 unsigned int sg_len, enum dma_data_direction direction, 1325 unsigned int sg_len, enum dma_transfer_direction direction,
1326 unsigned long flags) 1326 unsigned long flags)
1327{ 1327{
1328 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); 1328 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
@@ -1354,10 +1354,10 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1354 */ 1354 */
1355 txd->direction = direction; 1355 txd->direction = direction;
1356 1356
1357 if (direction == DMA_TO_DEVICE) { 1357 if (direction == DMA_MEM_TO_DEV) {
1358 txd->cctl = plchan->dst_cctl; 1358 txd->cctl = plchan->dst_cctl;
1359 slave_addr = plchan->dst_addr; 1359 slave_addr = plchan->dst_addr;
1360 } else if (direction == DMA_FROM_DEVICE) { 1360 } else if (direction == DMA_DEV_TO_MEM) {
1361 txd->cctl = plchan->src_cctl; 1361 txd->cctl = plchan->src_cctl;
1362 slave_addr = plchan->src_addr; 1362 slave_addr = plchan->src_addr;
1363 } else { 1363 } else {
@@ -1368,10 +1368,10 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
1368 } 1368 }
1369 1369
1370 if (plchan->cd->device_fc) 1370 if (plchan->cd->device_fc)
1371 tmp = (direction == DMA_TO_DEVICE) ? PL080_FLOW_MEM2PER_PER : 1371 tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER :
1372 PL080_FLOW_PER2MEM_PER; 1372 PL080_FLOW_PER2MEM_PER;
1373 else 1373 else
1374 tmp = (direction == DMA_TO_DEVICE) ? PL080_FLOW_MEM2PER : 1374 tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER :
1375 PL080_FLOW_PER2MEM; 1375 PL080_FLOW_PER2MEM;