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authorLinus Torvalds <torvalds@linux-foundation.org>2012-05-19 18:30:15 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-05-19 18:30:15 -0400
commitd6c77973679d56a1834d8f8f9361f5fd0c7f4811 (patch)
tree494b4dd7bda7fb4f650645c7930f58dc185d29ae
parent5d1204582e7bc0682fb019e5666bd62cc27260b4 (diff)
parentb3cb8674811d1851bbf1486a73d62b90c119b994 (diff)
Merge tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6
Pull PA-RISC fixes from James Bottomley: "This is a set of three bug fixes that gets parisc running again on systems with PA1.1 processors. Two fix regressions introduced in 2.6.39 and one fixes a prefetch bug that only affects PA7300LC processors. We also have another pending fix to do with the sectional arrangement of vmlinux.lds, but there's a query on it during testing on one particular system type, so I'll hold off sending it in for now." * tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6: [PARISC] fix panic on prefetch(NULL) on PA7300LC [PARISC] fix crash in flush_icache_page_asm on PA1.1 [PARISC] fix PA1.1 oops on boot
-rw-r--r--arch/parisc/include/asm/prefetch.h7
-rw-r--r--arch/parisc/kernel/entry.S4
-rw-r--r--arch/parisc/kernel/pacache.S38
3 files changed, 30 insertions, 19 deletions
diff --git a/arch/parisc/include/asm/prefetch.h b/arch/parisc/include/asm/prefetch.h
index c5edc60c059..1ee7c82672c 100644
--- a/arch/parisc/include/asm/prefetch.h
+++ b/arch/parisc/include/asm/prefetch.h
@@ -21,7 +21,12 @@
21#define ARCH_HAS_PREFETCH 21#define ARCH_HAS_PREFETCH
22static inline void prefetch(const void *addr) 22static inline void prefetch(const void *addr)
23{ 23{
24 __asm__("ldw 0(%0), %%r0" : : "r" (addr)); 24 __asm__(
25#ifndef CONFIG_PA20
26 /* Need to avoid prefetch of NULL on PA7300LC */
27 " extrw,u,= %0,31,32,%%r0\n"
28#endif
29 " ldw 0(%0), %%r0" : : "r" (addr));
25} 30}
26 31
27/* LDD is a PA2.0 addition. */ 32/* LDD is a PA2.0 addition. */
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S
index 6f059443914..53503421702 100644
--- a/arch/parisc/kernel/entry.S
+++ b/arch/parisc/kernel/entry.S
@@ -581,7 +581,11 @@
581 */ 581 */
582 cmpiclr,= 0x01,\tmp,%r0 582 cmpiclr,= 0x01,\tmp,%r0
583 ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot 583 ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot
584#ifdef CONFIG_64BIT
584 depd,z \prot,8,7,\prot 585 depd,z \prot,8,7,\prot
586#else
587 depw,z \prot,8,7,\prot
588#endif
585 /* 589 /*
586 * OK, it is in the temp alias region, check whether "from" or "to". 590 * OK, it is in the temp alias region, check whether "from" or "to".
587 * Check "subtle" note in pacache.S re: r23/r26. 591 * Check "subtle" note in pacache.S re: r23/r26.
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 93ff3d90edd..5d7218ad885 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -692,7 +692,7 @@ ENTRY(flush_icache_page_asm)
692 692
693 /* Purge any old translation */ 693 /* Purge any old translation */
694 694
695 pitlb (%sr0,%r28) 695 pitlb (%sr4,%r28)
696 696
697 ldil L%icache_stride, %r1 697 ldil L%icache_stride, %r1
698 ldw R%icache_stride(%r1), %r1 698 ldw R%icache_stride(%r1), %r1
@@ -706,27 +706,29 @@ ENTRY(flush_icache_page_asm)
706 sub %r25, %r1, %r25 706 sub %r25, %r1, %r25
707 707
708 708
7091: fic,m %r1(%r28) 709 /* fic only has the type 26 form on PA1.1, requiring an
710 fic,m %r1(%r28) 710 * explicit space specification, so use %sr4 */
711 fic,m %r1(%r28) 7111: fic,m %r1(%sr4,%r28)
712 fic,m %r1(%r28) 712 fic,m %r1(%sr4,%r28)
713 fic,m %r1(%r28) 713 fic,m %r1(%sr4,%r28)
714 fic,m %r1(%r28) 714 fic,m %r1(%sr4,%r28)
715 fic,m %r1(%r28) 715 fic,m %r1(%sr4,%r28)
716 fic,m %r1(%r28) 716 fic,m %r1(%sr4,%r28)
717 fic,m %r1(%r28) 717 fic,m %r1(%sr4,%r28)
718 fic,m %r1(%r28) 718 fic,m %r1(%sr4,%r28)
719 fic,m %r1(%r28) 719 fic,m %r1(%sr4,%r28)
720 fic,m %r1(%r28) 720 fic,m %r1(%sr4,%r28)
721 fic,m %r1(%r28) 721 fic,m %r1(%sr4,%r28)
722 fic,m %r1(%r28) 722 fic,m %r1(%sr4,%r28)
723 fic,m %r1(%r28) 723 fic,m %r1(%sr4,%r28)
724 fic,m %r1(%sr4,%r28)
725 fic,m %r1(%sr4,%r28)
724 cmpb,COND(<<) %r28, %r25,1b 726 cmpb,COND(<<) %r28, %r25,1b
725 fic,m %r1(%r28) 727 fic,m %r1(%sr4,%r28)
726 728
727 sync 729 sync
728 bv %r0(%r2) 730 bv %r0(%r2)
729 pitlb (%sr0,%r25) 731 pitlb (%sr4,%r25)
730 .exit 732 .exit
731 733
732 .procend 734 .procend