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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-10 13:19:57 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-10 13:19:57 -0500
commitd52739c62e0096dccea59f012d80256c6e359a98 (patch)
tree4df8ae0640c360eb79b6d0511f084b2337e21e12
parentabce00f962a11ed6f748c2569e11695a30716b53 (diff)
parent0d2006bbf09e817f125ba1e42b2549bc2c5d7351 (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (31 commits) pinctrl: remove unnecessary max pin number pinctrl: correct a offset while enumerating pins pinctrl: some typo fixes pinctrl: rename U300 and SIRF pin controllers pinctrl: pass name instead of device to pin_config_* pinctrl: add "struct seq_file;" to pinconf.h pinctrl: conjure names for unnamed pins pinctrl: add a group-specific hog macro pinctrl: don't create a device for each pin controller arm/u300: don't use PINMUX_MAP_PRIMARY* pinctrl: implement PINMUX_MAP_SYS_HOG pinctrl: add a pin config interface pinctrl/coh901: driver to request its pins pinctrl: u300-pinmux: register proper GPIO ranges pinctrl: move the U300 GPIO driver to pinctrl ARM: u300: localize GPIO assignments pinctrl: make it possible to add multiple maps pinctrl: make a copy of pinmux map pinctrl: GPIO direction support for muxing pinctrl: print pin range in GPIO range debugs ...
-rw-r--r--Documentation/pinctrl.txt258
-rw-r--r--MAINTAINERS2
-rw-r--r--arch/arm/mach-u300/Kconfig4
-rw-r--r--arch/arm/mach-u300/core.c14
-rw-r--r--arch/arm/mach-u300/include/mach/gpio-u300.h115
-rw-r--r--arch/arm/mach-u300/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-u300/mmc.c2
-rw-r--r--arch/arm/mach-u300/u300-gpio.h114
-rw-r--r--drivers/gpio/Kconfig9
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/pinctrl/Kconfig22
-rw-r--r--drivers/pinctrl/Makefile8
-rw-r--r--drivers/pinctrl/core.c143
-rw-r--r--drivers/pinctrl/core.h13
-rw-r--r--drivers/pinctrl/pinconf.c326
-rw-r--r--drivers/pinctrl/pinconf.h36
-rw-r--r--drivers/pinctrl/pinctrl-coh901.c (renamed from drivers/gpio/gpio-u300.c)21
-rw-r--r--drivers/pinctrl/pinctrl-sirf.c (renamed from drivers/pinctrl/pinmux-sirf.c)9
-rw-r--r--drivers/pinctrl/pinctrl-u300.c (renamed from drivers/pinctrl/pinmux-u300.c)47
-rw-r--r--drivers/pinctrl/pinmux.c265
-rw-r--r--include/linux/pinctrl/machine.h30
-rw-r--r--include/linux/pinctrl/pinconf.h97
-rw-r--r--include/linux/pinctrl/pinctrl.h15
-rw-r--r--include/linux/pinctrl/pinmux.h29
24 files changed, 1169 insertions, 413 deletions
diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index b04cb7d45a1..6727b92bc2f 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -7,12 +7,9 @@ This subsystem deals with:
7 7
8- Multiplexing of pins, pads, fingers (etc) see below for details 8- Multiplexing of pins, pads, fingers (etc) see below for details
9 9
10The intention is to also deal with: 10- Configuration of pins, pads, fingers (etc), such as software-controlled
11 11 biasing and driving mode specific pins, such as pull-up/down, open drain,
12- Software-controlled biasing and driving mode specific pins, such as 12 load capacitance etc.
13 pull-up/down, open drain etc, load capacitance configuration when controlled
14 by software, etc.
15
16 13
17Top-level interface 14Top-level interface
18=================== 15===================
@@ -32,7 +29,7 @@ Definition of PIN:
32 be sparse - i.e. there may be gaps in the space with numbers where no 29 be sparse - i.e. there may be gaps in the space with numbers where no
33 pin exists. 30 pin exists.
34 31
35When a PIN CONTROLLER is instatiated, it will register a descriptor to the 32When a PIN CONTROLLER is instantiated, it will register a descriptor to the
36pin control framework, and this descriptor contains an array of pin descriptors 33pin control framework, and this descriptor contains an array of pin descriptors
37describing the pins handled by this specific pin controller. 34describing the pins handled by this specific pin controller.
38 35
@@ -61,14 +58,14 @@ this in our driver:
61 58
62#include <linux/pinctrl/pinctrl.h> 59#include <linux/pinctrl/pinctrl.h>
63 60
64const struct pinctrl_pin_desc __refdata foo_pins[] = { 61const struct pinctrl_pin_desc foo_pins[] = {
65 PINCTRL_PIN(0, "A1"), 62 PINCTRL_PIN(0, "A8"),
66 PINCTRL_PIN(1, "A2"), 63 PINCTRL_PIN(1, "B8"),
67 PINCTRL_PIN(2, "A3"), 64 PINCTRL_PIN(2, "C8"),
68 ... 65 ...
69 PINCTRL_PIN(61, "H6"), 66 PINCTRL_PIN(61, "F1"),
70 PINCTRL_PIN(62, "H7"), 67 PINCTRL_PIN(62, "G1"),
71 PINCTRL_PIN(63, "H8"), 68 PINCTRL_PIN(63, "H1"),
72}; 69};
73 70
74static struct pinctrl_desc foo_desc = { 71static struct pinctrl_desc foo_desc = {
@@ -88,11 +85,16 @@ int __init foo_probe(void)
88 pr_err("could not register foo pin driver\n"); 85 pr_err("could not register foo pin driver\n");
89} 86}
90 87
88To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and
89selected drivers, you need to select them from your machine's Kconfig entry,
90since these are so tightly integrated with the machines they are used on.
91See for example arch/arm/mach-u300/Kconfig for an example.
92
91Pins usually have fancier names than this. You can find these in the dataheet 93Pins usually have fancier names than this. You can find these in the dataheet
92for your chip. Notice that the core pinctrl.h file provides a fancy macro 94for your chip. Notice that the core pinctrl.h file provides a fancy macro
93called PINCTRL_PIN() to create the struct entries. As you can see I enumerated 95called PINCTRL_PIN() to create the struct entries. As you can see I enumerated
94the pins from 0 in the upper left corner to 63 in the lower right corner, 96the pins from 0 in the upper left corner to 63 in the lower right corner.
95this enumeration was arbitrarily chosen, in practice you need to think 97This enumeration was arbitrarily chosen, in practice you need to think
96through your numbering system so that it matches the layout of registers 98through your numbering system so that it matches the layout of registers
97and such things in your driver, or the code may become complicated. You must 99and such things in your driver, or the code may become complicated. You must
98also consider matching of offsets to the GPIO ranges that may be handled by 100also consider matching of offsets to the GPIO ranges that may be handled by
@@ -133,8 +135,8 @@ struct foo_group {
133 const unsigned num_pins; 135 const unsigned num_pins;
134}; 136};
135 137
136static unsigned int spi0_pins[] = { 0, 8, 16, 24 }; 138static const unsigned int spi0_pins[] = { 0, 8, 16, 24 };
137static unsigned int i2c0_pins[] = { 24, 25 }; 139static const unsigned int i2c0_pins[] = { 24, 25 };
138 140
139static const struct foo_group foo_groups[] = { 141static const struct foo_group foo_groups[] = {
140 { 142 {
@@ -193,6 +195,88 @@ structure, for example specific register ranges associated with each group
193and so on. 195and so on.
194 196
195 197
198Pin configuration
199=================
200
201Pins can sometimes be software-configured in an various ways, mostly related
202to their electronic properties when used as inputs or outputs. For example you
203may be able to make an output pin high impedance, or "tristate" meaning it is
204effectively disconnected. You may be able to connect an input pin to VDD or GND
205using a certain resistor value - pull up and pull down - so that the pin has a
206stable value when nothing is driving the rail it is connected to, or when it's
207unconnected.
208
209For example, a platform may do this:
210
211ret = pin_config_set("foo-dev", "FOO_GPIO_PIN", PLATFORM_X_PULL_UP);
212
213To pull up a pin to VDD. The pin configuration driver implements callbacks for
214changing pin configuration in the pin controller ops like this:
215
216#include <linux/pinctrl/pinctrl.h>
217#include <linux/pinctrl/pinconf.h>
218#include "platform_x_pindefs.h"
219
220static int foo_pin_config_get(struct pinctrl_dev *pctldev,
221 unsigned offset,
222 unsigned long *config)
223{
224 struct my_conftype conf;
225
226 ... Find setting for pin @ offset ...
227
228 *config = (unsigned long) conf;
229}
230
231static int foo_pin_config_set(struct pinctrl_dev *pctldev,
232 unsigned offset,
233 unsigned long config)
234{
235 struct my_conftype *conf = (struct my_conftype *) config;
236
237 switch (conf) {
238 case PLATFORM_X_PULL_UP:
239 ...
240 }
241 }
242}
243
244static int foo_pin_config_group_get (struct pinctrl_dev *pctldev,
245 unsigned selector,
246 unsigned long *config)
247{
248 ...
249}
250
251static int foo_pin_config_group_set (struct pinctrl_dev *pctldev,
252 unsigned selector,
253 unsigned long config)
254{
255 ...
256}
257
258static struct pinconf_ops foo_pconf_ops = {
259 .pin_config_get = foo_pin_config_get,
260 .pin_config_set = foo_pin_config_set,
261 .pin_config_group_get = foo_pin_config_group_get,
262 .pin_config_group_set = foo_pin_config_group_set,
263};
264
265/* Pin config operations are handled by some pin controller */
266static struct pinctrl_desc foo_desc = {
267 ...
268 .confops = &foo_pconf_ops,
269};
270
271Since some controllers have special logic for handling entire groups of pins
272they can exploit the special whole-group pin control function. The
273pin_config_group_set() callback is allowed to return the error code -EAGAIN,
274for groups it does not want to handle, or if it just wants to do some
275group-level handling and then fall through to iterate over all pins, in which
276case each individual pin will be treated by separate pin_config_set() calls as
277well.
278
279
196Interaction with the GPIO subsystem 280Interaction with the GPIO subsystem
197=================================== 281===================================
198 282
@@ -214,19 +298,20 @@ static struct pinctrl_gpio_range gpio_range_a = {
214 .name = "chip a", 298 .name = "chip a",
215 .id = 0, 299 .id = 0,
216 .base = 32, 300 .base = 32,
301 .pin_base = 32,
217 .npins = 16, 302 .npins = 16,
218 .gc = &chip_a; 303 .gc = &chip_a;
219}; 304};
220 305
221static struct pinctrl_gpio_range gpio_range_a = { 306static struct pinctrl_gpio_range gpio_range_b = {
222 .name = "chip b", 307 .name = "chip b",
223 .id = 0, 308 .id = 0,
224 .base = 48, 309 .base = 48,
310 .pin_base = 64,
225 .npins = 8, 311 .npins = 8,
226 .gc = &chip_b; 312 .gc = &chip_b;
227}; 313};
228 314
229
230{ 315{
231 struct pinctrl_dev *pctl; 316 struct pinctrl_dev *pctl;
232 ... 317 ...
@@ -235,42 +320,39 @@ static struct pinctrl_gpio_range gpio_range_a = {
235} 320}
236 321
237So this complex system has one pin controller handling two different 322So this complex system has one pin controller handling two different
238GPIO chips. Chip a has 16 pins and chip b has 8 pins. They are mapped in 323GPIO chips. "chip a" has 16 pins and "chip b" has 8 pins. The "chip a" and
239the global GPIO pin space at: 324"chip b" have different .pin_base, which means a start pin number of the
325GPIO range.
326
327The GPIO range of "chip a" starts from the GPIO base of 32 and actual
328pin range also starts from 32. However "chip b" has different starting
329offset for the GPIO range and pin range. The GPIO range of "chip b" starts
330from GPIO number 48, while the pin range of "chip b" starts from 64.
331
332We can convert a gpio number to actual pin number using this "pin_base".
333They are mapped in the global GPIO pin space at:
240 334
241chip a: [32 .. 47] 335chip a:
242chip b: [48 .. 55] 336 - GPIO range : [32 .. 47]
337 - pin range : [32 .. 47]
338chip b:
339 - GPIO range : [48 .. 55]
340 - pin range : [64 .. 71]
243 341
244When GPIO-specific functions in the pin control subsystem are called, these 342When GPIO-specific functions in the pin control subsystem are called, these
245ranges will be used to look up the apropriate pin controller by inspecting 343ranges will be used to look up the appropriate pin controller by inspecting
246and matching the pin to the pin ranges across all controllers. When a 344and matching the pin to the pin ranges across all controllers. When a
247pin controller handling the matching range is found, GPIO-specific functions 345pin controller handling the matching range is found, GPIO-specific functions
248will be called on that specific pin controller. 346will be called on that specific pin controller.
249 347
250For all functionalities dealing with pin biasing, pin muxing etc, the pin 348For all functionalities dealing with pin biasing, pin muxing etc, the pin
251controller subsystem will subtract the range's .base offset from the passed 349controller subsystem will subtract the range's .base offset from the passed
252in gpio pin number, and pass that on to the pin control driver, so the driver 350in gpio number, and add the ranges's .pin_base offset to retrive a pin number.
253will get an offset into its handled number range. Further it is also passed 351After that, the subsystem passes it on to the pin control driver, so the driver
352will get an pin number into its handled number range. Further it is also passed
254the range ID value, so that the pin controller knows which range it should 353the range ID value, so that the pin controller knows which range it should
255deal with. 354deal with.
256 355
257For example: if a user issues pinctrl_gpio_set_foo(50), the pin control
258subsystem will find that the second range on this pin controller matches,
259subtract the base 48 and call the
260pinctrl_driver_gpio_set_foo(pinctrl, range, 2) where the latter function has
261this signature:
262
263int pinctrl_driver_gpio_set_foo(struct pinctrl_dev *pctldev,
264 struct pinctrl_gpio_range *rangeid,
265 unsigned offset);
266
267Now the driver knows that we want to do some GPIO-specific operation on the
268second GPIO range handled by "chip b", at offset 2 in that specific range.
269
270(If the GPIO subsystem is ever refactored to use a local per-GPIO controller
271pin space, this mapping will need to be augmented accordingly.)
272
273
274PINMUX interfaces 356PINMUX interfaces
275================= 357=================
276 358
@@ -438,7 +520,7 @@ you. Define enumerators only for the pins you can control if that makes sense.
438 520
439Assumptions: 521Assumptions:
440 522
441We assume that the number possible function maps to pin groups is limited by 523We assume that the number of possible function maps to pin groups is limited by
442the hardware. I.e. we assume that there is no system where any function can be 524the hardware. I.e. we assume that there is no system where any function can be
443mapped to any pin, like in a phone exchange. So the available pins groups for 525mapped to any pin, like in a phone exchange. So the available pins groups for
444a certain function will be limited to a few choices (say up to eight or so), 526a certain function will be limited to a few choices (say up to eight or so),
@@ -585,7 +667,7 @@ int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector)
585 667
586const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector) 668const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
587{ 669{
588 return myfuncs[selector].name; 670 return foo_functions[selector].name;
589} 671}
590 672
591static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector, 673static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
@@ -600,16 +682,16 @@ static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
600int foo_enable(struct pinctrl_dev *pctldev, unsigned selector, 682int foo_enable(struct pinctrl_dev *pctldev, unsigned selector,
601 unsigned group) 683 unsigned group)
602{ 684{
603 u8 regbit = (1 << group); 685 u8 regbit = (1 << selector + group);
604 686
605 writeb((readb(MUX)|regbit), MUX) 687 writeb((readb(MUX)|regbit), MUX)
606 return 0; 688 return 0;
607} 689}
608 690
609int foo_disable(struct pinctrl_dev *pctldev, unsigned selector, 691void foo_disable(struct pinctrl_dev *pctldev, unsigned selector,
610 unsigned group) 692 unsigned group)
611{ 693{
612 u8 regbit = (1 << group); 694 u8 regbit = (1 << selector + group);
613 695
614 writeb((readb(MUX) & ~(regbit)), MUX) 696 writeb((readb(MUX) & ~(regbit)), MUX)
615 return 0; 697 return 0;
@@ -647,6 +729,17 @@ All the above functions are mandatory to implement for a pinmux driver.
647Pinmux interaction with the GPIO subsystem 729Pinmux interaction with the GPIO subsystem
648========================================== 730==========================================
649 731
732The public pinmux API contains two functions named pinmux_request_gpio()
733and pinmux_free_gpio(). These two functions shall *ONLY* be called from
734gpiolib-based drivers as part of their gpio_request() and
735gpio_free() semantics. Likewise the pinmux_gpio_direction_[input|output]
736shall only be called from within respective gpio_direction_[input|output]
737gpiolib implementation.
738
739NOTE that platforms and individual drivers shall *NOT* request GPIO pins to be
740muxed in. Instead, implement a proper gpiolib driver and have that driver
741request proper muxing for its pins.
742
650The function list could become long, especially if you can convert every 743The function list could become long, especially if you can convert every
651individual pin into a GPIO pin independent of any other pins, and then try 744individual pin into a GPIO pin independent of any other pins, and then try
652the approach to define every pin as a function. 745the approach to define every pin as a function.
@@ -654,19 +747,24 @@ the approach to define every pin as a function.
654In this case, the function array would become 64 entries for each GPIO 747In this case, the function array would become 64 entries for each GPIO
655setting and then the device functions. 748setting and then the device functions.
656 749
657For this reason there is an additional function a pinmux driver can implement 750For this reason there are two functions a pinmux driver can implement
658to enable only GPIO on an individual pin: .gpio_request_enable(). The same 751to enable only GPIO on an individual pin: .gpio_request_enable() and
659.free() function as for other functions is assumed to be usable also for 752.gpio_disable_free().
660GPIO pins.
661 753
662This function will pass in the affected GPIO range identified by the pin 754This function will pass in the affected GPIO range identified by the pin
663controller core, so you know which GPIO pins are being affected by the request 755controller core, so you know which GPIO pins are being affected by the request
664operation. 756operation.
665 757
666Alternatively it is fully allowed to use named functions for each GPIO 758If your driver needs to have an indication from the framework of whether the
667pin, the pinmux_request_gpio() will attempt to obtain the function "gpioN" 759GPIO pin shall be used for input or output you can implement the
668where "N" is the global GPIO pin number if no special GPIO-handler is 760.gpio_set_direction() function. As described this shall be called from the
669registered. 761gpiolib driver and the affected GPIO range, pin offset and desired direction
762will be passed along to this function.
763
764Alternatively to using these special functions, it is fully allowed to use
765named functions for each GPIO pin, the pinmux_request_gpio() will attempt to
766obtain the function "gpioN" where "N" is the global GPIO pin number if no
767special GPIO-handler is registered.
670 768
671 769
672Pinmux board/machine configuration 770Pinmux board/machine configuration
@@ -683,19 +781,19 @@ spi on the second function mapping:
683 781
684#include <linux/pinctrl/machine.h> 782#include <linux/pinctrl/machine.h>
685 783
686static struct pinmux_map pmx_mapping[] = { 784static const struct pinmux_map __initdata pmx_mapping[] = {
687 { 785 {
688 .ctrl_dev_name = "pinctrl.0", 786 .ctrl_dev_name = "pinctrl-foo",
689 .function = "spi0", 787 .function = "spi0",
690 .dev_name = "foo-spi.0", 788 .dev_name = "foo-spi.0",
691 }, 789 },
692 { 790 {
693 .ctrl_dev_name = "pinctrl.0", 791 .ctrl_dev_name = "pinctrl-foo",
694 .function = "i2c0", 792 .function = "i2c0",
695 .dev_name = "foo-i2c.0", 793 .dev_name = "foo-i2c.0",
696 }, 794 },
697 { 795 {
698 .ctrl_dev_name = "pinctrl.0", 796 .ctrl_dev_name = "pinctrl-foo",
699 .function = "mmc0", 797 .function = "mmc0",
700 .dev_name = "foo-mmc.0", 798 .dev_name = "foo-mmc.0",
701 }, 799 },
@@ -714,14 +812,14 @@ for example if they are not yet instantiated or cumbersome to obtain.
714 812
715You register this pinmux mapping to the pinmux subsystem by simply: 813You register this pinmux mapping to the pinmux subsystem by simply:
716 814
717 ret = pinmux_register_mappings(&pmx_mapping, ARRAY_SIZE(pmx_mapping)); 815 ret = pinmux_register_mappings(pmx_mapping, ARRAY_SIZE(pmx_mapping));
718 816
719Since the above construct is pretty common there is a helper macro to make 817Since the above construct is pretty common there is a helper macro to make
720it even more compact which assumes you want to use pinctrl.0 and position 818it even more compact which assumes you want to use pinctrl-foo and position
7210 for mapping, for example: 8190 for mapping, for example:
722 820
723static struct pinmux_map pmx_mapping[] = { 821static struct pinmux_map __initdata pmx_mapping[] = {
724 PINMUX_MAP_PRIMARY("I2CMAP", "i2c0", "foo-i2c.0"), 822 PINMUX_MAP("I2CMAP", "pinctrl-foo", "i2c0", "foo-i2c.0"),
725}; 823};
726 824
727 825
@@ -734,14 +832,14 @@ As it is possible to map a function to different groups of pins an optional
734... 832...
735{ 833{
736 .name = "spi0-pos-A", 834 .name = "spi0-pos-A",
737 .ctrl_dev_name = "pinctrl.0", 835 .ctrl_dev_name = "pinctrl-foo",
738 .function = "spi0", 836 .function = "spi0",
739 .group = "spi0_0_grp", 837 .group = "spi0_0_grp",
740 .dev_name = "foo-spi.0", 838 .dev_name = "foo-spi.0",
741}, 839},
742{ 840{
743 .name = "spi0-pos-B", 841 .name = "spi0-pos-B",
744 .ctrl_dev_name = "pinctrl.0", 842 .ctrl_dev_name = "pinctrl-foo",
745 .function = "spi0", 843 .function = "spi0",
746 .group = "spi0_1_grp", 844 .group = "spi0_1_grp",
747 .dev_name = "foo-spi.0", 845 .dev_name = "foo-spi.0",
@@ -760,44 +858,44 @@ case), we define a mapping like this:
760... 858...
761{ 859{
762 .name "2bit" 860 .name "2bit"
763 .ctrl_dev_name = "pinctrl.0", 861 .ctrl_dev_name = "pinctrl-foo",
764 .function = "mmc0", 862 .function = "mmc0",
765 .group = "mmc0_0_grp", 863 .group = "mmc0_1_grp",
766 .dev_name = "foo-mmc.0", 864 .dev_name = "foo-mmc.0",
767}, 865},
768{ 866{
769 .name "4bit" 867 .name "4bit"
770 .ctrl_dev_name = "pinctrl.0", 868 .ctrl_dev_name = "pinctrl-foo",
771 .function = "mmc0", 869 .function = "mmc0",
772 .group = "mmc0_0_grp", 870 .group = "mmc0_1_grp",
773 .dev_name = "foo-mmc.0", 871 .dev_name = "foo-mmc.0",
774}, 872},
775{ 873{
776 .name "4bit" 874 .name "4bit"
777 .ctrl_dev_name = "pinctrl.0", 875 .ctrl_dev_name = "pinctrl-foo",
778 .function = "mmc0", 876 .function = "mmc0",
779 .group = "mmc0_1_grp", 877 .group = "mmc0_2_grp",
780 .dev_name = "foo-mmc.0", 878 .dev_name = "foo-mmc.0",
781}, 879},
782{ 880{
783 .name "8bit" 881 .name "8bit"
784 .ctrl_dev_name = "pinctrl.0", 882 .ctrl_dev_name = "pinctrl-foo",
785 .function = "mmc0", 883 .function = "mmc0",
786 .group = "mmc0_0_grp", 884 .group = "mmc0_1_grp",
787 .dev_name = "foo-mmc.0", 885 .dev_name = "foo-mmc.0",
788}, 886},
789{ 887{
790 .name "8bit" 888 .name "8bit"
791 .ctrl_dev_name = "pinctrl.0", 889 .ctrl_dev_name = "pinctrl-foo",
792 .function = "mmc0", 890 .function = "mmc0",
793 .group = "mmc0_1_grp", 891 .group = "mmc0_2_grp",
794 .dev_name = "foo-mmc.0", 892 .dev_name = "foo-mmc.0",
795}, 893},
796{ 894{
797 .name "8bit" 895 .name "8bit"
798 .ctrl_dev_name = "pinctrl.0", 896 .ctrl_dev_name = "pinctrl-foo",
799 .function = "mmc0", 897 .function = "mmc0",
800 .group = "mmc0_2_grp", 898 .group = "mmc0_3_grp",
801 .dev_name = "foo-mmc.0", 899 .dev_name = "foo-mmc.0",
802}, 900},
803... 901...
@@ -898,7 +996,7 @@ like this:
898 996
899{ 997{
900 .name "POWERMAP" 998 .name "POWERMAP"
901 .ctrl_dev_name = "pinctrl.0", 999 .ctrl_dev_name = "pinctrl-foo",
902 .function = "power_func", 1000 .function = "power_func",
903 .hog_on_boot = true, 1001 .hog_on_boot = true,
904}, 1002},
diff --git a/MAINTAINERS b/MAINTAINERS
index 0ae41c9a6c1..a2883a28369 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5123,7 +5123,7 @@ F: drivers/*/*/picoxcell*
5123PIN CONTROL SUBSYSTEM 5123PIN CONTROL SUBSYSTEM
5124M: Linus Walleij <linus.walleij@linaro.org> 5124M: Linus Walleij <linus.walleij@linaro.org>
5125S: Maintained 5125S: Maintained
5126F: drivers/pinmux/ 5126F: drivers/pinctrl/
5127 5127
5128PKTCDVD DRIVER 5128PKTCDVD DRIVER
5129M: Peter Osterlund <petero2@telia.com> 5129M: Peter Osterlund <petero2@telia.com>
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index 1cbcd4fc1e1..54d8f34fdee 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -7,8 +7,8 @@ comment "ST-Ericsson Mobile Platform Products"
7config MACH_U300 7config MACH_U300
8 bool "U300" 8 bool "U300"
9 select PINCTRL 9 select PINCTRL
10 select PINMUX_U300 10 select PINCTRL_U300
11 select GPIO_U300 11 select PINCTRL_COH901
12 12
13comment "ST-Ericsson U300/U330/U335/U365 Feature Selections" 13comment "ST-Ericsson U300/U330/U335/U365 Feature Selections"
14 14
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 697930761b3..b4c6926a700 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1605,15 +1605,15 @@ static struct platform_device pinmux_device = {
1605}; 1605};
1606 1606
1607/* Pinmux settings */ 1607/* Pinmux settings */
1608static struct pinmux_map u300_pinmux_map[] = { 1608static struct pinmux_map __initdata u300_pinmux_map[] = {
1609 /* anonymous maps for chip power and EMIFs */ 1609 /* anonymous maps for chip power and EMIFs */
1610 PINMUX_MAP_PRIMARY_SYS_HOG("POWER", "power"), 1610 PINMUX_MAP_SYS_HOG("POWER", "pinmux-u300", "power"),
1611 PINMUX_MAP_PRIMARY_SYS_HOG("EMIF0", "emif0"), 1611 PINMUX_MAP_SYS_HOG("EMIF0", "pinmux-u300", "emif0"),
1612 PINMUX_MAP_PRIMARY_SYS_HOG("EMIF1", "emif1"), 1612 PINMUX_MAP_SYS_HOG("EMIF1", "pinmux-u300", "emif1"),
1613 /* per-device maps for MMC/SD, SPI and UART */ 1613 /* per-device maps for MMC/SD, SPI and UART */
1614 PINMUX_MAP_PRIMARY("MMCSD", "mmc0", "mmci"), 1614 PINMUX_MAP("MMCSD", "pinmux-u300", "mmc0", "mmci"),
1615 PINMUX_MAP_PRIMARY("SPI", "spi0", "pl022"), 1615 PINMUX_MAP("SPI", "pinmux-u300", "spi0", "pl022"),
1616 PINMUX_MAP_PRIMARY("UART0", "uart0", "uart0"), 1616 PINMUX_MAP("UART0", "pinmux-u300", "uart0", "uart0"),
1617}; 1617};
1618 1618
1619struct u300_mux_hog { 1619struct u300_mux_hog {
diff --git a/arch/arm/mach-u300/include/mach/gpio-u300.h b/arch/arm/mach-u300/include/mach/gpio-u300.h
index 0c2b2021951..bf4c7935aec 100644
--- a/arch/arm/mach-u300/include/mach/gpio-u300.h
+++ b/arch/arm/mach-u300/include/mach/gpio-u300.h
@@ -9,121 +9,6 @@
9#ifndef __MACH_U300_GPIO_U300_H 9#ifndef __MACH_U300_GPIO_U300_H
10#define __MACH_U300_GPIO_U300_H 10#define __MACH_U300_GPIO_U300_H
11 11
12/*
13 * Individual pin assignments for the B26/S26. Notice that the
14 * actual usage of these pins depends on the PAD MUX settings, that
15 * is why the same number can potentially appear several times.
16 * In the reference design each pin is only used for one purpose.
17 * These were determined by inspecting the B26/S26 schematic:
18 * 2/1911-ROA 128 1603
19 */
20#ifdef CONFIG_MACH_U300_BS2X
21#define U300_GPIO_PIN_UART_RX 0
22#define U300_GPIO_PIN_UART_TX 1
23#define U300_GPIO_PIN_GPIO02 2 /* Unrouted */
24#define U300_GPIO_PIN_GPIO03 3 /* Unrouted */
25#define U300_GPIO_PIN_CAM_SLEEP 4
26#define U300_GPIO_PIN_CAM_REG_EN 5
27#define U300_GPIO_PIN_GPIO06 6 /* Unrouted */
28#define U300_GPIO_PIN_GPIO07 7 /* Unrouted */
29
30#define U300_GPIO_PIN_GPIO08 8 /* Service point SP2321 */
31#define U300_GPIO_PIN_GPIO09 9 /* Service point SP2322 */
32#define U300_GPIO_PIN_PHFSENSE 10 /* Headphone jack sensing */
33#define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */
34#define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */
35#define U300_GPIO_PIN_FLIPSENSE 13 /* Mechanical flip sensing */
36#define U300_GPIO_PIN_GPIO14 14 /* DSP JTAG Port RTCK */
37#define U300_GPIO_PIN_GPIO15 15 /* Unrouted */
38
39#define U300_GPIO_PIN_GPIO16 16 /* Unrouted */
40#define U300_GPIO_PIN_GPIO17 17 /* Unrouted */
41#define U300_GPIO_PIN_GPIO18 18 /* Unrouted */
42#define U300_GPIO_PIN_GPIO19 19 /* Unrouted */
43#define U300_GPIO_PIN_GPIO20 20 /* Unrouted */
44#define U300_GPIO_PIN_GPIO21 21 /* Unrouted */
45#define U300_GPIO_PIN_GPIO22 22 /* Unrouted */
46#define U300_GPIO_PIN_GPIO23 23 /* Unrouted */
47#endif
48
49/*
50 * Individual pin assignments for the B330/S330 and B365/S365.
51 * Notice that the actual usage of these pins depends on the
52 * PAD MUX settings, that is why the same number can potentially
53 * appear several times. In the reference design each pin is only
54 * used for one purpose. These were determined by inspecting the
55 * S365 schematic.
56 */
57#if defined(CONFIG_MACH_U300_BS330) || defined(CONFIG_MACH_U300_BS365) || \
58 defined(CONFIG_MACH_U300_BS335)
59#define U300_GPIO_PIN_UART_RX 0
60#define U300_GPIO_PIN_UART_TX 1
61#define U300_GPIO_PIN_UART_CTS 2
62#define U300_GPIO_PIN_UART_RTS 3
63#define U300_GPIO_PIN_CAM_MAIN_STANDBY 4 /* Camera MAIN standby */
64#define U300_GPIO_PIN_GPIO05 5 /* Unrouted */
65#define U300_GPIO_PIN_MS_CD 6 /* Memory Stick Card insertion */
66#define U300_GPIO_PIN_GPIO07 7 /* Test point TP2430 */
67
68#define U300_GPIO_PIN_GPIO08 8 /* Test point TP2437 */
69#define U300_GPIO_PIN_GPIO09 9 /* Test point TP2431 */
70#define U300_GPIO_PIN_GPIO10 10 /* Test point TP2432 */
71#define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */
72#define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */
73#define U300_GPIO_PIN_CAM_SUB_STANDBY 13 /* Camera SUB standby */
74#define U300_GPIO_PIN_GPIO14 14 /* Test point TP2436 */
75#define U300_GPIO_PIN_GPIO15 15 /* Unrouted */
76
77#define U300_GPIO_PIN_GPIO16 16 /* Test point TP2438 */
78#define U300_GPIO_PIN_PHFSENSE 17 /* Headphone jack sensing */
79#define U300_GPIO_PIN_GPIO18 18 /* Test point TP2439 */
80#define U300_GPIO_PIN_GPIO19 19 /* Routed somewhere */
81#define U300_GPIO_PIN_GPIO20 20 /* Unrouted */
82#define U300_GPIO_PIN_GPIO21 21 /* Unrouted */
83#define U300_GPIO_PIN_GPIO22 22 /* Unrouted */
84#define U300_GPIO_PIN_GPIO23 23 /* Unrouted */
85
86#define U300_GPIO_PIN_GPIO24 24 /* Unrouted */
87#define U300_GPIO_PIN_GPIO25 25 /* Unrouted */
88#define U300_GPIO_PIN_GPIO26 26 /* Unrouted */
89#define U300_GPIO_PIN_GPIO27 27 /* Unrouted */
90#define U300_GPIO_PIN_GPIO28 28 /* Unrouted */
91#define U300_GPIO_PIN_GPIO29 29 /* Unrouted */
92#define U300_GPIO_PIN_GPIO30 30 /* Unrouted */
93#define U300_GPIO_PIN_GPIO31 31 /* Unrouted */
94
95#define U300_GPIO_PIN_GPIO32 32 /* Unrouted */
96#define U300_GPIO_PIN_GPIO33 33 /* Unrouted */
97#define U300_GPIO_PIN_GPIO34 34 /* Unrouted */
98#define U300_GPIO_PIN_GPIO35 35 /* Unrouted */
99#define U300_GPIO_PIN_GPIO36 36 /* Unrouted */
100#define U300_GPIO_PIN_GPIO37 37 /* Unrouted */
101#define U300_GPIO_PIN_GPIO38 38 /* Unrouted */
102#define U300_GPIO_PIN_GPIO39 39 /* Unrouted */
103
104#ifdef CONFIG_MACH_U300_BS335
105
106#define U300_GPIO_PIN_GPIO40 40 /* Unrouted */
107#define U300_GPIO_PIN_GPIO41 41 /* Unrouted */
108#define U300_GPIO_PIN_GPIO42 42 /* Unrouted */
109#define U300_GPIO_PIN_GPIO43 43 /* Unrouted */
110#define U300_GPIO_PIN_GPIO44 44 /* Unrouted */
111#define U300_GPIO_PIN_GPIO45 45 /* Unrouted */
112#define U300_GPIO_PIN_GPIO46 46 /* Unrouted */
113#define U300_GPIO_PIN_GPIO47 47 /* Unrouted */
114
115#define U300_GPIO_PIN_GPIO48 48 /* Unrouted */
116#define U300_GPIO_PIN_GPIO49 49 /* Unrouted */
117#define U300_GPIO_PIN_GPIO50 50 /* Unrouted */
118#define U300_GPIO_PIN_GPIO51 51 /* Unrouted */
119#define U300_GPIO_PIN_GPIO52 52 /* Unrouted */
120#define U300_GPIO_PIN_GPIO53 53 /* Unrouted */
121#define U300_GPIO_PIN_GPIO54 54 /* Unrouted */
122#define U300_GPIO_PIN_GPIO55 55 /* Unrouted */
123#endif
124
125#endif
126
127/** 12/**
128 * enum u300_gpio_variant - the type of U300 GPIO employed 13 * enum u300_gpio_variant - the type of U300 GPIO employed
129 */ 14 */
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h
index db3fbfa1d6e..ee78a26707e 100644
--- a/arch/arm/mach-u300/include/mach/irqs.h
+++ b/arch/arm/mach-u300/include/mach/irqs.h
@@ -110,7 +110,7 @@
110#endif 110#endif
111 111
112/* Maximum 8*7 GPIO lines */ 112/* Maximum 8*7 GPIO lines */
113#ifdef CONFIG_GPIO_U300 113#ifdef CONFIG_PINCTRL_COH901
114#define IRQ_U300_GPIO_BASE (U300_VIC_IRQS_END) 114#define IRQ_U300_GPIO_BASE (U300_VIC_IRQS_END)
115#define IRQ_U300_GPIO_END (IRQ_U300_GPIO_BASE + 56) 115#define IRQ_U300_GPIO_END (IRQ_U300_GPIO_BASE + 56)
116#else 116#else
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index 4d482aacc27..05abd6ad9fa 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -18,8 +18,8 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <mach/coh901318.h> 19#include <mach/coh901318.h>
20#include <mach/dma_channels.h> 20#include <mach/dma_channels.h>
21#include <mach/gpio-u300.h>
22 21
22#include "u300-gpio.h"
23#include "mmc.h" 23#include "mmc.h"
24 24
25static struct mmci_platform_data mmc0_plat_data = { 25static struct mmci_platform_data mmc0_plat_data = {
diff --git a/arch/arm/mach-u300/u300-gpio.h b/arch/arm/mach-u300/u300-gpio.h
new file mode 100644
index 00000000000..847dc25300c
--- /dev/null
+++ b/arch/arm/mach-u300/u300-gpio.h
@@ -0,0 +1,114 @@
1/*
2 * Individual pin assignments for the B26/S26. Notice that the
3 * actual usage of these pins depends on the PAD MUX settings, that
4 * is why the same number can potentially appear several times.
5 * In the reference design each pin is only used for one purpose.
6 * These were determined by inspecting the B26/S26 schematic:
7 * 2/1911-ROA 128 1603
8 */
9#ifdef CONFIG_MACH_U300_BS2X
10#define U300_GPIO_PIN_UART_RX 0
11#define U300_GPIO_PIN_UART_TX 1
12#define U300_GPIO_PIN_GPIO02 2 /* Unrouted */
13#define U300_GPIO_PIN_GPIO03 3 /* Unrouted */
14#define U300_GPIO_PIN_CAM_SLEEP 4
15#define U300_GPIO_PIN_CAM_REG_EN 5
16#define U300_GPIO_PIN_GPIO06 6 /* Unrouted */
17#define U300_GPIO_PIN_GPIO07 7 /* Unrouted */
18
19#define U300_GPIO_PIN_GPIO08 8 /* Service point SP2321 */
20#define U300_GPIO_PIN_GPIO09 9 /* Service point SP2322 */
21#define U300_GPIO_PIN_PHFSENSE 10 /* Headphone jack sensing */
22#define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */
23#define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */
24#define U300_GPIO_PIN_FLIPSENSE 13 /* Mechanical flip sensing */
25#define U300_GPIO_PIN_GPIO14 14 /* DSP JTAG Port RTCK */
26#define U300_GPIO_PIN_GPIO15 15 /* Unrouted */
27
28#define U300_GPIO_PIN_GPIO16 16 /* Unrouted */
29#define U300_GPIO_PIN_GPIO17 17 /* Unrouted */
30#define U300_GPIO_PIN_GPIO18 18 /* Unrouted */
31#define U300_GPIO_PIN_GPIO19 19 /* Unrouted */
32#define U300_GPIO_PIN_GPIO20 20 /* Unrouted */
33#define U300_GPIO_PIN_GPIO21 21 /* Unrouted */
34#define U300_GPIO_PIN_GPIO22 22 /* Unrouted */
35#define U300_GPIO_PIN_GPIO23 23 /* Unrouted */
36#endif
37
38/*
39 * Individual pin assignments for the B330/S330 and B365/S365.
40 * Notice that the actual usage of these pins depends on the
41 * PAD MUX settings, that is why the same number can potentially
42 * appear several times. In the reference design each pin is only
43 * used for one purpose. These were determined by inspecting the
44 * S365 schematic.
45 */
46#if defined(CONFIG_MACH_U300_BS330) || defined(CONFIG_MACH_U300_BS365) || \
47 defined(CONFIG_MACH_U300_BS335)
48#define U300_GPIO_PIN_UART_RX 0
49#define U300_GPIO_PIN_UART_TX 1
50#define U300_GPIO_PIN_UART_CTS 2
51#define U300_GPIO_PIN_UART_RTS 3
52#define U300_GPIO_PIN_CAM_MAIN_STANDBY 4 /* Camera MAIN standby */
53#define U300_GPIO_PIN_GPIO05 5 /* Unrouted */
54#define U300_GPIO_PIN_MS_CD 6 /* Memory Stick Card insertion */
55#define U300_GPIO_PIN_GPIO07 7 /* Test point TP2430 */
56
57#define U300_GPIO_PIN_GPIO08 8 /* Test point TP2437 */
58#define U300_GPIO_PIN_GPIO09 9 /* Test point TP2431 */
59#define U300_GPIO_PIN_GPIO10 10 /* Test point TP2432 */
60#define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */
61#define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */
62#define U300_GPIO_PIN_CAM_SUB_STANDBY 13 /* Camera SUB standby */
63#define U300_GPIO_PIN_GPIO14 14 /* Test point TP2436 */
64#define U300_GPIO_PIN_GPIO15 15 /* Unrouted */
65
66#define U300_GPIO_PIN_GPIO16 16 /* Test point TP2438 */
67#define U300_GPIO_PIN_PHFSENSE 17 /* Headphone jack sensing */
68#define U300_GPIO_PIN_GPIO18 18 /* Test point TP2439 */
69#define U300_GPIO_PIN_GPIO19 19 /* Routed somewhere */
70#define U300_GPIO_PIN_GPIO20 20 /* Unrouted */
71#define U300_GPIO_PIN_GPIO21 21 /* Unrouted */
72#define U300_GPIO_PIN_GPIO22 22 /* Unrouted */
73#define U300_GPIO_PIN_GPIO23 23 /* Unrouted */
74
75#define U300_GPIO_PIN_GPIO24 24 /* Unrouted */
76#define U300_GPIO_PIN_GPIO25 25 /* Unrouted */
77#define U300_GPIO_PIN_GPIO26 26 /* Unrouted */
78#define U300_GPIO_PIN_GPIO27 27 /* Unrouted */
79#define U300_GPIO_PIN_GPIO28 28 /* Unrouted */
80#define U300_GPIO_PIN_GPIO29 29 /* Unrouted */
81#define U300_GPIO_PIN_GPIO30 30 /* Unrouted */
82#define U300_GPIO_PIN_GPIO31 31 /* Unrouted */
83
84#define U300_GPIO_PIN_GPIO32 32 /* Unrouted */
85#define U300_GPIO_PIN_GPIO33 33 /* Unrouted */
86#define U300_GPIO_PIN_GPIO34 34 /* Unrouted */
87#define U300_GPIO_PIN_GPIO35 35 /* Unrouted */
88#define U300_GPIO_PIN_GPIO36 36 /* Unrouted */
89#define U300_GPIO_PIN_GPIO37 37 /* Unrouted */
90#define U300_GPIO_PIN_GPIO38 38 /* Unrouted */
91#define U300_GPIO_PIN_GPIO39 39 /* Unrouted */
92
93#ifdef CONFIG_MACH_U300_BS335
94
95#define U300_GPIO_PIN_GPIO40 40 /* Unrouted */
96#define U300_GPIO_PIN_GPIO41 41 /* Unrouted */
97#define U300_GPIO_PIN_GPIO42 42 /* Unrouted */
98#define U300_GPIO_PIN_GPIO43 43 /* Unrouted */
99#define U300_GPIO_PIN_GPIO44 44 /* Unrouted */
100#define U300_GPIO_PIN_GPIO45 45 /* Unrouted */
101#define U300_GPIO_PIN_GPIO46 46 /* Unrouted */
102#define U300_GPIO_PIN_GPIO47 47 /* Unrouted */
103
104#define U300_GPIO_PIN_GPIO48 48 /* Unrouted */
105#define U300_GPIO_PIN_GPIO49 49 /* Unrouted */
106#define U300_GPIO_PIN_GPIO50 50 /* Unrouted */
107#define U300_GPIO_PIN_GPIO51 51 /* Unrouted */
108#define U300_GPIO_PIN_GPIO52 52 /* Unrouted */
109#define U300_GPIO_PIN_GPIO53 53 /* Unrouted */
110#define U300_GPIO_PIN_GPIO54 54 /* Unrouted */
111#define U300_GPIO_PIN_GPIO55 55 /* Unrouted */
112#endif
113
114#endif
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index e3380137b05..573532f7553 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -176,15 +176,6 @@ config GPIO_SCH
176 The Intel Tunnel Creek processor has 5 GPIOs powered by the 176 The Intel Tunnel Creek processor has 5 GPIOs powered by the
177 core power rail and 9 from suspend power supply. 177 core power rail and 9 from suspend power supply.
178 178
179config GPIO_U300
180 bool "ST-Ericsson U300 COH 901 335/571 GPIO"
181 depends on GPIOLIB && ARCH_U300
182 help
183 Say yes here to support GPIO interface on ST-Ericsson U300.
184 The names of the two IP block variants supported are
185 COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
186 ports of 8 GPIO pins each.
187
188config GPIO_VX855 179config GPIO_VX855
189 tristate "VIA VX855/VX875 GPIO" 180 tristate "VIA VX855/VX875 GPIO"
190 depends on PCI 181 depends on PCI
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 8ef9e9abe97..62e641e79e8 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -54,7 +54,6 @@ obj-$(CONFIG_ARCH_DAVINCI_TNETV107X) += gpio-tnetv107x.o
54obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o 54obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o
55obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o 55obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o
56obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o 56obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o
57obj-$(CONFIG_MACH_U300) += gpio-u300.o
58obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o 57obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o
59obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o 58obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o
60obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o 59obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index e17e2f8001d..afaf8855812 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -12,7 +12,10 @@ menu "Pin controllers"
12 depends on PINCTRL 12 depends on PINCTRL
13 13
14config PINMUX 14config PINMUX
15 bool "Support pinmux controllers" 15 bool "Support pin multiplexing controllers"
16
17config PINCONF
18 bool "Support pin configuration controllers"
16 19
17config DEBUG_PINCTRL 20config DEBUG_PINCTRL
18 bool "Debug PINCTRL calls" 21 bool "Debug PINCTRL calls"
@@ -20,16 +23,25 @@ config DEBUG_PINCTRL
20 help 23 help
21 Say Y here to add some extra checks and diagnostics to PINCTRL calls. 24 Say Y here to add some extra checks and diagnostics to PINCTRL calls.
22 25
23config PINMUX_SIRF 26config PINCTRL_SIRF
24 bool "CSR SiRFprimaII pinmux driver" 27 bool "CSR SiRFprimaII pin controller driver"
25 depends on ARCH_PRIMA2 28 depends on ARCH_PRIMA2
26 select PINMUX 29 select PINMUX
27 30
28config PINMUX_U300 31config PINCTRL_U300
29 bool "U300 pinmux driver" 32 bool "U300 pin controller driver"
30 depends on ARCH_U300 33 depends on ARCH_U300
31 select PINMUX 34 select PINMUX
32 35
36config PINCTRL_COH901
37 bool "ST-Ericsson U300 COH 901 335/571 GPIO"
38 depends on GPIOLIB && ARCH_U300 && PINMUX_U300
39 help
40 Say yes here to support GPIO interface on ST-Ericsson U300.
41 The names of the two IP block variants supported are
42 COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
43 ports of 8 GPIO pins each.
44
33endmenu 45endmenu
34 46
35endif 47endif
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index bdc548a6b7e..827601cc68f 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -1,8 +1,10 @@
1# generic pinmux support 1# generic pinmux support
2 2
3ccflags-$(CONFIG_DEBUG_PINMUX) += -DDEBUG 3ccflags-$(CONFIG_DEBUG_PINCTRL) += -DDEBUG
4 4
5obj-$(CONFIG_PINCTRL) += core.o 5obj-$(CONFIG_PINCTRL) += core.o
6obj-$(CONFIG_PINMUX) += pinmux.o 6obj-$(CONFIG_PINMUX) += pinmux.o
7obj-$(CONFIG_PINMUX_SIRF) += pinmux-sirf.o 7obj-$(CONFIG_PINCONF) += pinconf.o
8obj-$(CONFIG_PINMUX_U300) += pinmux-u300.o 8obj-$(CONFIG_PINCTRL_SIRF) += pinctrl-sirf.o
9obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
10obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
index eadef9e191e..569bdb3ef10 100644
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -28,17 +28,12 @@
28#include <linux/pinctrl/machine.h> 28#include <linux/pinctrl/machine.h>
29#include "core.h" 29#include "core.h"
30#include "pinmux.h" 30#include "pinmux.h"
31#include "pinconf.h"
31 32
32/* Global list of pin control devices */ 33/* Global list of pin control devices */
33static DEFINE_MUTEX(pinctrldev_list_mutex); 34static DEFINE_MUTEX(pinctrldev_list_mutex);
34static LIST_HEAD(pinctrldev_list); 35static LIST_HEAD(pinctrldev_list);
35 36
36static void pinctrl_dev_release(struct device *dev)
37{
38 struct pinctrl_dev *pctldev = dev_get_drvdata(dev);
39 kfree(pctldev);
40}
41
42const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) 37const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
43{ 38{
44 /* We're not allowed to register devices without name */ 39 /* We're not allowed to register devices without name */
@@ -70,14 +65,14 @@ struct pinctrl_dev *get_pinctrl_dev_from_dev(struct device *dev,
70 65
71 mutex_lock(&pinctrldev_list_mutex); 66 mutex_lock(&pinctrldev_list_mutex);
72 list_for_each_entry(pctldev, &pinctrldev_list, node) { 67 list_for_each_entry(pctldev, &pinctrldev_list, node) {
73 if (dev && &pctldev->dev == dev) { 68 if (dev && pctldev->dev == dev) {
74 /* Matched on device pointer */ 69 /* Matched on device pointer */
75 found = true; 70 found = true;
76 break; 71 break;
77 } 72 }
78 73
79 if (devname && 74 if (devname &&
80 !strcmp(dev_name(&pctldev->dev), devname)) { 75 !strcmp(dev_name(pctldev->dev), devname)) {
81 /* Matched on device name */ 76 /* Matched on device name */
82 found = true; 77 found = true;
83 break; 78 break;
@@ -88,7 +83,7 @@ struct pinctrl_dev *get_pinctrl_dev_from_dev(struct device *dev,
88 return found ? pctldev : NULL; 83 return found ? pctldev : NULL;
89} 84}
90 85
91struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, int pin) 86struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, unsigned int pin)
92{ 87{
93 struct pin_desc *pindesc; 88 struct pin_desc *pindesc;
94 unsigned long flags; 89 unsigned long flags;
@@ -101,6 +96,31 @@ struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, int pin)
101} 96}
102 97
103/** 98/**
99 * pin_get_from_name() - look up a pin number from a name
100 * @pctldev: the pin control device to lookup the pin on
101 * @name: the name of the pin to look up
102 */
103int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
104{
105 unsigned i, pin;
106
107 /* The pin number can be retrived from the pin controller descriptor */
108 for (i = 0; i < pctldev->desc->npins; i++) {
109 struct pin_desc *desc;
110
111 pin = pctldev->desc->pins[i].number;
112 desc = pin_desc_get(pctldev, pin);
113 /* Pin space may be sparse */
114 if (desc == NULL)
115 continue;
116 if (desc->name && !strcmp(name, desc->name))
117 return pin;
118 }
119
120 return -EINVAL;
121}
122
123/**
104 * pin_is_valid() - check if pin exists on controller 124 * pin_is_valid() - check if pin exists on controller
105 * @pctldev: the pin control device to check the pin on 125 * @pctldev: the pin control device to check the pin on
106 * @pin: pin to check, use the local pin controller index number 126 * @pin: pin to check, use the local pin controller index number
@@ -139,6 +159,8 @@ static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
139 if (pindesc != NULL) { 159 if (pindesc != NULL) {
140 radix_tree_delete(&pctldev->pin_desc_tree, 160 radix_tree_delete(&pctldev->pin_desc_tree,
141 pins[i].number); 161 pins[i].number);
162 if (pindesc->dynamic_name)
163 kfree(pindesc->name);
142 } 164 }
143 kfree(pindesc); 165 kfree(pindesc);
144 } 166 }
@@ -160,19 +182,27 @@ static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
160 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); 182 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
161 if (pindesc == NULL) 183 if (pindesc == NULL)
162 return -ENOMEM; 184 return -ENOMEM;
185
163 spin_lock_init(&pindesc->lock); 186 spin_lock_init(&pindesc->lock);
164 187
165 /* Set owner */ 188 /* Set owner */
166 pindesc->pctldev = pctldev; 189 pindesc->pctldev = pctldev;
167 190
168 /* Copy basic pin info */ 191 /* Copy basic pin info */
169 pindesc->name = name; 192 if (pindesc->name) {
193 pindesc->name = name;
194 } else {
195 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
196 if (pindesc->name == NULL)
197 return -ENOMEM;
198 pindesc->dynamic_name = true;
199 }
170 200
171 spin_lock(&pctldev->pin_desc_tree_lock); 201 spin_lock(&pctldev->pin_desc_tree_lock);
172 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); 202 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
173 spin_unlock(&pctldev->pin_desc_tree_lock); 203 spin_unlock(&pctldev->pin_desc_tree_lock);
174 pr_debug("registered pin %d (%s) on %s\n", 204 pr_debug("registered pin %d (%s) on %s\n",
175 number, name ? name : "(unnamed)", pctldev->desc->name); 205 number, pindesc->name, pctldev->desc->name);
176 return 0; 206 return 0;
177} 207}
178 208
@@ -284,21 +314,52 @@ void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
284 mutex_unlock(&pctldev->gpio_ranges_lock); 314 mutex_unlock(&pctldev->gpio_ranges_lock);
285} 315}
286 316
317/**
318 * pinctrl_get_group_selector() - returns the group selector for a group
319 * @pctldev: the pin controller handling the group
320 * @pin_group: the pin group to look up
321 */
322int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
323 const char *pin_group)
324{
325 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
326 unsigned group_selector = 0;
327
328 while (pctlops->list_groups(pctldev, group_selector) >= 0) {
329 const char *gname = pctlops->get_group_name(pctldev,
330 group_selector);
331 if (!strcmp(gname, pin_group)) {
332 dev_dbg(pctldev->dev,
333 "found group selector %u for %s\n",
334 group_selector,
335 pin_group);
336 return group_selector;
337 }
338
339 group_selector++;
340 }
341
342 dev_err(pctldev->dev, "does not have pin group %s\n",
343 pin_group);
344
345 return -EINVAL;
346}
347
287#ifdef CONFIG_DEBUG_FS 348#ifdef CONFIG_DEBUG_FS
288 349
289static int pinctrl_pins_show(struct seq_file *s, void *what) 350static int pinctrl_pins_show(struct seq_file *s, void *what)
290{ 351{
291 struct pinctrl_dev *pctldev = s->private; 352 struct pinctrl_dev *pctldev = s->private;
292 const struct pinctrl_ops *ops = pctldev->desc->pctlops; 353 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
293 unsigned pin; 354 unsigned i, pin;
294 355
295 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); 356 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
296 seq_printf(s, "max pin number: %d\n", pctldev->desc->maxpin);
297 357
298 /* The highest pin number need to be included in the loop, thus <= */ 358 /* The pin number can be retrived from the pin controller descriptor */
299 for (pin = 0; pin <= pctldev->desc->maxpin; pin++) { 359 for (i = 0; i < pctldev->desc->npins; i++) {
300 struct pin_desc *desc; 360 struct pin_desc *desc;
301 361
362 pin = pctldev->desc->pins[i].number;
302 desc = pin_desc_get(pctldev, pin); 363 desc = pin_desc_get(pctldev, pin);
303 /* Pin space may be sparse */ 364 /* Pin space may be sparse */
304 if (desc == NULL) 365 if (desc == NULL)
@@ -363,8 +424,11 @@ static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
363 /* Loop over the ranges */ 424 /* Loop over the ranges */
364 mutex_lock(&pctldev->gpio_ranges_lock); 425 mutex_lock(&pctldev->gpio_ranges_lock);
365 list_for_each_entry(range, &pctldev->gpio_ranges, node) { 426 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
366 seq_printf(s, "%u: %s [%u - %u]\n", range->id, range->name, 427 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
367 range->base, (range->base + range->npins - 1)); 428 range->id, range->name,
429 range->base, (range->base + range->npins - 1),
430 range->pin_base,
431 (range->pin_base + range->npins - 1));
368 } 432 }
369 mutex_unlock(&pctldev->gpio_ranges_lock); 433 mutex_unlock(&pctldev->gpio_ranges_lock);
370 434
@@ -375,11 +439,15 @@ static int pinctrl_devices_show(struct seq_file *s, void *what)
375{ 439{
376 struct pinctrl_dev *pctldev; 440 struct pinctrl_dev *pctldev;
377 441
378 seq_puts(s, "name [pinmux]\n"); 442 seq_puts(s, "name [pinmux] [pinconf]\n");
379 mutex_lock(&pinctrldev_list_mutex); 443 mutex_lock(&pinctrldev_list_mutex);
380 list_for_each_entry(pctldev, &pinctrldev_list, node) { 444 list_for_each_entry(pctldev, &pinctrldev_list, node) {
381 seq_printf(s, "%s ", pctldev->desc->name); 445 seq_printf(s, "%s ", pctldev->desc->name);
382 if (pctldev->desc->pmxops) 446 if (pctldev->desc->pmxops)
447 seq_puts(s, "yes ");
448 else
449 seq_puts(s, "no ");
450 if (pctldev->desc->confops)
383 seq_puts(s, "yes"); 451 seq_puts(s, "yes");
384 else 452 else
385 seq_puts(s, "no"); 453 seq_puts(s, "no");
@@ -444,11 +512,11 @@ static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
444{ 512{
445 static struct dentry *device_root; 513 static struct dentry *device_root;
446 514
447 device_root = debugfs_create_dir(dev_name(&pctldev->dev), 515 device_root = debugfs_create_dir(dev_name(pctldev->dev),
448 debugfs_root); 516 debugfs_root);
449 if (IS_ERR(device_root) || !device_root) { 517 if (IS_ERR(device_root) || !device_root) {
450 pr_warn("failed to create debugfs directory for %s\n", 518 pr_warn("failed to create debugfs directory for %s\n",
451 dev_name(&pctldev->dev)); 519 dev_name(pctldev->dev));
452 return; 520 return;
453 } 521 }
454 debugfs_create_file("pins", S_IFREG | S_IRUGO, 522 debugfs_create_file("pins", S_IFREG | S_IRUGO,
@@ -458,6 +526,7 @@ static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
458 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, 526 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
459 device_root, pctldev, &pinctrl_gpioranges_ops); 527 device_root, pctldev, &pinctrl_gpioranges_ops);
460 pinmux_init_device_debugfs(device_root, pctldev); 528 pinmux_init_device_debugfs(device_root, pctldev);
529 pinconf_init_device_debugfs(device_root, pctldev);
461} 530}
462 531
463static void pinctrl_init_debugfs(void) 532static void pinctrl_init_debugfs(void)
@@ -495,7 +564,6 @@ static void pinctrl_init_debugfs(void)
495struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, 564struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
496 struct device *dev, void *driver_data) 565 struct device *dev, void *driver_data)
497{ 566{
498 static atomic_t pinmux_no = ATOMIC_INIT(0);
499 struct pinctrl_dev *pctldev; 567 struct pinctrl_dev *pctldev;
500 int ret; 568 int ret;
501 569
@@ -514,6 +582,16 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
514 } 582 }
515 } 583 }
516 584
585 /* If we're implementing pinconfig, check the ops for sanity */
586 if (pctldesc->confops) {
587 ret = pinconf_check_ops(pctldesc->confops);
588 if (ret) {
589 pr_err("%s pin config ops lacks necessary functions\n",
590 pctldesc->name);
591 return NULL;
592 }
593 }
594
517 pctldev = kzalloc(sizeof(struct pinctrl_dev), GFP_KERNEL); 595 pctldev = kzalloc(sizeof(struct pinctrl_dev), GFP_KERNEL);
518 if (pctldev == NULL) 596 if (pctldev == NULL)
519 return NULL; 597 return NULL;
@@ -526,18 +604,7 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
526 spin_lock_init(&pctldev->pin_desc_tree_lock); 604 spin_lock_init(&pctldev->pin_desc_tree_lock);
527 INIT_LIST_HEAD(&pctldev->gpio_ranges); 605 INIT_LIST_HEAD(&pctldev->gpio_ranges);
528 mutex_init(&pctldev->gpio_ranges_lock); 606 mutex_init(&pctldev->gpio_ranges_lock);
529 607 pctldev->dev = dev;
530 /* Register device */
531 pctldev->dev.parent = dev;
532 dev_set_name(&pctldev->dev, "pinctrl.%d",
533 atomic_inc_return(&pinmux_no) - 1);
534 pctldev->dev.release = pinctrl_dev_release;
535 ret = device_register(&pctldev->dev);
536 if (ret != 0) {
537 pr_err("error in device registration\n");
538 goto out_reg_dev_err;
539 }
540 dev_set_drvdata(&pctldev->dev, pctldev);
541 608
542 /* Register all the pins */ 609 /* Register all the pins */
543 pr_debug("try to register %d pins on %s...\n", 610 pr_debug("try to register %d pins on %s...\n",
@@ -547,7 +614,7 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
547 pr_err("error during pin registration\n"); 614 pr_err("error during pin registration\n");
548 pinctrl_free_pindescs(pctldev, pctldesc->pins, 615 pinctrl_free_pindescs(pctldev, pctldesc->pins,
549 pctldesc->npins); 616 pctldesc->npins);
550 goto out_reg_pins_err; 617 goto out_err;
551 } 618 }
552 619
553 pinctrl_init_device_debugfs(pctldev); 620 pinctrl_init_device_debugfs(pctldev);
@@ -557,10 +624,8 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
557 pinmux_hog_maps(pctldev); 624 pinmux_hog_maps(pctldev);
558 return pctldev; 625 return pctldev;
559 626
560out_reg_pins_err: 627out_err:
561 device_del(&pctldev->dev); 628 kfree(pctldev);
562out_reg_dev_err:
563 put_device(&pctldev->dev);
564 return NULL; 629 return NULL;
565} 630}
566EXPORT_SYMBOL_GPL(pinctrl_register); 631EXPORT_SYMBOL_GPL(pinctrl_register);
@@ -584,7 +649,7 @@ void pinctrl_unregister(struct pinctrl_dev *pctldev)
584 /* Destroy descriptor tree */ 649 /* Destroy descriptor tree */
585 pinctrl_free_pindescs(pctldev, pctldev->desc->pins, 650 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
586 pctldev->desc->npins); 651 pctldev->desc->npins);
587 device_unregister(&pctldev->dev); 652 kfree(pctldev);
588} 653}
589EXPORT_SYMBOL_GPL(pinctrl_unregister); 654EXPORT_SYMBOL_GPL(pinctrl_unregister);
590 655
diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h
index 472fa1341cc..177a3310547 100644
--- a/drivers/pinctrl/core.h
+++ b/drivers/pinctrl/core.h
@@ -9,6 +9,10 @@
9 * License terms: GNU General Public License (GPL) version 2 9 * License terms: GNU General Public License (GPL) version 2
10 */ 10 */
11 11
12#include <linux/pinctrl/pinconf.h>
13
14struct pinctrl_gpio_range;
15
12/** 16/**
13 * struct pinctrl_dev - pin control class device 17 * struct pinctrl_dev - pin control class device
14 * @node: node to include this pin controller in the global pin controller list 18 * @node: node to include this pin controller in the global pin controller list
@@ -34,7 +38,7 @@ struct pinctrl_dev {
34 spinlock_t pin_desc_tree_lock; 38 spinlock_t pin_desc_tree_lock;
35 struct list_head gpio_ranges; 39 struct list_head gpio_ranges;
36 struct mutex gpio_ranges_lock; 40 struct mutex gpio_ranges_lock;
37 struct device dev; 41 struct device *dev;
38 struct module *owner; 42 struct module *owner;
39 void *driver_data; 43 void *driver_data;
40#ifdef CONFIG_PINMUX 44#ifdef CONFIG_PINMUX
@@ -48,6 +52,7 @@ struct pinctrl_dev {
48 * @pctldev: corresponding pin control device 52 * @pctldev: corresponding pin control device
49 * @name: a name for the pin, e.g. the name of the pin/pad/finger on a 53 * @name: a name for the pin, e.g. the name of the pin/pad/finger on a
50 * datasheet or such 54 * datasheet or such
55 * @dynamic_name: if the name of this pin was dynamically allocated
51 * @lock: a lock to protect the descriptor structure 56 * @lock: a lock to protect the descriptor structure
52 * @mux_requested: whether the pin is already requested by pinmux or not 57 * @mux_requested: whether the pin is already requested by pinmux or not
53 * @mux_function: a named muxing function for the pin that will be passed to 58 * @mux_function: a named muxing function for the pin that will be passed to
@@ -56,6 +61,7 @@ struct pinctrl_dev {
56struct pin_desc { 61struct pin_desc {
57 struct pinctrl_dev *pctldev; 62 struct pinctrl_dev *pctldev;
58 const char *name; 63 const char *name;
64 bool dynamic_name;
59 spinlock_t lock; 65 spinlock_t lock;
60 /* These fields only added when supporting pinmux drivers */ 66 /* These fields only added when supporting pinmux drivers */
61#ifdef CONFIG_PINMUX 67#ifdef CONFIG_PINMUX
@@ -65,7 +71,10 @@ struct pin_desc {
65 71
66struct pinctrl_dev *get_pinctrl_dev_from_dev(struct device *dev, 72struct pinctrl_dev *get_pinctrl_dev_from_dev(struct device *dev,
67 const char *dev_name); 73 const char *dev_name);
68struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, int pin); 74struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, unsigned int pin);
75int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);
69int pinctrl_get_device_gpio_range(unsigned gpio, 76int pinctrl_get_device_gpio_range(unsigned gpio,
70 struct pinctrl_dev **outdev, 77 struct pinctrl_dev **outdev,
71 struct pinctrl_gpio_range **outrange); 78 struct pinctrl_gpio_range **outrange);
79int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
80 const char *pin_group);
diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c
new file mode 100644
index 00000000000..1259872b0a1
--- /dev/null
+++ b/drivers/pinctrl/pinconf.c
@@ -0,0 +1,326 @@
1/*
2 * Core driver for the pin config portions of the pin control subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 *
7 * Author: Linus Walleij <linus.walleij@linaro.org>
8 *
9 * License terms: GNU General Public License (GPL) version 2
10 */
11#define pr_fmt(fmt) "pinconfig core: " fmt
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/slab.h>
18#include <linux/debugfs.h>
19#include <linux/seq_file.h>
20#include <linux/pinctrl/machine.h>
21#include <linux/pinctrl/pinctrl.h>
22#include <linux/pinctrl/pinconf.h>
23#include "core.h"
24#include "pinconf.h"
25
26int pin_config_get_for_pin(struct pinctrl_dev *pctldev, unsigned pin,
27 unsigned long *config)
28{
29 const struct pinconf_ops *ops = pctldev->desc->confops;
30
31 if (!ops || !ops->pin_config_get) {
32 dev_err(pctldev->dev, "cannot get pin configuration, missing "
33 "pin_config_get() function in driver\n");
34 return -EINVAL;
35 }
36
37 return ops->pin_config_get(pctldev, pin, config);
38}
39
40/**
41 * pin_config_get() - get the configuration of a single pin parameter
42 * @dev_name: name of the pin controller device for this pin
43 * @name: name of the pin to get the config for
44 * @config: the config pointed to by this argument will be filled in with the
45 * current pin state, it can be used directly by drivers as a numeral, or
46 * it can be dereferenced to any struct.
47 */
48int pin_config_get(const char *dev_name, const char *name,
49 unsigned long *config)
50{
51 struct pinctrl_dev *pctldev;
52 int pin;
53
54 pctldev = get_pinctrl_dev_from_dev(NULL, dev_name);
55 if (!pctldev)
56 return -EINVAL;
57
58 pin = pin_get_from_name(pctldev, name);
59 if (pin < 0)
60 return pin;
61
62 return pin_config_get_for_pin(pctldev, pin, config);
63}
64EXPORT_SYMBOL(pin_config_get);
65
66int pin_config_set_for_pin(struct pinctrl_dev *pctldev, unsigned pin,
67 unsigned long config)
68{
69 const struct pinconf_ops *ops = pctldev->desc->confops;
70 int ret;
71
72 if (!ops || !ops->pin_config_set) {
73 dev_err(pctldev->dev, "cannot configure pin, missing "
74 "config function in driver\n");
75 return -EINVAL;
76 }
77
78 ret = ops->pin_config_set(pctldev, pin, config);
79 if (ret) {
80 dev_err(pctldev->dev,
81 "unable to set pin configuration on pin %d\n", pin);
82 return ret;
83 }
84
85 return 0;
86}
87
88/**
89 * pin_config_set() - set the configuration of a single pin parameter
90 * @dev_name: name of pin controller device for this pin
91 * @name: name of the pin to set the config for
92 * @config: the config in this argument will contain the desired pin state, it
93 * can be used directly by drivers as a numeral, or it can be dereferenced
94 * to any struct.
95 */
96int pin_config_set(const char *dev_name, const char *name,
97 unsigned long config)
98{
99 struct pinctrl_dev *pctldev;
100 int pin;
101
102 pctldev = get_pinctrl_dev_from_dev(NULL, dev_name);
103 if (!pctldev)
104 return -EINVAL;
105
106 pin = pin_get_from_name(pctldev, name);
107 if (pin < 0)
108 return pin;
109
110 return pin_config_set_for_pin(pctldev, pin, config);
111}
112EXPORT_SYMBOL(pin_config_set);
113
114int pin_config_group_get(const char *dev_name, const char *pin_group,
115 unsigned long *config)
116{
117 struct pinctrl_dev *pctldev;
118 const struct pinconf_ops *ops;
119 int selector;
120
121 pctldev = get_pinctrl_dev_from_dev(NULL, dev_name);
122 if (!pctldev)
123 return -EINVAL;
124 ops = pctldev->desc->confops;
125
126 if (!ops || !ops->pin_config_group_get) {
127 dev_err(pctldev->dev, "cannot get configuration for pin "
128 "group, missing group config get function in "
129 "driver\n");
130 return -EINVAL;
131 }
132
133 selector = pinctrl_get_group_selector(pctldev, pin_group);
134 if (selector < 0)
135 return selector;
136
137 return ops->pin_config_group_get(pctldev, selector, config);
138}
139EXPORT_SYMBOL(pin_config_group_get);
140
141
142int pin_config_group_set(const char *dev_name, const char *pin_group,
143 unsigned long config)
144{
145 struct pinctrl_dev *pctldev;
146 const struct pinconf_ops *ops;
147 const struct pinctrl_ops *pctlops;
148 int selector;
149 const unsigned *pins;
150 unsigned num_pins;
151 int ret;
152 int i;
153
154 pctldev = get_pinctrl_dev_from_dev(NULL, dev_name);
155 if (!pctldev)
156 return -EINVAL;
157 ops = pctldev->desc->confops;
158 pctlops = pctldev->desc->pctlops;
159
160 if (!ops || (!ops->pin_config_group_set && !ops->pin_config_set)) {
161 dev_err(pctldev->dev, "cannot configure pin group, missing "
162 "config function in driver\n");
163 return -EINVAL;
164 }
165
166 selector = pinctrl_get_group_selector(pctldev, pin_group);
167 if (selector < 0)
168 return selector;
169
170 ret = pctlops->get_group_pins(pctldev, selector, &pins, &num_pins);
171 if (ret) {
172 dev_err(pctldev->dev, "cannot configure pin group, error "
173 "getting pins\n");
174 return ret;
175 }
176
177 /*
178 * If the pin controller supports handling entire groups we use that
179 * capability.
180 */
181 if (ops->pin_config_group_set) {
182 ret = ops->pin_config_group_set(pctldev, selector, config);
183 /*
184 * If the pin controller prefer that a certain group be handled
185 * pin-by-pin as well, it returns -EAGAIN.
186 */
187 if (ret != -EAGAIN)
188 return ret;
189 }
190
191 /*
192 * If the controller cannot handle entire groups, we configure each pin
193 * individually.
194 */
195 if (!ops->pin_config_set)
196 return 0;
197
198 for (i = 0; i < num_pins; i++) {
199 ret = ops->pin_config_set(pctldev, pins[i], config);
200 if (ret < 0)
201 return ret;
202 }
203
204 return 0;
205}
206EXPORT_SYMBOL(pin_config_group_set);
207
208int pinconf_check_ops(const struct pinconf_ops *ops)
209{
210 /* We must be able to read out pin status */
211 if (!ops->pin_config_get && !ops->pin_config_group_get)
212 return -EINVAL;
213 /* We have to be able to config the pins in SOME way */
214 if (!ops->pin_config_set && !ops->pin_config_group_set)
215 return -EINVAL;
216 return 0;
217}
218
219#ifdef CONFIG_DEBUG_FS
220
221static void pinconf_dump_pin(struct pinctrl_dev *pctldev,
222 struct seq_file *s, int pin)
223{
224 const struct pinconf_ops *ops = pctldev->desc->confops;
225
226 if (ops && ops->pin_config_dbg_show)
227 ops->pin_config_dbg_show(pctldev, s, pin);
228}
229
230static int pinconf_pins_show(struct seq_file *s, void *what)
231{
232 struct pinctrl_dev *pctldev = s->private;
233 unsigned i, pin;
234
235 seq_puts(s, "Pin config settings per pin\n");
236 seq_puts(s, "Format: pin (name): pinmux setting array\n");
237
238 /* The pin number can be retrived from the pin controller descriptor */
239 for (i = 0; pin < pctldev->desc->npins; i++) {
240 struct pin_desc *desc;
241
242 pin = pctldev->desc->pins[i].number;
243 desc = pin_desc_get(pctldev, pin);
244 /* Skip if we cannot search the pin */
245 if (desc == NULL)
246 continue;
247
248 seq_printf(s, "pin %d (%s):", pin,
249 desc->name ? desc->name : "unnamed");
250
251 pinconf_dump_pin(pctldev, s, pin);
252
253 seq_printf(s, "\n");
254 }
255
256 return 0;
257}
258
259static void pinconf_dump_group(struct pinctrl_dev *pctldev,
260 struct seq_file *s, unsigned selector,
261 const char *gname)
262{
263 const struct pinconf_ops *ops = pctldev->desc->confops;
264
265 if (ops && ops->pin_config_group_dbg_show)
266 ops->pin_config_group_dbg_show(pctldev, s, selector);
267}
268
269static int pinconf_groups_show(struct seq_file *s, void *what)
270{
271 struct pinctrl_dev *pctldev = s->private;
272 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
273 const struct pinconf_ops *ops = pctldev->desc->confops;
274 unsigned selector = 0;
275
276 if (!ops || !ops->pin_config_group_get)
277 return 0;
278
279 seq_puts(s, "Pin config settings per pin group\n");
280 seq_puts(s, "Format: group (name): pinmux setting array\n");
281
282 while (pctlops->list_groups(pctldev, selector) >= 0) {
283 const char *gname = pctlops->get_group_name(pctldev, selector);
284
285 seq_printf(s, "%u (%s):", selector, gname);
286 pinconf_dump_group(pctldev, s, selector, gname);
287 selector++;
288 }
289
290 return 0;
291}
292
293static int pinconf_pins_open(struct inode *inode, struct file *file)
294{
295 return single_open(file, pinconf_pins_show, inode->i_private);
296}
297
298static int pinconf_groups_open(struct inode *inode, struct file *file)
299{
300 return single_open(file, pinconf_groups_show, inode->i_private);
301}
302
303static const struct file_operations pinconf_pins_ops = {
304 .open = pinconf_pins_open,
305 .read = seq_read,
306 .llseek = seq_lseek,
307 .release = single_release,
308};
309
310static const struct file_operations pinconf_groups_ops = {
311 .open = pinconf_groups_open,
312 .read = seq_read,
313 .llseek = seq_lseek,
314 .release = single_release,
315};
316
317void pinconf_init_device_debugfs(struct dentry *devroot,
318 struct pinctrl_dev *pctldev)
319{
320 debugfs_create_file("pinconf-pins", S_IFREG | S_IRUGO,
321 devroot, pctldev, &pinconf_pins_ops);
322 debugfs_create_file("pinconf-groups", S_IFREG | S_IRUGO,
323 devroot, pctldev, &pinconf_groups_ops);
324}
325
326#endif
diff --git a/drivers/pinctrl/pinconf.h b/drivers/pinctrl/pinconf.h
new file mode 100644
index 00000000000..e7dc6165032
--- /dev/null
+++ b/drivers/pinctrl/pinconf.h
@@ -0,0 +1,36 @@
1/*
2 * Internal interface between the core pin control system and the
3 * pin config portions
4 *
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
8 *
9 * Author: Linus Walleij <linus.walleij@linaro.org>
10 *
11 * License terms: GNU General Public License (GPL) version 2
12 */
13
14#ifdef CONFIG_PINCONF
15
16int pinconf_check_ops(const struct pinconf_ops *ops);
17void pinconf_init_device_debugfs(struct dentry *devroot,
18 struct pinctrl_dev *pctldev);
19int pin_config_get_for_pin(struct pinctrl_dev *pctldev, unsigned pin,
20 unsigned long *config);
21int pin_config_set_for_pin(struct pinctrl_dev *pctldev, unsigned pin,
22 unsigned long config);
23
24#else
25
26static inline int pinconf_check_ops(const struct pinconf_ops *ops)
27{
28 return 0;
29}
30
31static inline void pinconf_init_device_debugfs(struct dentry *devroot,
32 struct pinctrl_dev *pctldev)
33{
34}
35
36#endif
diff --git a/drivers/gpio/gpio-u300.c b/drivers/pinctrl/pinctrl-coh901.c
index 4035778852b..69fb7072a23 100644
--- a/drivers/gpio/gpio-u300.c
+++ b/drivers/pinctrl/pinctrl-coh901.c
@@ -22,6 +22,7 @@
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/list.h> 23#include <linux/list.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/pinctrl/pinmux.h>
25#include <mach/gpio-u300.h> 26#include <mach/gpio-u300.h>
26 27
27/* 28/*
@@ -351,6 +352,24 @@ static inline struct u300_gpio *to_u300_gpio(struct gpio_chip *chip)
351 return container_of(chip, struct u300_gpio, chip); 352 return container_of(chip, struct u300_gpio, chip);
352} 353}
353 354
355static int u300_gpio_request(struct gpio_chip *chip, unsigned offset)
356{
357 /*
358 * Map back to global GPIO space and request muxing, the direction
359 * parameter does not matter for this controller.
360 */
361 int gpio = chip->base + offset;
362
363 return pinmux_request_gpio(gpio);
364}
365
366static void u300_gpio_free(struct gpio_chip *chip, unsigned offset)
367{
368 int gpio = chip->base + offset;
369
370 pinmux_free_gpio(gpio);
371}
372
354static int u300_gpio_get(struct gpio_chip *chip, unsigned offset) 373static int u300_gpio_get(struct gpio_chip *chip, unsigned offset)
355{ 374{
356 struct u300_gpio *gpio = to_u300_gpio(chip); 375 struct u300_gpio *gpio = to_u300_gpio(chip);
@@ -483,6 +502,8 @@ static int u300_gpio_config(struct gpio_chip *chip, unsigned offset,
483static struct gpio_chip u300_gpio_chip = { 502static struct gpio_chip u300_gpio_chip = {
484 .label = "u300-gpio-chip", 503 .label = "u300-gpio-chip",
485 .owner = THIS_MODULE, 504 .owner = THIS_MODULE,
505 .request = u300_gpio_request,
506 .free = u300_gpio_free,
486 .get = u300_gpio_get, 507 .get = u300_gpio_get,
487 .set = u300_gpio_set, 508 .set = u300_gpio_set,
488 .direction_input = u300_gpio_direction_input, 509 .direction_input = u300_gpio_direction_input,
diff --git a/drivers/pinctrl/pinmux-sirf.c b/drivers/pinctrl/pinctrl-sirf.c
index d76cae62095..6b3534cc051 100644
--- a/drivers/pinctrl/pinmux-sirf.c
+++ b/drivers/pinctrl/pinctrl-sirf.c
@@ -463,7 +463,7 @@ static const struct sirfsoc_padmux spi1_padmux = {
463 .funcval = BIT(8), 463 .funcval = BIT(8),
464}; 464};
465 465
466static const unsigned spi1_pins[] = { 33, 34, 35, 36 }; 466static const unsigned spi1_pins[] = { 43, 44, 45, 46 };
467 467
468static const struct sirfsoc_muxmask sdmmc1_muxmask[] = { 468static const struct sirfsoc_muxmask sdmmc1_muxmask[] = {
469 { 469 {
@@ -1067,7 +1067,7 @@ static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev,
1067 spmx = pinctrl_dev_get_drvdata(pmxdev); 1067 spmx = pinctrl_dev_get_drvdata(pmxdev);
1068 1068
1069 muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); 1069 muxval = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group));
1070 muxval = muxval | (1 << offset); 1070 muxval = muxval | (1 << (offset - range->pin_base));
1071 writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group)); 1071 writel(muxval, spmx->gpio_virtbase + SIRFSOC_GPIO_PAD_EN(group));
1072 1072
1073 return 0; 1073 return 0;
@@ -1086,7 +1086,6 @@ static struct pinctrl_desc sirfsoc_pinmux_desc = {
1086 .name = DRIVER_NAME, 1086 .name = DRIVER_NAME,
1087 .pins = sirfsoc_pads, 1087 .pins = sirfsoc_pads,
1088 .npins = ARRAY_SIZE(sirfsoc_pads), 1088 .npins = ARRAY_SIZE(sirfsoc_pads),
1089 .maxpin = SIRFSOC_NUM_PADS - 1,
1090 .pctlops = &sirfsoc_pctrl_ops, 1089 .pctlops = &sirfsoc_pctrl_ops,
1091 .pmxops = &sirfsoc_pinmux_ops, 1090 .pmxops = &sirfsoc_pinmux_ops,
1092 .owner = THIS_MODULE, 1091 .owner = THIS_MODULE,
@@ -1100,21 +1099,25 @@ static struct pinctrl_gpio_range sirfsoc_gpio_ranges[] = {
1100 .name = "sirfsoc-gpio*", 1099 .name = "sirfsoc-gpio*",
1101 .id = 0, 1100 .id = 0,
1102 .base = 0, 1101 .base = 0,
1102 .pin_base = 0,
1103 .npins = 32, 1103 .npins = 32,
1104 }, { 1104 }, {
1105 .name = "sirfsoc-gpio*", 1105 .name = "sirfsoc-gpio*",
1106 .id = 1, 1106 .id = 1,
1107 .base = 32, 1107 .base = 32,
1108 .pin_base = 32,
1108 .npins = 32, 1109 .npins = 32,
1109 }, { 1110 }, {
1110 .name = "sirfsoc-gpio*", 1111 .name = "sirfsoc-gpio*",
1111 .id = 2, 1112 .id = 2,
1112 .base = 64, 1113 .base = 64,
1114 .pin_base = 64,
1113 .npins = 32, 1115 .npins = 32,
1114 }, { 1116 }, {
1115 .name = "sirfsoc-gpio*", 1117 .name = "sirfsoc-gpio*",
1116 .id = 3, 1118 .id = 3,
1117 .base = 96, 1119 .base = 96,
1120 .pin_base = 96,
1118 .npins = 19, 1121 .npins = 19,
1119 }, 1122 },
1120}; 1123};
diff --git a/drivers/pinctrl/pinmux-u300.c b/drivers/pinctrl/pinctrl-u300.c
index 4858a64131f..c8d02f1c2b5 100644
--- a/drivers/pinctrl/pinmux-u300.c
+++ b/drivers/pinctrl/pinctrl-u300.c
@@ -940,20 +940,23 @@ static void u300_pmx_endisable(struct u300_pmx *upmx, unsigned selector,
940{ 940{
941 u16 regval, val, mask; 941 u16 regval, val, mask;
942 int i; 942 int i;
943 const struct u300_pmx_mask *upmx_mask;
943 944
945 upmx_mask = u300_pmx_functions[selector].mask;
944 for (i = 0; i < ARRAY_SIZE(u300_pmx_registers); i++) { 946 for (i = 0; i < ARRAY_SIZE(u300_pmx_registers); i++) {
945 if (enable) 947 if (enable)
946 val = u300_pmx_functions[selector].mask->bits; 948 val = upmx_mask->bits;
947 else 949 else
948 val = 0; 950 val = 0;
949 951
950 mask = u300_pmx_functions[selector].mask->mask; 952 mask = upmx_mask->mask;
951 if (mask != 0) { 953 if (mask != 0) {
952 regval = readw(upmx->virtbase + u300_pmx_registers[i]); 954 regval = readw(upmx->virtbase + u300_pmx_registers[i]);
953 regval &= ~mask; 955 regval &= ~mask;
954 regval |= val; 956 regval |= val;
955 writew(regval, upmx->virtbase + u300_pmx_registers[i]); 957 writew(regval, upmx->virtbase + u300_pmx_registers[i]);
956 } 958 }
959 upmx_mask++;
957 } 960 }
958} 961}
959 962
@@ -1016,21 +1019,35 @@ static struct pinmux_ops u300_pmx_ops = {
1016}; 1019};
1017 1020
1018/* 1021/*
1019 * FIXME: this will be set to sane values as this driver engulfs 1022 * GPIO ranges handled by the application-side COH901XXX GPIO controller
1020 * drivers/gpio/gpio-u300.c and we really know this stuff. 1023 * Very many pins can be converted into GPIO pins, but we only list those
1024 * that are useful in practice to cut down on tables.
1021 */ 1025 */
1022static struct pinctrl_gpio_range u300_gpio_range = { 1026#define U300_GPIO_RANGE(a, b, c) { .name = "COH901XXX", .id = a, .base= a, \
1023 .name = "COH901*", 1027 .pin_base = b, .npins = c }
1024 .id = 0, 1028
1025 .base = 0, 1029static struct pinctrl_gpio_range u300_gpio_ranges[] = {
1026 .npins = 64, 1030 U300_GPIO_RANGE(10, 426, 1),
1031 U300_GPIO_RANGE(11, 180, 1),
1032 U300_GPIO_RANGE(12, 165, 1), /* MS/MMC card insertion */
1033 U300_GPIO_RANGE(13, 179, 1),
1034 U300_GPIO_RANGE(14, 178, 1),
1035 U300_GPIO_RANGE(16, 194, 1),
1036 U300_GPIO_RANGE(17, 193, 1),
1037 U300_GPIO_RANGE(18, 192, 1),
1038 U300_GPIO_RANGE(19, 191, 1),
1039 U300_GPIO_RANGE(20, 186, 1),
1040 U300_GPIO_RANGE(21, 185, 1),
1041 U300_GPIO_RANGE(22, 184, 1),
1042 U300_GPIO_RANGE(23, 183, 1),
1043 U300_GPIO_RANGE(24, 182, 1),
1044 U300_GPIO_RANGE(25, 181, 1),
1027}; 1045};
1028 1046
1029static struct pinctrl_desc u300_pmx_desc = { 1047static struct pinctrl_desc u300_pmx_desc = {
1030 .name = DRIVER_NAME, 1048 .name = DRIVER_NAME,
1031 .pins = u300_pads, 1049 .pins = u300_pads,
1032 .npins = ARRAY_SIZE(u300_pads), 1050 .npins = ARRAY_SIZE(u300_pads),
1033 .maxpin = U300_NUM_PADS-1,
1034 .pctlops = &u300_pctrl_ops, 1051 .pctlops = &u300_pctrl_ops,
1035 .pmxops = &u300_pmx_ops, 1052 .pmxops = &u300_pmx_ops,
1036 .owner = THIS_MODULE, 1053 .owner = THIS_MODULE,
@@ -1038,9 +1055,10 @@ static struct pinctrl_desc u300_pmx_desc = {
1038 1055
1039static int __init u300_pmx_probe(struct platform_device *pdev) 1056static int __init u300_pmx_probe(struct platform_device *pdev)
1040{ 1057{
1041 int ret;
1042 struct u300_pmx *upmx; 1058 struct u300_pmx *upmx;
1043 struct resource *res; 1059 struct resource *res;
1060 int ret;
1061 int i;
1044 1062
1045 /* Create state holders etc for this driver */ 1063 /* Create state holders etc for this driver */
1046 upmx = devm_kzalloc(&pdev->dev, sizeof(*upmx), GFP_KERNEL); 1064 upmx = devm_kzalloc(&pdev->dev, sizeof(*upmx), GFP_KERNEL);
@@ -1077,7 +1095,8 @@ static int __init u300_pmx_probe(struct platform_device *pdev)
1077 } 1095 }
1078 1096
1079 /* We will handle a range of GPIO pins */ 1097 /* We will handle a range of GPIO pins */
1080 pinctrl_add_gpio_range(upmx->pctl, &u300_gpio_range); 1098 for (i = 0; i < ARRAY_SIZE(u300_gpio_ranges); i++)
1099 pinctrl_add_gpio_range(upmx->pctl, &u300_gpio_ranges[i]);
1081 1100
1082 platform_set_drvdata(pdev, upmx); 1101 platform_set_drvdata(pdev, upmx);
1083 1102
@@ -1099,8 +1118,10 @@ out_no_resource:
1099static int __exit u300_pmx_remove(struct platform_device *pdev) 1118static int __exit u300_pmx_remove(struct platform_device *pdev)
1100{ 1119{
1101 struct u300_pmx *upmx = platform_get_drvdata(pdev); 1120 struct u300_pmx *upmx = platform_get_drvdata(pdev);
1121 int i;
1102 1122
1103 pinctrl_remove_gpio_range(upmx->pctl, &u300_gpio_range); 1123 for (i = 0; i < ARRAY_SIZE(u300_gpio_ranges); i++)
1124 pinctrl_remove_gpio_range(upmx->pctl, &u300_gpio_ranges[i]);
1104 pinctrl_unregister(upmx->pctl); 1125 pinctrl_unregister(upmx->pctl);
1105 iounmap(upmx->virtbase); 1126 iounmap(upmx->virtbase);
1106 release_mem_region(upmx->phybase, upmx->physize); 1127 release_mem_region(upmx->phybase, upmx->physize);
diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
index a5467f8709e..a76a348321b 100644
--- a/drivers/pinctrl/pinmux.c
+++ b/drivers/pinctrl/pinmux.c
@@ -21,6 +21,7 @@
21#include <linux/list.h> 21#include <linux/list.h>
22#include <linux/mutex.h> 22#include <linux/mutex.h>
23#include <linux/spinlock.h> 23#include <linux/spinlock.h>
24#include <linux/string.h>
24#include <linux/sysfs.h> 25#include <linux/sysfs.h>
25#include <linux/debugfs.h> 26#include <linux/debugfs.h>
26#include <linux/seq_file.h> 27#include <linux/seq_file.h>
@@ -32,12 +33,8 @@
32static DEFINE_MUTEX(pinmux_list_mutex); 33static DEFINE_MUTEX(pinmux_list_mutex);
33static LIST_HEAD(pinmux_list); 34static LIST_HEAD(pinmux_list);
34 35
35/* List of pinmux hogs */ 36/* Global pinmux maps */
36static DEFINE_MUTEX(pinmux_hoglist_mutex); 37static struct pinmux_map *pinmux_maps;
37static LIST_HEAD(pinmux_hoglist);
38
39/* Global pinmux maps, we allow one set only */
40static struct pinmux_map const *pinmux_maps;
41static unsigned pinmux_maps_num; 38static unsigned pinmux_maps_num;
42 39
43/** 40/**
@@ -98,41 +95,35 @@ struct pinmux_hog {
98 * @function: a functional name to give to this pin, passed to the driver 95 * @function: a functional name to give to this pin, passed to the driver
99 * so it knows what function to mux in, e.g. the string "gpioNN" 96 * so it knows what function to mux in, e.g. the string "gpioNN"
100 * means that you want to mux in the pin for use as GPIO number NN 97 * means that you want to mux in the pin for use as GPIO number NN
101 * @gpio: if this request concerns a single GPIO pin
102 * @gpio_range: the range matching the GPIO pin if this is a request for a 98 * @gpio_range: the range matching the GPIO pin if this is a request for a
103 * single GPIO pin 99 * single GPIO pin
104 */ 100 */
105static int pin_request(struct pinctrl_dev *pctldev, 101static int pin_request(struct pinctrl_dev *pctldev,
106 int pin, const char *function, bool gpio, 102 int pin, const char *function,
107 struct pinctrl_gpio_range *gpio_range) 103 struct pinctrl_gpio_range *gpio_range)
108{ 104{
109 struct pin_desc *desc; 105 struct pin_desc *desc;
110 const struct pinmux_ops *ops = pctldev->desc->pmxops; 106 const struct pinmux_ops *ops = pctldev->desc->pmxops;
111 int status = -EINVAL; 107 int status = -EINVAL;
112 108
113 dev_dbg(&pctldev->dev, "request pin %d for %s\n", pin, function); 109 dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, function);
114
115 if (!pin_is_valid(pctldev, pin)) {
116 dev_err(&pctldev->dev, "pin is invalid\n");
117 return -EINVAL;
118 }
119
120 if (!function) {
121 dev_err(&pctldev->dev, "no function name given\n");
122 return -EINVAL;
123 }
124 110
125 desc = pin_desc_get(pctldev, pin); 111 desc = pin_desc_get(pctldev, pin);
126 if (desc == NULL) { 112 if (desc == NULL) {
127 dev_err(&pctldev->dev, 113 dev_err(pctldev->dev,
128 "pin is not registered so it cannot be requested\n"); 114 "pin is not registered so it cannot be requested\n");
129 goto out; 115 goto out;
130 } 116 }
131 117
118 if (!function) {
119 dev_err(pctldev->dev, "no function name given\n");
120 return -EINVAL;
121 }
122
132 spin_lock(&desc->lock); 123 spin_lock(&desc->lock);
133 if (desc->mux_function) { 124 if (desc->mux_function) {
134 spin_unlock(&desc->lock); 125 spin_unlock(&desc->lock);
135 dev_err(&pctldev->dev, 126 dev_err(pctldev->dev,
136 "pin already requested\n"); 127 "pin already requested\n");
137 goto out; 128 goto out;
138 } 129 }
@@ -141,7 +132,7 @@ static int pin_request(struct pinctrl_dev *pctldev,
141 132
142 /* Let each pin increase references to this module */ 133 /* Let each pin increase references to this module */
143 if (!try_module_get(pctldev->owner)) { 134 if (!try_module_get(pctldev->owner)) {
144 dev_err(&pctldev->dev, 135 dev_err(pctldev->dev,
145 "could not increase module refcount for pin %d\n", 136 "could not increase module refcount for pin %d\n",
146 pin); 137 pin);
147 status = -EINVAL; 138 status = -EINVAL;
@@ -152,7 +143,7 @@ static int pin_request(struct pinctrl_dev *pctldev,
152 * If there is no kind of request function for the pin we just assume 143 * If there is no kind of request function for the pin we just assume
153 * we got it by default and proceed. 144 * we got it by default and proceed.
154 */ 145 */
155 if (gpio && ops->gpio_request_enable) 146 if (gpio_range && ops->gpio_request_enable)
156 /* This requests and enables a single GPIO pin */ 147 /* This requests and enables a single GPIO pin */
157 status = ops->gpio_request_enable(pctldev, gpio_range, pin); 148 status = ops->gpio_request_enable(pctldev, gpio_range, pin);
158 else if (ops->request) 149 else if (ops->request)
@@ -161,7 +152,7 @@ static int pin_request(struct pinctrl_dev *pctldev,
161 status = 0; 152 status = 0;
162 153
163 if (status) 154 if (status)
164 dev_err(&pctldev->dev, "->request on device %s failed " 155 dev_err(pctldev->dev, "->request on device %s failed "
165 "for pin %d\n", 156 "for pin %d\n",
166 pctldev->desc->name, pin); 157 pctldev->desc->name, pin);
167out_free_pin: 158out_free_pin:
@@ -172,7 +163,7 @@ out_free_pin:
172 } 163 }
173out: 164out:
174 if (status) 165 if (status)
175 dev_err(&pctldev->dev, "pin-%d (%s) status %d\n", 166 dev_err(pctldev->dev, "pin-%d (%s) status %d\n",
176 pin, function ? : "?", status); 167 pin, function ? : "?", status);
177 168
178 return status; 169 return status;
@@ -182,34 +173,52 @@ out:
182 * pin_free() - release a single muxed in pin so something else can be muxed 173 * pin_free() - release a single muxed in pin so something else can be muxed
183 * @pctldev: pin controller device handling this pin 174 * @pctldev: pin controller device handling this pin
184 * @pin: the pin to free 175 * @pin: the pin to free
185 * @free_func: whether to free the pin's assigned function name string 176 * @gpio_range: the range matching the GPIO pin if this is a request for a
177 * single GPIO pin
178 *
179 * This function returns a pointer to the function name in use. This is used
180 * for callers that dynamically allocate a function name so it can be freed
181 * once the pin is free. This is done for GPIO request functions.
186 */ 182 */
187static void pin_free(struct pinctrl_dev *pctldev, int pin, int free_func) 183static const char *pin_free(struct pinctrl_dev *pctldev, int pin,
184 struct pinctrl_gpio_range *gpio_range)
188{ 185{
189 const struct pinmux_ops *ops = pctldev->desc->pmxops; 186 const struct pinmux_ops *ops = pctldev->desc->pmxops;
190 struct pin_desc *desc; 187 struct pin_desc *desc;
188 const char *func;
191 189
192 desc = pin_desc_get(pctldev, pin); 190 desc = pin_desc_get(pctldev, pin);
193 if (desc == NULL) { 191 if (desc == NULL) {
194 dev_err(&pctldev->dev, 192 dev_err(pctldev->dev,
195 "pin is not registered so it cannot be freed\n"); 193 "pin is not registered so it cannot be freed\n");
196 return; 194 return NULL;
197 } 195 }
198 196
199 if (ops->free) 197 /*
198 * If there is no kind of request function for the pin we just assume
199 * we got it by default and proceed.
200 */
201 if (gpio_range && ops->gpio_disable_free)
202 ops->gpio_disable_free(pctldev, gpio_range, pin);
203 else if (ops->free)
200 ops->free(pctldev, pin); 204 ops->free(pctldev, pin);
201 205
202 spin_lock(&desc->lock); 206 spin_lock(&desc->lock);
203 if (free_func) 207 func = desc->mux_function;
204 kfree(desc->mux_function);
205 desc->mux_function = NULL; 208 desc->mux_function = NULL;
206 spin_unlock(&desc->lock); 209 spin_unlock(&desc->lock);
207 module_put(pctldev->owner); 210 module_put(pctldev->owner);
211
212 return func;
208} 213}
209 214
210/** 215/**
211 * pinmux_request_gpio() - request a single pin to be muxed in as GPIO 216 * pinmux_request_gpio() - request a single pin to be muxed in as GPIO
212 * @gpio: the GPIO pin number from the GPIO subsystem number space 217 * @gpio: the GPIO pin number from the GPIO subsystem number space
218 *
219 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
220 * as part of their gpio_request() semantics, platforms and individual drivers
221 * shall *NOT* request GPIO pins to be muxed in.
213 */ 222 */
214int pinmux_request_gpio(unsigned gpio) 223int pinmux_request_gpio(unsigned gpio)
215{ 224{
@@ -225,7 +234,7 @@ int pinmux_request_gpio(unsigned gpio)
225 return -EINVAL; 234 return -EINVAL;
226 235
227 /* Convert to the pin controllers number space */ 236 /* Convert to the pin controllers number space */
228 pin = gpio - range->base; 237 pin = gpio - range->base + range->pin_base;
229 238
230 /* Conjure some name stating what chip and pin this is taken by */ 239 /* Conjure some name stating what chip and pin this is taken by */
231 snprintf(gpiostr, 15, "%s:%d", range->name, gpio); 240 snprintf(gpiostr, 15, "%s:%d", range->name, gpio);
@@ -234,7 +243,7 @@ int pinmux_request_gpio(unsigned gpio)
234 if (!function) 243 if (!function)
235 return -EINVAL; 244 return -EINVAL;
236 245
237 ret = pin_request(pctldev, pin, function, true, range); 246 ret = pin_request(pctldev, pin, function, range);
238 if (ret < 0) 247 if (ret < 0)
239 kfree(function); 248 kfree(function);
240 249
@@ -245,6 +254,10 @@ EXPORT_SYMBOL_GPL(pinmux_request_gpio);
245/** 254/**
246 * pinmux_free_gpio() - free a single pin, currently used as GPIO 255 * pinmux_free_gpio() - free a single pin, currently used as GPIO
247 * @gpio: the GPIO pin number from the GPIO subsystem number space 256 * @gpio: the GPIO pin number from the GPIO subsystem number space
257 *
258 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
259 * as part of their gpio_free() semantics, platforms and individual drivers
260 * shall *NOT* request GPIO pins to be muxed out.
248 */ 261 */
249void pinmux_free_gpio(unsigned gpio) 262void pinmux_free_gpio(unsigned gpio)
250{ 263{
@@ -252,53 +265,108 @@ void pinmux_free_gpio(unsigned gpio)
252 struct pinctrl_gpio_range *range; 265 struct pinctrl_gpio_range *range;
253 int ret; 266 int ret;
254 int pin; 267 int pin;
268 const char *func;
255 269
256 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); 270 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
257 if (ret) 271 if (ret)
258 return; 272 return;
259 273
260 /* Convert to the pin controllers number space */ 274 /* Convert to the pin controllers number space */
261 pin = gpio - range->base; 275 pin = gpio - range->base + range->pin_base;
262 276
263 pin_free(pctldev, pin, true); 277 func = pin_free(pctldev, pin, range);
278 kfree(func);
264} 279}
265EXPORT_SYMBOL_GPL(pinmux_free_gpio); 280EXPORT_SYMBOL_GPL(pinmux_free_gpio);
266 281
282static int pinmux_gpio_direction(unsigned gpio, bool input)
283{
284 struct pinctrl_dev *pctldev;
285 struct pinctrl_gpio_range *range;
286 const struct pinmux_ops *ops;
287 int ret;
288 int pin;
289
290 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
291 if (ret)
292 return ret;
293
294 ops = pctldev->desc->pmxops;
295
296 /* Convert to the pin controllers number space */
297 pin = gpio - range->base + range->pin_base;
298
299 if (ops->gpio_set_direction)
300 ret = ops->gpio_set_direction(pctldev, range, pin, input);
301 else
302 ret = 0;
303
304 return ret;
305}
306
307/**
308 * pinmux_gpio_direction_input() - request a GPIO pin to go into input mode
309 * @gpio: the GPIO pin number from the GPIO subsystem number space
310 *
311 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
312 * as part of their gpio_direction_input() semantics, platforms and individual
313 * drivers shall *NOT* touch pinmux GPIO calls.
314 */
315int pinmux_gpio_direction_input(unsigned gpio)
316{
317 return pinmux_gpio_direction(gpio, true);
318}
319EXPORT_SYMBOL_GPL(pinmux_gpio_direction_input);
320
321/**
322 * pinmux_gpio_direction_output() - request a GPIO pin to go into output mode
323 * @gpio: the GPIO pin number from the GPIO subsystem number space
324 *
325 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
326 * as part of their gpio_direction_output() semantics, platforms and individual
327 * drivers shall *NOT* touch pinmux GPIO calls.
328 */
329int pinmux_gpio_direction_output(unsigned gpio)
330{
331 return pinmux_gpio_direction(gpio, false);
332}
333EXPORT_SYMBOL_GPL(pinmux_gpio_direction_output);
334
267/** 335/**
268 * pinmux_register_mappings() - register a set of pinmux mappings 336 * pinmux_register_mappings() - register a set of pinmux mappings
269 * @maps: the pinmux mappings table to register 337 * @maps: the pinmux mappings table to register, this should be marked with
338 * __initdata so it can be discarded after boot, this function will
339 * perform a shallow copy for the mapping entries.
270 * @num_maps: the number of maps in the mapping table 340 * @num_maps: the number of maps in the mapping table
271 * 341 *
272 * Only call this once during initialization of your machine, the function is 342 * Only call this once during initialization of your machine, the function is
273 * tagged as __init and won't be callable after init has completed. The map 343 * tagged as __init and won't be callable after init has completed. The map
274 * passed into this function will be owned by the pinmux core and cannot be 344 * passed into this function will be owned by the pinmux core and cannot be
275 * free:d. 345 * freed.
276 */ 346 */
277int __init pinmux_register_mappings(struct pinmux_map const *maps, 347int __init pinmux_register_mappings(struct pinmux_map const *maps,
278 unsigned num_maps) 348 unsigned num_maps)
279{ 349{
350 void *tmp_maps;
280 int i; 351 int i;
281 352
282 if (pinmux_maps != NULL) {
283 pr_err("pinmux mappings already registered, you can only "
284 "register one set of maps\n");
285 return -EINVAL;
286 }
287
288 pr_debug("add %d pinmux maps\n", num_maps); 353 pr_debug("add %d pinmux maps\n", num_maps);
354
355 /* First sanity check the new mapping */
289 for (i = 0; i < num_maps; i++) { 356 for (i = 0; i < num_maps; i++) {
290 /* Sanity check the mapping */
291 if (!maps[i].name) { 357 if (!maps[i].name) {
292 pr_err("failed to register map %d: " 358 pr_err("failed to register map %d: "
293 "no map name given\n", i); 359 "no map name given\n", i);
294 return -EINVAL; 360 return -EINVAL;
295 } 361 }
362
296 if (!maps[i].ctrl_dev && !maps[i].ctrl_dev_name) { 363 if (!maps[i].ctrl_dev && !maps[i].ctrl_dev_name) {
297 pr_err("failed to register map %s (%d): " 364 pr_err("failed to register map %s (%d): "
298 "no pin control device given\n", 365 "no pin control device given\n",
299 maps[i].name, i); 366 maps[i].name, i);
300 return -EINVAL; 367 return -EINVAL;
301 } 368 }
369
302 if (!maps[i].function) { 370 if (!maps[i].function) {
303 pr_err("failed to register map %s (%d): " 371 pr_err("failed to register map %s (%d): "
304 "no function ID given\n", maps[i].name, i); 372 "no function ID given\n", maps[i].name, i);
@@ -315,9 +383,30 @@ int __init pinmux_register_mappings(struct pinmux_map const *maps,
315 maps[i].function); 383 maps[i].function);
316 } 384 }
317 385
318 pinmux_maps = maps; 386 /*
319 pinmux_maps_num = num_maps; 387 * Make a copy of the map array - string pointers will end up in the
388 * kernel const section anyway so these do not need to be deep copied.
389 */
390 if (!pinmux_maps_num) {
391 /* On first call, just copy them */
392 tmp_maps = kmemdup(maps,
393 sizeof(struct pinmux_map) * num_maps,
394 GFP_KERNEL);
395 if (!tmp_maps)
396 return -ENOMEM;
397 } else {
398 /* Subsequent calls, reallocate array to new size */
399 size_t oldsize = sizeof(struct pinmux_map) * pinmux_maps_num;
400 size_t newsize = sizeof(struct pinmux_map) * num_maps;
401
402 tmp_maps = krealloc(pinmux_maps, oldsize + newsize, GFP_KERNEL);
403 if (!tmp_maps)
404 return -ENOMEM;
405 memcpy((tmp_maps + oldsize), maps, newsize);
406 }
320 407
408 pinmux_maps = tmp_maps;
409 pinmux_maps_num += num_maps;
321 return 0; 410 return 0;
322} 411}
323 412
@@ -345,14 +434,14 @@ static int acquire_pins(struct pinctrl_dev *pctldev,
345 if (ret) 434 if (ret)
346 return ret; 435 return ret;
347 436
348 dev_dbg(&pctldev->dev, "requesting the %u pins from group %u\n", 437 dev_dbg(pctldev->dev, "requesting the %u pins from group %u\n",
349 num_pins, group_selector); 438 num_pins, group_selector);
350 439
351 /* Try to allocate all pins in this group, one by one */ 440 /* Try to allocate all pins in this group, one by one */
352 for (i = 0; i < num_pins; i++) { 441 for (i = 0; i < num_pins; i++) {
353 ret = pin_request(pctldev, pins[i], func, false, NULL); 442 ret = pin_request(pctldev, pins[i], func, NULL);
354 if (ret) { 443 if (ret) {
355 dev_err(&pctldev->dev, 444 dev_err(pctldev->dev,
356 "could not get pin %d for function %s " 445 "could not get pin %d for function %s "
357 "on device %s - conflicting mux mappings?\n", 446 "on device %s - conflicting mux mappings?\n",
358 pins[i], func ? : "(undefined)", 447 pins[i], func ? : "(undefined)",
@@ -360,7 +449,7 @@ static int acquire_pins(struct pinctrl_dev *pctldev,
360 /* On error release all taken pins */ 449 /* On error release all taken pins */
361 i--; /* this pin just failed */ 450 i--; /* this pin just failed */
362 for (; i >= 0; i--) 451 for (; i >= 0; i--)
363 pin_free(pctldev, pins[i], false); 452 pin_free(pctldev, pins[i], NULL);
364 return -ENODEV; 453 return -ENODEV;
365 } 454 }
366 } 455 }
@@ -384,44 +473,13 @@ static void release_pins(struct pinctrl_dev *pctldev,
384 ret = pctlops->get_group_pins(pctldev, group_selector, 473 ret = pctlops->get_group_pins(pctldev, group_selector,
385 &pins, &num_pins); 474 &pins, &num_pins);
386 if (ret) { 475 if (ret) {
387 dev_err(&pctldev->dev, "could not get pins to release for " 476 dev_err(pctldev->dev, "could not get pins to release for "
388 "group selector %d\n", 477 "group selector %d\n",
389 group_selector); 478 group_selector);
390 return; 479 return;
391 } 480 }
392 for (i = 0; i < num_pins; i++) 481 for (i = 0; i < num_pins; i++)
393 pin_free(pctldev, pins[i], false); 482 pin_free(pctldev, pins[i], NULL);
394}
395
396/**
397 * pinmux_get_group_selector() - returns the group selector for a group
398 * @pctldev: the pin controller handling the group
399 * @pin_group: the pin group to look up
400 */
401static int pinmux_get_group_selector(struct pinctrl_dev *pctldev,
402 const char *pin_group)
403{
404 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
405 unsigned group_selector = 0;
406
407 while (pctlops->list_groups(pctldev, group_selector) >= 0) {
408 const char *gname = pctlops->get_group_name(pctldev,
409 group_selector);
410 if (!strcmp(gname, pin_group)) {
411 dev_dbg(&pctldev->dev,
412 "found group selector %u for %s\n",
413 group_selector,
414 pin_group);
415 return group_selector;
416 }
417
418 group_selector++;
419 }
420
421 dev_err(&pctldev->dev, "does not have pin group %s\n",
422 pin_group);
423
424 return -EINVAL;
425} 483}
426 484
427/** 485/**
@@ -465,9 +523,9 @@ static int pinmux_check_pin_group(struct pinctrl_dev *pctldev,
465 return ret; 523 return ret;
466 if (num_groups < 1) 524 if (num_groups < 1)
467 return -EINVAL; 525 return -EINVAL;
468 ret = pinmux_get_group_selector(pctldev, groups[0]); 526 ret = pinctrl_get_group_selector(pctldev, groups[0]);
469 if (ret < 0) { 527 if (ret < 0) {
470 dev_err(&pctldev->dev, 528 dev_err(pctldev->dev,
471 "function %s wants group %s but the pin " 529 "function %s wants group %s but the pin "
472 "controller does not seem to have that group\n", 530 "controller does not seem to have that group\n",
473 pmxops->get_function_name(pctldev, func_selector), 531 pmxops->get_function_name(pctldev, func_selector),
@@ -476,7 +534,7 @@ static int pinmux_check_pin_group(struct pinctrl_dev *pctldev,
476 } 534 }
477 535
478 if (num_groups > 1) 536 if (num_groups > 1)
479 dev_dbg(&pctldev->dev, 537 dev_dbg(pctldev->dev,
480 "function %s support more than one group, " 538 "function %s support more than one group, "
481 "default-selecting first group %s (%d)\n", 539 "default-selecting first group %s (%d)\n",
482 pmxops->get_function_name(pctldev, func_selector), 540 pmxops->get_function_name(pctldev, func_selector),
@@ -486,13 +544,13 @@ static int pinmux_check_pin_group(struct pinctrl_dev *pctldev,
486 return ret; 544 return ret;
487 } 545 }
488 546
489 dev_dbg(&pctldev->dev, 547 dev_dbg(pctldev->dev,
490 "check if we have pin group %s on controller %s\n", 548 "check if we have pin group %s on controller %s\n",
491 pin_group, pinctrl_dev_get_name(pctldev)); 549 pin_group, pinctrl_dev_get_name(pctldev));
492 550
493 ret = pinmux_get_group_selector(pctldev, pin_group); 551 ret = pinctrl_get_group_selector(pctldev, pin_group);
494 if (ret < 0) { 552 if (ret < 0) {
495 dev_dbg(&pctldev->dev, 553 dev_dbg(pctldev->dev,
496 "%s does not support pin group %s with function %s\n", 554 "%s does not support pin group %s with function %s\n",
497 pinctrl_dev_get_name(pctldev), 555 pinctrl_dev_get_name(pctldev),
498 pin_group, 556 pin_group,
@@ -569,7 +627,7 @@ static int pinmux_enable_muxmap(struct pinctrl_dev *pctldev,
569 */ 627 */
570 628
571 if (pmx->pctldev && pmx->pctldev != pctldev) { 629 if (pmx->pctldev && pmx->pctldev != pctldev) {
572 dev_err(&pctldev->dev, 630 dev_err(pctldev->dev,
573 "different pin control devices given for device %s, " 631 "different pin control devices given for device %s, "
574 "function %s\n", 632 "function %s\n",
575 devname, 633 devname,
@@ -592,7 +650,7 @@ static int pinmux_enable_muxmap(struct pinctrl_dev *pctldev,
592 */ 650 */
593 if (pmx->func_selector != UINT_MAX && 651 if (pmx->func_selector != UINT_MAX &&
594 pmx->func_selector != func_selector) { 652 pmx->func_selector != func_selector) {
595 dev_err(&pctldev->dev, 653 dev_err(pctldev->dev,
596 "dual function defines in the map for device %s\n", 654 "dual function defines in the map for device %s\n",
597 devname); 655 devname);
598 return -EINVAL; 656 return -EINVAL;
@@ -698,7 +756,7 @@ struct pinmux *pinmux_get(struct device *dev, const char *name)
698 } 756 }
699 757
700 pr_debug("in map, found pctldev %s to handle function %s", 758 pr_debug("in map, found pctldev %s to handle function %s",
701 dev_name(&pctldev->dev), map->function); 759 dev_name(pctldev->dev), map->function);
702 760
703 761
704 /* 762 /*
@@ -874,7 +932,7 @@ static int pinmux_hog_map(struct pinctrl_dev *pctldev,
874 * without any problems, so then we can hog pinmuxes for 932 * without any problems, so then we can hog pinmuxes for
875 * all devices that just want a static pin mux at this point. 933 * all devices that just want a static pin mux at this point.
876 */ 934 */
877 dev_err(&pctldev->dev, "map %s wants to hog a non-system " 935 dev_err(pctldev->dev, "map %s wants to hog a non-system "
878 "pinmux, this is not going to work\n", map->name); 936 "pinmux, this is not going to work\n", map->name);
879 return -EINVAL; 937 return -EINVAL;
880 } 938 }
@@ -886,7 +944,7 @@ static int pinmux_hog_map(struct pinctrl_dev *pctldev,
886 pmx = pinmux_get(NULL, map->name); 944 pmx = pinmux_get(NULL, map->name);
887 if (IS_ERR(pmx)) { 945 if (IS_ERR(pmx)) {
888 kfree(hog); 946 kfree(hog);
889 dev_err(&pctldev->dev, 947 dev_err(pctldev->dev,
890 "could not get the %s pinmux mapping for hogging\n", 948 "could not get the %s pinmux mapping for hogging\n",
891 map->name); 949 map->name);
892 return PTR_ERR(pmx); 950 return PTR_ERR(pmx);
@@ -896,7 +954,7 @@ static int pinmux_hog_map(struct pinctrl_dev *pctldev,
896 if (ret) { 954 if (ret) {
897 pinmux_put(pmx); 955 pinmux_put(pmx);
898 kfree(hog); 956 kfree(hog);
899 dev_err(&pctldev->dev, 957 dev_err(pctldev->dev,
900 "could not enable the %s pinmux mapping for hogging\n", 958 "could not enable the %s pinmux mapping for hogging\n",
901 map->name); 959 map->name);
902 return ret; 960 return ret;
@@ -905,7 +963,7 @@ static int pinmux_hog_map(struct pinctrl_dev *pctldev,
905 hog->map = map; 963 hog->map = map;
906 hog->pmx = pmx; 964 hog->pmx = pmx;
907 965
908 dev_info(&pctldev->dev, "hogged map %s, function %s\n", map->name, 966 dev_info(pctldev->dev, "hogged map %s, function %s\n", map->name,
909 map->function); 967 map->function);
910 mutex_lock(&pctldev->pinmux_hogs_lock); 968 mutex_lock(&pctldev->pinmux_hogs_lock);
911 list_add(&hog->node, &pctldev->pinmux_hogs); 969 list_add(&hog->node, &pctldev->pinmux_hogs);
@@ -924,7 +982,7 @@ static int pinmux_hog_map(struct pinctrl_dev *pctldev,
924 */ 982 */
925int pinmux_hog_maps(struct pinctrl_dev *pctldev) 983int pinmux_hog_maps(struct pinctrl_dev *pctldev)
926{ 984{
927 struct device *dev = &pctldev->dev; 985 struct device *dev = pctldev->dev;
928 const char *devname = dev_name(dev); 986 const char *devname = dev_name(dev);
929 int ret; 987 int ret;
930 int i; 988 int i;
@@ -948,7 +1006,7 @@ int pinmux_hog_maps(struct pinctrl_dev *pctldev)
948} 1006}
949 1007
950/** 1008/**
951 * pinmux_hog_maps() - unhog specific map entries on controller device 1009 * pinmux_unhog_maps() - unhog specific map entries on controller device
952 * @pctldev: the pin control device to unhog entries on 1010 * @pctldev: the pin control device to unhog entries on
953 */ 1011 */
954void pinmux_unhog_maps(struct pinctrl_dev *pctldev) 1012void pinmux_unhog_maps(struct pinctrl_dev *pctldev)
@@ -1005,18 +1063,19 @@ static int pinmux_functions_show(struct seq_file *s, void *what)
1005static int pinmux_pins_show(struct seq_file *s, void *what) 1063static int pinmux_pins_show(struct seq_file *s, void *what)
1006{ 1064{
1007 struct pinctrl_dev *pctldev = s->private; 1065 struct pinctrl_dev *pctldev = s->private;
1008 unsigned pin; 1066 unsigned i, pin;
1009 1067
1010 seq_puts(s, "Pinmux settings per pin\n"); 1068 seq_puts(s, "Pinmux settings per pin\n");
1011 seq_puts(s, "Format: pin (name): pinmuxfunction\n"); 1069 seq_puts(s, "Format: pin (name): pinmuxfunction\n");
1012 1070
1013 /* The highest pin number need to be included in the loop, thus <= */ 1071 /* The pin number can be retrived from the pin controller descriptor */
1014 for (pin = 0; pin <= pctldev->desc->maxpin; pin++) { 1072 for (i = 0; i < pctldev->desc->npins; i++) {
1015 1073
1016 struct pin_desc *desc; 1074 struct pin_desc *desc;
1017 1075
1076 pin = pctldev->desc->pins[i].number;
1018 desc = pin_desc_get(pctldev, pin); 1077 desc = pin_desc_get(pctldev, pin);
1019 /* Pin space may be sparse */ 1078 /* Skip if we cannot search the pin */
1020 if (desc == NULL) 1079 if (desc == NULL)
1021 continue; 1080 continue;
1022 1081
diff --git a/include/linux/pinctrl/machine.h b/include/linux/pinctrl/machine.h
index 88863531d86..d0aecb7f6fb 100644
--- a/include/linux/pinctrl/machine.h
+++ b/include/linux/pinctrl/machine.h
@@ -48,7 +48,7 @@ struct pinmux_map {
48 const char *group; 48 const char *group;
49 struct device *dev; 49 struct device *dev;
50 const char *dev_name; 50 const char *dev_name;
51 const bool hog_on_boot; 51 bool hog_on_boot;
52}; 52};
53 53
54/* 54/*
@@ -66,30 +66,22 @@ struct pinmux_map {
66 { .name = a, .ctrl_dev_name = b, .function = c } 66 { .name = a, .ctrl_dev_name = b, .function = c }
67 67
68/* 68/*
69 * Convenience macro to map a function onto the primary device pinctrl device 69 * Convenience macro to map a system function onto a certain pinctrl device,
70 * this is especially helpful on systems that have only one pin controller 70 * to be hogged by the pinmux core until the system shuts down.
71 * or need to set up a lot of mappings on the primary controller.
72 */
73#define PINMUX_MAP_PRIMARY(a, b, c) \
74 { .name = a, .ctrl_dev_name = "pinctrl.0", .function = b, \
75 .dev_name = c }
76
77/*
78 * Convenience macro to map a system function onto the primary pinctrl device.
79 * System functions are not assigned to a particular device.
80 */ 71 */
81#define PINMUX_MAP_PRIMARY_SYS(a, b) \ 72#define PINMUX_MAP_SYS_HOG(a, b, c) \
82 { .name = a, .ctrl_dev_name = "pinctrl.0", .function = b } 73 { .name = a, .ctrl_dev_name = b, .function = c, \
74 .hog_on_boot = true }
83 75
84/* 76/*
85 * Convenience macro to map a system function onto the primary pinctrl device, 77 * Convenience macro to map a system function onto a certain pinctrl device
86 * to be hogged by the pinmux core until the system shuts down. 78 * using a specified group, to be hogged by the pinmux core until the system
79 * shuts down.
87 */ 80 */
88#define PINMUX_MAP_PRIMARY_SYS_HOG(a, b) \ 81#define PINMUX_MAP_SYS_HOG_GROUP(a, b, c, d) \
89 { .name = a, .ctrl_dev_name = "pinctrl.0", .function = b, \ 82 { .name = a, .ctrl_dev_name = b, .function = c, .group = d, \
90 .hog_on_boot = true } 83 .hog_on_boot = true }
91 84
92
93#ifdef CONFIG_PINMUX 85#ifdef CONFIG_PINMUX
94 86
95extern int pinmux_register_mappings(struct pinmux_map const *map, 87extern int pinmux_register_mappings(struct pinmux_map const *map,
diff --git a/include/linux/pinctrl/pinconf.h b/include/linux/pinctrl/pinconf.h
new file mode 100644
index 00000000000..477922cf043
--- /dev/null
+++ b/include/linux/pinctrl/pinconf.h
@@ -0,0 +1,97 @@
1/*
2 * Interface the pinconfig portions of the pinctrl subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 * This interface is used in the core to keep track of pins.
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
10 * License terms: GNU General Public License (GPL) version 2
11 */
12#ifndef __LINUX_PINCTRL_PINCONF_H
13#define __LINUX_PINCTRL_PINCONF_H
14
15#ifdef CONFIG_PINCONF
16
17struct pinctrl_dev;
18struct seq_file;
19
20/**
21 * struct pinconf_ops - pin config operations, to be implemented by
22 * pin configuration capable drivers.
23 * @pin_config_get: get the config of a certain pin, if the requested config
24 * is not available on this controller this should return -ENOTSUPP
25 * and if it is available but disabled it should return -EINVAL
26 * @pin_config_get: get the config of a certain pin
27 * @pin_config_set: configure an individual pin
28 * @pin_config_group_get: get configurations for an entire pin group
29 * @pin_config_group_set: configure all pins in a group
30 * @pin_config_dbg_show: optional debugfs display hook that will provide
31 * per-device info for a certain pin in debugfs
32 * @pin_config_group_dbg_show: optional debugfs display hook that will provide
33 * per-device info for a certain group in debugfs
34 */
35struct pinconf_ops {
36 int (*pin_config_get) (struct pinctrl_dev *pctldev,
37 unsigned pin,
38 unsigned long *config);
39 int (*pin_config_set) (struct pinctrl_dev *pctldev,
40 unsigned pin,
41 unsigned long config);
42 int (*pin_config_group_get) (struct pinctrl_dev *pctldev,
43 unsigned selector,
44 unsigned long *config);
45 int (*pin_config_group_set) (struct pinctrl_dev *pctldev,
46 unsigned selector,
47 unsigned long config);
48 void (*pin_config_dbg_show) (struct pinctrl_dev *pctldev,
49 struct seq_file *s,
50 unsigned offset);
51 void (*pin_config_group_dbg_show) (struct pinctrl_dev *pctldev,
52 struct seq_file *s,
53 unsigned selector);
54};
55
56extern int pin_config_get(const char *dev_name, const char *name,
57 unsigned long *config);
58extern int pin_config_set(const char *dev_name, const char *name,
59 unsigned long config);
60extern int pin_config_group_get(const char *dev_name,
61 const char *pin_group,
62 unsigned long *config);
63extern int pin_config_group_set(const char *dev_name,
64 const char *pin_group,
65 unsigned long config);
66
67#else
68
69static inline int pin_config_get(const char *dev_name, const char *name,
70 unsigned long *config)
71{
72 return 0;
73}
74
75static inline int pin_config_set(const char *dev_name, const char *name,
76 unsigned long config)
77{
78 return 0;
79}
80
81static inline int pin_config_group_get(const char *dev_name,
82 const char *pin_group,
83 unsigned long *config)
84{
85 return 0;
86}
87
88static inline int pin_config_group_set(const char *dev_name,
89 const char *pin_group,
90 unsigned long config)
91{
92 return 0;
93}
94
95#endif
96
97#endif /* __LINUX_PINCTRL_PINCONF_H */
diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
index 04c011038f3..8bd22ee7aa0 100644
--- a/include/linux/pinctrl/pinctrl.h
+++ b/include/linux/pinctrl/pinctrl.h
@@ -21,6 +21,7 @@
21 21
22struct pinctrl_dev; 22struct pinctrl_dev;
23struct pinmux_ops; 23struct pinmux_ops;
24struct pinconf_ops;
24struct gpio_chip; 25struct gpio_chip;
25 26
26/** 27/**
@@ -45,6 +46,7 @@ struct pinctrl_pin_desc {
45 * @name: a name for the chip in this range 46 * @name: a name for the chip in this range
46 * @id: an ID number for the chip in this range 47 * @id: an ID number for the chip in this range
47 * @base: base offset of the GPIO range 48 * @base: base offset of the GPIO range
49 * @pin_base: base pin number of the GPIO range
48 * @npins: number of pins in the GPIO range, including the base number 50 * @npins: number of pins in the GPIO range, including the base number
49 * @gc: an optional pointer to a gpio_chip 51 * @gc: an optional pointer to a gpio_chip
50 */ 52 */
@@ -53,6 +55,7 @@ struct pinctrl_gpio_range {
53 const char *name; 55 const char *name;
54 unsigned int id; 56 unsigned int id;
55 unsigned int base; 57 unsigned int base;
58 unsigned int pin_base;
56 unsigned int npins; 59 unsigned int npins;
57 struct gpio_chip *gc; 60 struct gpio_chip *gc;
58}; 61};
@@ -89,22 +92,20 @@ struct pinctrl_ops {
89 * this pin controller 92 * this pin controller
90 * @npins: number of descriptors in the array, usually just ARRAY_SIZE() 93 * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
91 * of the pins field above 94 * of the pins field above
92 * @maxpin: since pin spaces may be sparse, there can he "holes" in the
93 * pin range, this attribute gives the maximum pin number in the
94 * total range. This should not be lower than npins for example,
95 * but may be equal to npins if you have no holes in the pin range.
96 * @pctlops: pin control operation vtable, to support global concepts like 95 * @pctlops: pin control operation vtable, to support global concepts like
97 * grouping of pins, this is optional. 96 * grouping of pins, this is optional.
98 * @pmxops: pinmux operation vtable, if you support pinmuxing in your driver 97 * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
98 * @confops: pin config operations vtable, if you support pin configuration in
99 * your driver
99 * @owner: module providing the pin controller, used for refcounting 100 * @owner: module providing the pin controller, used for refcounting
100 */ 101 */
101struct pinctrl_desc { 102struct pinctrl_desc {
102 const char *name; 103 const char *name;
103 struct pinctrl_pin_desc const *pins; 104 struct pinctrl_pin_desc const *pins;
104 unsigned int npins; 105 unsigned int npins;
105 unsigned int maxpin;
106 struct pinctrl_ops *pctlops; 106 struct pinctrl_ops *pctlops;
107 struct pinmux_ops *pmxops; 107 struct pinmux_ops *pmxops;
108 struct pinconf_ops *confops;
108 struct module *owner; 109 struct module *owner;
109}; 110};
110 111
@@ -123,7 +124,7 @@ extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
123 124
124struct pinctrl_dev; 125struct pinctrl_dev;
125 126
126/* Sufficiently stupid default function when pinctrl is not in use */ 127/* Sufficiently stupid default functions when pinctrl is not in use */
127static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) 128static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
128{ 129{
129 return pin >= 0; 130 return pin >= 0;
diff --git a/include/linux/pinctrl/pinmux.h b/include/linux/pinctrl/pinmux.h
index 3c430e797ef..937b3e2fa36 100644
--- a/include/linux/pinctrl/pinmux.h
+++ b/include/linux/pinctrl/pinmux.h
@@ -52,9 +52,15 @@ struct pinctrl_dev;
52 * @disable: disable a certain muxing selector with a certain pin group 52 * @disable: disable a certain muxing selector with a certain pin group
53 * @gpio_request_enable: requests and enables GPIO on a certain pin. 53 * @gpio_request_enable: requests and enables GPIO on a certain pin.
54 * Implement this only if you can mux every pin individually as GPIO. The 54 * Implement this only if you can mux every pin individually as GPIO. The
55 * affected GPIO range is passed along with an offset into that 55 * affected GPIO range is passed along with an offset(pin number) into that
56 * specific GPIO range - function selectors and pin groups are orthogonal 56 * specific GPIO range - function selectors and pin groups are orthogonal
57 * to this, the core will however make sure the pins do not collide 57 * to this, the core will however make sure the pins do not collide.
58 * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of
59 * @gpio_request_enable
60 * @gpio_set_direction: Since controllers may need different configurations
61 * depending on whether the GPIO is configured as input or output,
62 * a direction selector function may be implemented as a backing
63 * to the GPIO controllers that need pin muxing.
58 */ 64 */
59struct pinmux_ops { 65struct pinmux_ops {
60 int (*request) (struct pinctrl_dev *pctldev, unsigned offset); 66 int (*request) (struct pinctrl_dev *pctldev, unsigned offset);
@@ -73,11 +79,20 @@ struct pinmux_ops {
73 int (*gpio_request_enable) (struct pinctrl_dev *pctldev, 79 int (*gpio_request_enable) (struct pinctrl_dev *pctldev,
74 struct pinctrl_gpio_range *range, 80 struct pinctrl_gpio_range *range,
75 unsigned offset); 81 unsigned offset);
82 void (*gpio_disable_free) (struct pinctrl_dev *pctldev,
83 struct pinctrl_gpio_range *range,
84 unsigned offset);
85 int (*gpio_set_direction) (struct pinctrl_dev *pctldev,
86 struct pinctrl_gpio_range *range,
87 unsigned offset,
88 bool input);
76}; 89};
77 90
78/* External interface to pinmux */ 91/* External interface to pinmux */
79extern int pinmux_request_gpio(unsigned gpio); 92extern int pinmux_request_gpio(unsigned gpio);
80extern void pinmux_free_gpio(unsigned gpio); 93extern void pinmux_free_gpio(unsigned gpio);
94extern int pinmux_gpio_direction_input(unsigned gpio);
95extern int pinmux_gpio_direction_output(unsigned gpio);
81extern struct pinmux * __must_check pinmux_get(struct device *dev, const char *name); 96extern struct pinmux * __must_check pinmux_get(struct device *dev, const char *name);
82extern void pinmux_put(struct pinmux *pmx); 97extern void pinmux_put(struct pinmux *pmx);
83extern int pinmux_enable(struct pinmux *pmx); 98extern int pinmux_enable(struct pinmux *pmx);
@@ -94,6 +109,16 @@ static inline void pinmux_free_gpio(unsigned gpio)
94{ 109{
95} 110}
96 111
112static inline int pinmux_gpio_direction_input(unsigned gpio)
113{
114 return 0;
115}
116
117static inline int pinmux_gpio_direction_output(unsigned gpio)
118{
119 return 0;
120}
121
97static inline struct pinmux * __must_check pinmux_get(struct device *dev, const char *name) 122static inline struct pinmux * __must_check pinmux_get(struct device *dev, const char *name)
98{ 123{
99 return NULL; 124 return NULL;