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authorTroy Kisky <troy.kisky@boundarydevices.com>2008-07-14 16:38:20 -0400
committerJean Delvare <khali@mahadeva.delvare>2008-07-14 16:38:20 -0400
commitcc99ff70c7ad36e01db545a81a8594474964f918 (patch)
treefb3c06bf63b6093078ca37a2c64439feedf70a47
parent7f101a97866e2687a455ecffeb96bcf317c8482a (diff)
i2c-davinci: Ensure clock between 7-12 MHz
Ensure psc value gives a clock between 7-12 MHz Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
-rw-r--r--drivers/i2c/busses/i2c-davinci.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 7ecbfc429b1..7fdbca17d4a 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -142,6 +142,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
142 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; 142 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
143 u16 psc; 143 u16 psc;
144 u32 clk; 144 u32 clk;
145 u32 d;
145 u32 clkh; 146 u32 clkh;
146 u32 clkl; 147 u32 clkl;
147 u32 input_clock = clk_get_rate(dev->clk); 148 u32 input_clock = clk_get_rate(dev->clk);
@@ -171,23 +172,29 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
171 * if PSC > 1 , d = 5 172 * if PSC > 1 , d = 5
172 */ 173 */
173 174
174 psc = 26; /* To get 1MHz clock */ 175 /* get minimum of 7 MHz clock, but max of 12 MHz */
176 psc = (input_clock / 7000000) - 1;
177 if ((input_clock / (psc + 1)) > 12000000)
178 psc++; /* better to run under spec than over */
179 d = (psc >= 2) ? 5 : 7 - psc;
175 180
176 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - 10; 181 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - (d << 1);
177 clkh = (50 * clk) / 100; 182 clkh = clk >> 1;
178 clkl = clk - clkh; 183 clkl = clk - clkh;
179 184
180 davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc); 185 davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc);
181 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh); 186 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh);
182 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl); 187 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
183 188
184 dev_dbg(dev->dev, "CLK = %d\n", clk); 189 dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
185 dev_dbg(dev->dev, "PSC = %d\n", 190 dev_dbg(dev->dev, "PSC = %d\n",
186 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG)); 191 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
187 dev_dbg(dev->dev, "CLKL = %d\n", 192 dev_dbg(dev->dev, "CLKL = %d\n",
188 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG)); 193 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG));
189 dev_dbg(dev->dev, "CLKH = %d\n", 194 dev_dbg(dev->dev, "CLKH = %d\n",
190 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG)); 195 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG));
196 dev_dbg(dev->dev, "bus_freq = %dkHz, bus_delay = %d\n",
197 pdata->bus_freq, pdata->bus_delay);
191 198
192 /* Take the I2C module out of reset: */ 199 /* Take the I2C module out of reset: */
193 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); 200 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);