diff options
author | Aaro Koskinen <aaro.koskinen@iki.fi> | 2011-03-13 06:26:14 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-03-14 14:52:28 -0400 |
commit | c83c620afabb582fa0d540aea1817724a5118c4f (patch) | |
tree | 87e9c90a1ec370798cf4608d8b5c8eaa0e3becbd | |
parent | 8277cf87bd676e3af869bb2c2c5249a215e2822c (diff) |
staging: xgifb: use mdelay() for millisecond delays
Use mdelay() instead of udelay() for millisecond delays.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r-- | drivers/staging/xgifb/vb_init.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/staging/xgifb/vb_init.c b/drivers/staging/xgifb/vb_init.c index 86d7333956d..85676966409 100644 --- a/drivers/staging/xgifb/vb_init.c +++ b/drivers/staging/xgifb/vb_init.c | |||
@@ -105,7 +105,7 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4, struct vb_device_info *pVBI | |||
105 | XGINew_SetReg1(P3c4, 0x16, 0x80); | 105 | XGINew_SetReg1(P3c4, 0x16, 0x80); |
106 | 106 | ||
107 | if (*pVBInfo->pXGINew_DRAMTypeDefinition != 0x0C) { /* Samsung F Die */ | 107 | if (*pVBInfo->pXGINew_DRAMTypeDefinition != 0x0C) { /* Samsung F Die */ |
108 | DelayUS(3000); /* Delay 67 x 3 Delay15us */ | 108 | mdelay(3); |
109 | XGINew_SetReg1(P3c4, 0x18, 0x00); | 109 | XGINew_SetReg1(P3c4, 0x18, 0x00); |
110 | XGINew_SetReg1(P3c4, 0x19, 0x20); | 110 | XGINew_SetReg1(P3c4, 0x19, 0x20); |
111 | XGINew_SetReg1(P3c4, 0x16, 0x00); | 111 | XGINew_SetReg1(P3c4, 0x16, 0x00); |
@@ -117,7 +117,7 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4, struct vb_device_info *pVBI | |||
117 | XGINew_SetReg1(P3c4, 0x19, 0x01); | 117 | XGINew_SetReg1(P3c4, 0x19, 0x01); |
118 | XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[0]); | 118 | XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[0]); |
119 | XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[1]); | 119 | XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[1]); |
120 | DelayUS(1000); | 120 | mdelay(1); |
121 | XGINew_SetReg1(P3c4, 0x1B, 0x03); | 121 | XGINew_SetReg1(P3c4, 0x1B, 0x03); |
122 | DelayUS(500); | 122 | DelayUS(500); |
123 | XGINew_SetReg1(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ | 123 | XGINew_SetReg1(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ |
@@ -292,7 +292,7 @@ static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4, struct vb_device_info *pVB | |||
292 | XGINew_SetReg1(P3c4, 0x19, 0x01); | 292 | XGINew_SetReg1(P3c4, 0x19, 0x01); |
293 | XGINew_SetReg1(P3c4, 0x16, 0x03); | 293 | XGINew_SetReg1(P3c4, 0x16, 0x03); |
294 | XGINew_SetReg1(P3c4, 0x16, 0x83); | 294 | XGINew_SetReg1(P3c4, 0x16, 0x83); |
295 | DelayUS(1000); | 295 | mdelay(1); |
296 | XGINew_SetReg1(P3c4, 0x1B, 0x03); | 296 | XGINew_SetReg1(P3c4, 0x1B, 0x03); |
297 | DelayUS(500); | 297 | DelayUS(500); |
298 | /* XGINew_SetReg1(P3c4, 0x18, 0x31); */ | 298 | /* XGINew_SetReg1(P3c4, 0x18, 0x31); */ |