diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2009-10-13 17:23:28 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-11-02 06:00:07 -0500 |
commit | c2ea1d56eaf084c66177eb5658ff4065e79b36ea (patch) | |
tree | fcc0a634a194dba00f730b54bdf6cf5f0f3b9de1 | |
parent | cd847b7857b835f9730d6fc93c3f423fcacc50f7 (diff) |
MIPS: Avoid potential hazard on Context register
set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.
Issue found and fixed for head.S by Chris Dearman <chris@mips.com>.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/include/asm/mmu_context.h | 3 | ||||
-rw-r--r-- | arch/mips/kernel/head.S | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index ed331c2e488..6083db58650 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/smp.h> | 16 | #include <linux/smp.h> |
17 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
18 | #include <asm/cacheflush.h> | 18 | #include <asm/cacheflush.h> |
19 | #include <asm/hazards.h> | ||
19 | #include <asm/tlbflush.h> | 20 | #include <asm/tlbflush.h> |
20 | #ifdef CONFIG_MIPS_MT_SMTC | 21 | #ifdef CONFIG_MIPS_MT_SMTC |
21 | #include <asm/mipsmtregs.h> | 22 | #include <asm/mipsmtregs.h> |
@@ -36,11 +37,13 @@ extern unsigned long pgd_current[]; | |||
36 | #ifdef CONFIG_32BIT | 37 | #ifdef CONFIG_32BIT |
37 | #define TLBMISS_HANDLER_SETUP() \ | 38 | #define TLBMISS_HANDLER_SETUP() \ |
38 | write_c0_context((unsigned long) smp_processor_id() << 25); \ | 39 | write_c0_context((unsigned long) smp_processor_id() << 25); \ |
40 | back_to_back_c0_hazard(); \ | ||
39 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) | 41 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) |
40 | #endif | 42 | #endif |
41 | #ifdef CONFIG_64BIT | 43 | #ifdef CONFIG_64BIT |
42 | #define TLBMISS_HANDLER_SETUP() \ | 44 | #define TLBMISS_HANDLER_SETUP() \ |
43 | write_c0_context((unsigned long) smp_processor_id() << 26); \ | 45 | write_c0_context((unsigned long) smp_processor_id() << 26); \ |
46 | back_to_back_c0_hazard(); \ | ||
44 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) | 47 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) |
45 | #endif | 48 | #endif |
46 | 49 | ||
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index 531ce7b1612..ea695d9605e 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S | |||
@@ -191,6 +191,7 @@ NESTED(kernel_entry, 16, sp) # kernel entry point | |||
191 | /* Set the SP after an empty pt_regs. */ | 191 | /* Set the SP after an empty pt_regs. */ |
192 | PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE | 192 | PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE |
193 | PTR_ADDU sp, $28 | 193 | PTR_ADDU sp, $28 |
194 | back_to_back_c0_hazard | ||
194 | set_saved_sp sp, t0, t1 | 195 | set_saved_sp sp, t0, t1 |
195 | PTR_SUBU sp, 4 * SZREG # init stack pointer | 196 | PTR_SUBU sp, 4 * SZREG # init stack pointer |
196 | 197 | ||