MIPS: Avoid potential hazard on Context register

set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.

Issue found and fixed for head.S by Chris Dearman <chris@mips.com>.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2 files changed, 4 insertions, 0 deletions

diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index ed331c2e488..6083db58650 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -16,6 +16,7 @@
 #include <linux/smp.h>
 #include <linux/slab.h>
 #include <asm/cacheflush.h>
+#include <asm/hazards.h>
 #include <asm/tlbflush.h>
 #ifdef CONFIG_MIPS_MT_SMTC
 #include <asm/mipsmtregs.h>
@@ -36,11 +37,13 @@ extern unsigned long pgd_current[];
 #ifdef CONFIG_32BIT
 #define TLBMISS_HANDLER_SETUP()                                         \
         write_c0_context((unsigned long) smp_processor_id() << 25);     \
+        back_to_back_c0_hazard();                                       \
         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 #ifdef CONFIG_64BIT
 #define TLBMISS_HANDLER_SETUP()                                         \
         write_c0_context((unsigned long) smp_processor_id() << 26);     \
+        back_to_back_c0_hazard();                                       \
         TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
 #endif
 
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 531ce7b1612..ea695d9605e 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -191,6 +191,7 @@ NESTED(kernel_entry, 16, sp)			# kernel entry point
         /* Set the SP after an empty pt_regs.  */
         PTR_LI          sp, _THREAD_SIZE - 32 - PT_SIZE
         PTR_ADDU        sp, $28
+        back_to_back_c0_hazard
         set_saved_sp    sp, t0, t1
         PTR_SUBU        sp, 4 * SZREG           # init stack pointer