diff options
author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-12-22 17:06:20 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-12-31 06:15:34 -0500 |
commit | c1f814f49904ae5b275407f71aefd3a31c774098 (patch) | |
tree | d6cb68dfbf989b34cbdb071a13792436cc771fa2 | |
parent | a73efc05b7fc7686b6333c48732a0ba5777e3726 (diff) |
[media] dibx000: convert set_fontend to use DVBv5 parameters
Instead of using dvb_frontend_parameters struct, that were
designed for a subset of the supported standards, use the DVBv5
cache information.
Also, fill the supported delivery systems at dvb_frontend_ops
struct.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/media/dvb/frontends/dib3000mc.c | 131 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dib7000m.c | 135 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dib7000p.c | 126 | ||||
-rw-r--r-- | drivers/media/dvb/frontends/dibx000_common.h | 10 |
4 files changed, 211 insertions, 191 deletions
diff --git a/drivers/media/dvb/frontends/dib3000mc.c b/drivers/media/dvb/frontends/dib3000mc.c index 7ec0e028984..7472429e47a 100644 --- a/drivers/media/dvb/frontends/dib3000mc.c +++ b/drivers/media/dvb/frontends/dib3000mc.c | |||
@@ -438,11 +438,14 @@ static void dib3000mc_set_adp_cfg(struct dib3000mc_state *state, s16 qam) | |||
438 | dib3000mc_write_word(state, reg, cfg[reg - 129]); | 438 | dib3000mc_write_word(state, reg, cfg[reg - 129]); |
439 | } | 439 | } |
440 | 440 | ||
441 | static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_frontend_parameters *ch, u16 seq) | 441 | static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, |
442 | struct dtv_frontend_properties *ch, u16 seq) | ||
442 | { | 443 | { |
443 | u16 value; | 444 | u16 value; |
444 | dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); | 445 | u32 bw = BANDWIDTH_TO_KHZ(ch->bandwidth_hz); |
445 | dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 0); | 446 | |
447 | dib3000mc_set_bandwidth(state, bw); | ||
448 | dib3000mc_set_timing(state, ch->transmission_mode, bw, 0); | ||
446 | 449 | ||
447 | // if (boost) | 450 | // if (boost) |
448 | // dib3000mc_write_word(state, 100, (11 << 6) + 6); | 451 | // dib3000mc_write_word(state, 100, (11 << 6) + 6); |
@@ -471,22 +474,22 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
471 | dib3000mc_write_word(state, 97,0); | 474 | dib3000mc_write_word(state, 97,0); |
472 | dib3000mc_write_word(state, 98,0); | 475 | dib3000mc_write_word(state, 98,0); |
473 | 476 | ||
474 | dib3000mc_set_impulse_noise(state, 0, ch->u.ofdm.transmission_mode); | 477 | dib3000mc_set_impulse_noise(state, 0, ch->transmission_mode); |
475 | 478 | ||
476 | value = 0; | 479 | value = 0; |
477 | switch (ch->u.ofdm.transmission_mode) { | 480 | switch (ch->transmission_mode) { |
478 | case TRANSMISSION_MODE_2K: value |= (0 << 7); break; | 481 | case TRANSMISSION_MODE_2K: value |= (0 << 7); break; |
479 | default: | 482 | default: |
480 | case TRANSMISSION_MODE_8K: value |= (1 << 7); break; | 483 | case TRANSMISSION_MODE_8K: value |= (1 << 7); break; |
481 | } | 484 | } |
482 | switch (ch->u.ofdm.guard_interval) { | 485 | switch (ch->guard_interval) { |
483 | case GUARD_INTERVAL_1_32: value |= (0 << 5); break; | 486 | case GUARD_INTERVAL_1_32: value |= (0 << 5); break; |
484 | case GUARD_INTERVAL_1_16: value |= (1 << 5); break; | 487 | case GUARD_INTERVAL_1_16: value |= (1 << 5); break; |
485 | case GUARD_INTERVAL_1_4: value |= (3 << 5); break; | 488 | case GUARD_INTERVAL_1_4: value |= (3 << 5); break; |
486 | default: | 489 | default: |
487 | case GUARD_INTERVAL_1_8: value |= (2 << 5); break; | 490 | case GUARD_INTERVAL_1_8: value |= (2 << 5); break; |
488 | } | 491 | } |
489 | switch (ch->u.ofdm.constellation) { | 492 | switch (ch->modulation) { |
490 | case QPSK: value |= (0 << 3); break; | 493 | case QPSK: value |= (0 << 3); break; |
491 | case QAM_16: value |= (1 << 3); break; | 494 | case QAM_16: value |= (1 << 3); break; |
492 | default: | 495 | default: |
@@ -502,11 +505,11 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
502 | dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4)); | 505 | dib3000mc_write_word(state, 5, (1 << 8) | ((seq & 0xf) << 4)); |
503 | 506 | ||
504 | value = 0; | 507 | value = 0; |
505 | if (ch->u.ofdm.hierarchy_information == 1) | 508 | if (ch->hierarchy == 1) |
506 | value |= (1 << 4); | 509 | value |= (1 << 4); |
507 | if (1 == 1) | 510 | if (1 == 1) |
508 | value |= 1; | 511 | value |= 1; |
509 | switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) { | 512 | switch ((ch->hierarchy == 0 || 1 == 1) ? ch->code_rate_HP : ch->code_rate_LP) { |
510 | case FEC_2_3: value |= (2 << 1); break; | 513 | case FEC_2_3: value |= (2 << 1); break; |
511 | case FEC_3_4: value |= (3 << 1); break; | 514 | case FEC_3_4: value |= (3 << 1); break; |
512 | case FEC_5_6: value |= (5 << 1); break; | 515 | case FEC_5_6: value |= (5 << 1); break; |
@@ -517,12 +520,12 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
517 | dib3000mc_write_word(state, 181, value); | 520 | dib3000mc_write_word(state, 181, value); |
518 | 521 | ||
519 | // diversity synchro delay add 50% SFN margin | 522 | // diversity synchro delay add 50% SFN margin |
520 | switch (ch->u.ofdm.transmission_mode) { | 523 | switch (ch->transmission_mode) { |
521 | case TRANSMISSION_MODE_8K: value = 256; break; | 524 | case TRANSMISSION_MODE_8K: value = 256; break; |
522 | case TRANSMISSION_MODE_2K: | 525 | case TRANSMISSION_MODE_2K: |
523 | default: value = 64; break; | 526 | default: value = 64; break; |
524 | } | 527 | } |
525 | switch (ch->u.ofdm.guard_interval) { | 528 | switch (ch->guard_interval) { |
526 | case GUARD_INTERVAL_1_16: value *= 2; break; | 529 | case GUARD_INTERVAL_1_16: value *= 2; break; |
527 | case GUARD_INTERVAL_1_8: value *= 4; break; | 530 | case GUARD_INTERVAL_1_8: value *= 4; break; |
528 | case GUARD_INTERVAL_1_4: value *= 8; break; | 531 | case GUARD_INTERVAL_1_4: value *= 8; break; |
@@ -540,27 +543,28 @@ static void dib3000mc_set_channel_cfg(struct dib3000mc_state *state, struct dvb_ | |||
540 | 543 | ||
541 | msleep(30); | 544 | msleep(30); |
542 | 545 | ||
543 | dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->u.ofdm.transmission_mode); | 546 | dib3000mc_set_impulse_noise(state, state->cfg->impulse_noise_mode, ch->transmission_mode); |
544 | } | 547 | } |
545 | 548 | ||
546 | static int dib3000mc_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *chan) | 549 | static int dib3000mc_autosearch_start(struct dvb_frontend *demod) |
547 | { | 550 | { |
551 | struct dtv_frontend_properties *chan = &demod->dtv_property_cache; | ||
548 | struct dib3000mc_state *state = demod->demodulator_priv; | 552 | struct dib3000mc_state *state = demod->demodulator_priv; |
549 | u16 reg; | 553 | u16 reg; |
550 | // u32 val; | 554 | // u32 val; |
551 | struct dvb_frontend_parameters schan; | 555 | struct dtv_frontend_properties schan; |
552 | 556 | ||
553 | schan = *chan; | 557 | schan = *chan; |
554 | 558 | ||
555 | /* TODO what is that ? */ | 559 | /* TODO what is that ? */ |
556 | 560 | ||
557 | /* a channel for autosearch */ | 561 | /* a channel for autosearch */ |
558 | schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; | 562 | schan.transmission_mode = TRANSMISSION_MODE_8K; |
559 | schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32; | 563 | schan.guard_interval = GUARD_INTERVAL_1_32; |
560 | schan.u.ofdm.constellation = QAM_64; | 564 | schan.modulation = QAM_64; |
561 | schan.u.ofdm.code_rate_HP = FEC_2_3; | 565 | schan.code_rate_HP = FEC_2_3; |
562 | schan.u.ofdm.code_rate_LP = FEC_2_3; | 566 | schan.code_rate_LP = FEC_2_3; |
563 | schan.u.ofdm.hierarchy_information = 0; | 567 | schan.hierarchy = 0; |
564 | 568 | ||
565 | dib3000mc_set_channel_cfg(state, &schan, 11); | 569 | dib3000mc_set_channel_cfg(state, &schan, 11); |
566 | 570 | ||
@@ -586,8 +590,9 @@ static int dib3000mc_autosearch_is_irq(struct dvb_frontend *demod) | |||
586 | return 0; // still pending | 590 | return 0; // still pending |
587 | } | 591 | } |
588 | 592 | ||
589 | static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 593 | static int dib3000mc_tune(struct dvb_frontend *demod) |
590 | { | 594 | { |
595 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
591 | struct dib3000mc_state *state = demod->demodulator_priv; | 596 | struct dib3000mc_state *state = demod->demodulator_priv; |
592 | 597 | ||
593 | // ** configure demod ** | 598 | // ** configure demod ** |
@@ -603,8 +608,8 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parame | |||
603 | dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift | 608 | dib3000mc_write_word(state, 108, 0x0000); // P_pha3_force_pha_shift |
604 | } | 609 | } |
605 | 610 | ||
606 | dib3000mc_set_adp_cfg(state, (u8)ch->u.ofdm.constellation); | 611 | dib3000mc_set_adp_cfg(state, (u8)ch->modulation); |
607 | if (ch->u.ofdm.transmission_mode == TRANSMISSION_MODE_8K) { | 612 | if (ch->transmission_mode == TRANSMISSION_MODE_8K) { |
608 | dib3000mc_write_word(state, 26, 38528); | 613 | dib3000mc_write_word(state, 26, 38528); |
609 | dib3000mc_write_word(state, 33, 8); | 614 | dib3000mc_write_word(state, 33, 8); |
610 | } else { | 615 | } else { |
@@ -613,7 +618,8 @@ static int dib3000mc_tune(struct dvb_frontend *demod, struct dvb_frontend_parame | |||
613 | } | 618 | } |
614 | 619 | ||
615 | if (dib3000mc_read_word(state, 509) & 0x80) | 620 | if (dib3000mc_read_word(state, 509) & 0x80) |
616 | dib3000mc_set_timing(state, ch->u.ofdm.transmission_mode, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth), 1); | 621 | dib3000mc_set_timing(state, ch->transmission_mode, |
622 | BANDWIDTH_TO_KHZ(ch->bandwidth_hz), 1); | ||
617 | 623 | ||
618 | return 0; | 624 | return 0; |
619 | } | 625 | } |
@@ -627,70 +633,70 @@ struct i2c_adapter * dib3000mc_get_tuner_i2c_master(struct dvb_frontend *demod, | |||
627 | EXPORT_SYMBOL(dib3000mc_get_tuner_i2c_master); | 633 | EXPORT_SYMBOL(dib3000mc_get_tuner_i2c_master); |
628 | 634 | ||
629 | static int dib3000mc_get_frontend(struct dvb_frontend* fe, | 635 | static int dib3000mc_get_frontend(struct dvb_frontend* fe, |
630 | struct dvb_frontend_parameters *fep) | 636 | struct dtv_frontend_properties *fep) |
631 | { | 637 | { |
632 | struct dib3000mc_state *state = fe->demodulator_priv; | 638 | struct dib3000mc_state *state = fe->demodulator_priv; |
633 | u16 tps = dib3000mc_read_word(state,458); | 639 | u16 tps = dib3000mc_read_word(state,458); |
634 | 640 | ||
635 | fep->inversion = INVERSION_AUTO; | 641 | fep->inversion = INVERSION_AUTO; |
636 | 642 | ||
637 | fep->u.ofdm.bandwidth = state->current_bandwidth; | 643 | fep->bandwidth_hz = state->current_bandwidth; |
638 | 644 | ||
639 | switch ((tps >> 8) & 0x1) { | 645 | switch ((tps >> 8) & 0x1) { |
640 | case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break; | 646 | case 0: fep->transmission_mode = TRANSMISSION_MODE_2K; break; |
641 | case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break; | 647 | case 1: fep->transmission_mode = TRANSMISSION_MODE_8K; break; |
642 | } | 648 | } |
643 | 649 | ||
644 | switch (tps & 0x3) { | 650 | switch (tps & 0x3) { |
645 | case 0: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; break; | 651 | case 0: fep->guard_interval = GUARD_INTERVAL_1_32; break; |
646 | case 1: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; break; | 652 | case 1: fep->guard_interval = GUARD_INTERVAL_1_16; break; |
647 | case 2: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; break; | 653 | case 2: fep->guard_interval = GUARD_INTERVAL_1_8; break; |
648 | case 3: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; break; | 654 | case 3: fep->guard_interval = GUARD_INTERVAL_1_4; break; |
649 | } | 655 | } |
650 | 656 | ||
651 | switch ((tps >> 13) & 0x3) { | 657 | switch ((tps >> 13) & 0x3) { |
652 | case 0: fep->u.ofdm.constellation = QPSK; break; | 658 | case 0: fep->modulation = QPSK; break; |
653 | case 1: fep->u.ofdm.constellation = QAM_16; break; | 659 | case 1: fep->modulation = QAM_16; break; |
654 | case 2: | 660 | case 2: |
655 | default: fep->u.ofdm.constellation = QAM_64; break; | 661 | default: fep->modulation = QAM_64; break; |
656 | } | 662 | } |
657 | 663 | ||
658 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ | 664 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ |
659 | /* (tps >> 12) & 0x1 == hrch is used, (tps >> 9) & 0x7 == alpha */ | 665 | /* (tps >> 12) & 0x1 == hrch is used, (tps >> 9) & 0x7 == alpha */ |
660 | 666 | ||
661 | fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; | 667 | fep->hierarchy = HIERARCHY_NONE; |
662 | switch ((tps >> 5) & 0x7) { | 668 | switch ((tps >> 5) & 0x7) { |
663 | case 1: fep->u.ofdm.code_rate_HP = FEC_1_2; break; | 669 | case 1: fep->code_rate_HP = FEC_1_2; break; |
664 | case 2: fep->u.ofdm.code_rate_HP = FEC_2_3; break; | 670 | case 2: fep->code_rate_HP = FEC_2_3; break; |
665 | case 3: fep->u.ofdm.code_rate_HP = FEC_3_4; break; | 671 | case 3: fep->code_rate_HP = FEC_3_4; break; |
666 | case 5: fep->u.ofdm.code_rate_HP = FEC_5_6; break; | 672 | case 5: fep->code_rate_HP = FEC_5_6; break; |
667 | case 7: | 673 | case 7: |
668 | default: fep->u.ofdm.code_rate_HP = FEC_7_8; break; | 674 | default: fep->code_rate_HP = FEC_7_8; break; |
669 | 675 | ||
670 | } | 676 | } |
671 | 677 | ||
672 | switch ((tps >> 2) & 0x7) { | 678 | switch ((tps >> 2) & 0x7) { |
673 | case 1: fep->u.ofdm.code_rate_LP = FEC_1_2; break; | 679 | case 1: fep->code_rate_LP = FEC_1_2; break; |
674 | case 2: fep->u.ofdm.code_rate_LP = FEC_2_3; break; | 680 | case 2: fep->code_rate_LP = FEC_2_3; break; |
675 | case 3: fep->u.ofdm.code_rate_LP = FEC_3_4; break; | 681 | case 3: fep->code_rate_LP = FEC_3_4; break; |
676 | case 5: fep->u.ofdm.code_rate_LP = FEC_5_6; break; | 682 | case 5: fep->code_rate_LP = FEC_5_6; break; |
677 | case 7: | 683 | case 7: |
678 | default: fep->u.ofdm.code_rate_LP = FEC_7_8; break; | 684 | default: fep->code_rate_LP = FEC_7_8; break; |
679 | } | 685 | } |
680 | 686 | ||
681 | return 0; | 687 | return 0; |
682 | } | 688 | } |
683 | 689 | ||
684 | static int dib3000mc_set_frontend(struct dvb_frontend* fe, | 690 | static int dib3000mc_set_frontend(struct dvb_frontend *fe) |
685 | struct dvb_frontend_parameters *fep) | ||
686 | { | 691 | { |
692 | struct dtv_frontend_properties *fep = &fe->dtv_property_cache, tmp; | ||
687 | struct dib3000mc_state *state = fe->demodulator_priv; | 693 | struct dib3000mc_state *state = fe->demodulator_priv; |
688 | int ret; | 694 | int ret; |
689 | 695 | ||
690 | dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z); | 696 | dib3000mc_set_output_mode(state, OUTMODE_HIGH_Z); |
691 | 697 | ||
692 | state->current_bandwidth = fep->u.ofdm.bandwidth; | 698 | state->current_bandwidth = fep->bandwidth_hz; |
693 | dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth)); | 699 | dib3000mc_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->bandwidth_hz)); |
694 | 700 | ||
695 | /* maybe the parameter has been changed */ | 701 | /* maybe the parameter has been changed */ |
696 | state->sfn_workaround_active = buggy_sfn_workaround; | 702 | state->sfn_workaround_active = buggy_sfn_workaround; |
@@ -700,13 +706,15 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe, | |||
700 | msleep(100); | 706 | msleep(100); |
701 | } | 707 | } |
702 | 708 | ||
703 | if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || | 709 | if (fep->transmission_mode == TRANSMISSION_MODE_AUTO || |
704 | fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || | 710 | fep->guard_interval == GUARD_INTERVAL_AUTO || |
705 | fep->u.ofdm.constellation == QAM_AUTO || | 711 | fep->modulation == QAM_AUTO || |
706 | fep->u.ofdm.code_rate_HP == FEC_AUTO) { | 712 | fep->code_rate_HP == FEC_AUTO) { |
707 | int i = 1000, found; | 713 | int i = 1000, found; |
708 | 714 | ||
709 | dib3000mc_autosearch_start(fe, fep); | 715 | tmp = *fep; |
716 | |||
717 | dib3000mc_autosearch_start(fe); | ||
710 | do { | 718 | do { |
711 | msleep(1); | 719 | msleep(1); |
712 | found = dib3000mc_autosearch_is_irq(fe); | 720 | found = dib3000mc_autosearch_is_irq(fe); |
@@ -716,14 +724,14 @@ static int dib3000mc_set_frontend(struct dvb_frontend* fe, | |||
716 | if (found == 0 || found == 1) | 724 | if (found == 0 || found == 1) |
717 | return 0; // no channel found | 725 | return 0; // no channel found |
718 | 726 | ||
719 | dib3000mc_get_frontend(fe, fep); | 727 | dib3000mc_get_frontend(fe, &tmp); |
720 | } | 728 | } |
721 | 729 | ||
722 | ret = dib3000mc_tune(fe, fep); | 730 | ret = dib3000mc_tune(fe); |
723 | 731 | ||
724 | /* make this a config parameter */ | 732 | /* make this a config parameter */ |
725 | dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO); | 733 | dib3000mc_set_output_mode(state, OUTMODE_MPEG2_FIFO); |
726 | return ret; | 734 | return ret; |
727 | } | 735 | } |
728 | 736 | ||
729 | static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat) | 737 | static int dib3000mc_read_status(struct dvb_frontend *fe, fe_status_t *stat) |
@@ -897,6 +905,7 @@ error: | |||
897 | EXPORT_SYMBOL(dib3000mc_attach); | 905 | EXPORT_SYMBOL(dib3000mc_attach); |
898 | 906 | ||
899 | static struct dvb_frontend_ops dib3000mc_ops = { | 907 | static struct dvb_frontend_ops dib3000mc_ops = { |
908 | .delsys = { SYS_DVBT }, | ||
900 | .info = { | 909 | .info = { |
901 | .name = "DiBcom 3000MC/P", | 910 | .name = "DiBcom 3000MC/P", |
902 | .type = FE_OFDM, | 911 | .type = FE_OFDM, |
@@ -918,9 +927,9 @@ static struct dvb_frontend_ops dib3000mc_ops = { | |||
918 | .init = dib3000mc_init, | 927 | .init = dib3000mc_init, |
919 | .sleep = dib3000mc_sleep, | 928 | .sleep = dib3000mc_sleep, |
920 | 929 | ||
921 | .set_frontend_legacy = dib3000mc_set_frontend, | 930 | .set_frontend = dib3000mc_set_frontend, |
922 | .get_tune_settings = dib3000mc_fe_get_tune_settings, | 931 | .get_tune_settings = dib3000mc_fe_get_tune_settings, |
923 | .get_frontend_legacy = dib3000mc_get_frontend, | 932 | .get_frontend = dib3000mc_get_frontend, |
924 | 933 | ||
925 | .read_status = dib3000mc_read_status, | 934 | .read_status = dib3000mc_read_status, |
926 | .read_ber = dib3000mc_read_ber, | 935 | .read_ber = dib3000mc_read_ber, |
diff --git a/drivers/media/dvb/frontends/dib7000m.c b/drivers/media/dvb/frontends/dib7000m.c index 45c110590b7..29123aebf87 100644 --- a/drivers/media/dvb/frontends/dib7000m.c +++ b/drivers/media/dvb/frontends/dib7000m.c | |||
@@ -313,6 +313,9 @@ static int dib7000m_set_bandwidth(struct dib7000m_state *state, u32 bw) | |||
313 | { | 313 | { |
314 | u32 timf; | 314 | u32 timf; |
315 | 315 | ||
316 | if (!bw) | ||
317 | bw = 8000; | ||
318 | |||
316 | // store the current bandwidth for later use | 319 | // store the current bandwidth for later use |
317 | state->current_bandwidth = bw; | 320 | state->current_bandwidth = bw; |
318 | 321 | ||
@@ -742,8 +745,9 @@ static void dib7000m_update_timf(struct dib7000m_state *state) | |||
742 | dprintk( "updated timf_frequency: %d (default: %d)",state->timf, state->timf_default); | 745 | dprintk( "updated timf_frequency: %d (default: %d)",state->timf, state->timf_default); |
743 | } | 746 | } |
744 | 747 | ||
745 | static int dib7000m_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 748 | static int dib7000m_agc_startup(struct dvb_frontend *demod) |
746 | { | 749 | { |
750 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
747 | struct dib7000m_state *state = demod->demodulator_priv; | 751 | struct dib7000m_state *state = demod->demodulator_priv; |
748 | u16 cfg_72 = dib7000m_read_word(state, 72); | 752 | u16 cfg_72 = dib7000m_read_word(state, 72); |
749 | int ret = -1; | 753 | int ret = -1; |
@@ -832,28 +836,29 @@ static int dib7000m_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_ | |||
832 | return ret; | 836 | return ret; |
833 | } | 837 | } |
834 | 838 | ||
835 | static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_frontend_parameters *ch, u8 seq) | 839 | static void dib7000m_set_channel(struct dib7000m_state *state, struct dtv_frontend_properties *ch, |
840 | u8 seq) | ||
836 | { | 841 | { |
837 | u16 value, est[4]; | 842 | u16 value, est[4]; |
838 | 843 | ||
839 | dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); | 844 | dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); |
840 | 845 | ||
841 | /* nfft, guard, qam, alpha */ | 846 | /* nfft, guard, qam, alpha */ |
842 | value = 0; | 847 | value = 0; |
843 | switch (ch->u.ofdm.transmission_mode) { | 848 | switch (ch->transmission_mode) { |
844 | case TRANSMISSION_MODE_2K: value |= (0 << 7); break; | 849 | case TRANSMISSION_MODE_2K: value |= (0 << 7); break; |
845 | case TRANSMISSION_MODE_4K: value |= (2 << 7); break; | 850 | case TRANSMISSION_MODE_4K: value |= (2 << 7); break; |
846 | default: | 851 | default: |
847 | case TRANSMISSION_MODE_8K: value |= (1 << 7); break; | 852 | case TRANSMISSION_MODE_8K: value |= (1 << 7); break; |
848 | } | 853 | } |
849 | switch (ch->u.ofdm.guard_interval) { | 854 | switch (ch->guard_interval) { |
850 | case GUARD_INTERVAL_1_32: value |= (0 << 5); break; | 855 | case GUARD_INTERVAL_1_32: value |= (0 << 5); break; |
851 | case GUARD_INTERVAL_1_16: value |= (1 << 5); break; | 856 | case GUARD_INTERVAL_1_16: value |= (1 << 5); break; |
852 | case GUARD_INTERVAL_1_4: value |= (3 << 5); break; | 857 | case GUARD_INTERVAL_1_4: value |= (3 << 5); break; |
853 | default: | 858 | default: |
854 | case GUARD_INTERVAL_1_8: value |= (2 << 5); break; | 859 | case GUARD_INTERVAL_1_8: value |= (2 << 5); break; |
855 | } | 860 | } |
856 | switch (ch->u.ofdm.constellation) { | 861 | switch (ch->modulation) { |
857 | case QPSK: value |= (0 << 3); break; | 862 | case QPSK: value |= (0 << 3); break; |
858 | case QAM_16: value |= (1 << 3); break; | 863 | case QAM_16: value |= (1 << 3); break; |
859 | default: | 864 | default: |
@@ -872,11 +877,11 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte | |||
872 | value = 0; | 877 | value = 0; |
873 | if (1 != 0) | 878 | if (1 != 0) |
874 | value |= (1 << 6); | 879 | value |= (1 << 6); |
875 | if (ch->u.ofdm.hierarchy_information == 1) | 880 | if (ch->hierarchy == 1) |
876 | value |= (1 << 4); | 881 | value |= (1 << 4); |
877 | if (1 == 1) | 882 | if (1 == 1) |
878 | value |= 1; | 883 | value |= 1; |
879 | switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) { | 884 | switch ((ch->hierarchy == 0 || 1 == 1) ? ch->code_rate_HP : ch->code_rate_LP) { |
880 | case FEC_2_3: value |= (2 << 1); break; | 885 | case FEC_2_3: value |= (2 << 1); break; |
881 | case FEC_3_4: value |= (3 << 1); break; | 886 | case FEC_3_4: value |= (3 << 1); break; |
882 | case FEC_5_6: value |= (5 << 1); break; | 887 | case FEC_5_6: value |= (5 << 1); break; |
@@ -901,13 +906,13 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte | |||
901 | dib7000m_write_word(state, 33, (0 << 4) | 0x5); | 906 | dib7000m_write_word(state, 33, (0 << 4) | 0x5); |
902 | 907 | ||
903 | /* P_dvsy_sync_wait */ | 908 | /* P_dvsy_sync_wait */ |
904 | switch (ch->u.ofdm.transmission_mode) { | 909 | switch (ch->transmission_mode) { |
905 | case TRANSMISSION_MODE_8K: value = 256; break; | 910 | case TRANSMISSION_MODE_8K: value = 256; break; |
906 | case TRANSMISSION_MODE_4K: value = 128; break; | 911 | case TRANSMISSION_MODE_4K: value = 128; break; |
907 | case TRANSMISSION_MODE_2K: | 912 | case TRANSMISSION_MODE_2K: |
908 | default: value = 64; break; | 913 | default: value = 64; break; |
909 | } | 914 | } |
910 | switch (ch->u.ofdm.guard_interval) { | 915 | switch (ch->guard_interval) { |
911 | case GUARD_INTERVAL_1_16: value *= 2; break; | 916 | case GUARD_INTERVAL_1_16: value *= 2; break; |
912 | case GUARD_INTERVAL_1_8: value *= 4; break; | 917 | case GUARD_INTERVAL_1_8: value *= 4; break; |
913 | case GUARD_INTERVAL_1_4: value *= 8; break; | 918 | case GUARD_INTERVAL_1_4: value *= 8; break; |
@@ -925,7 +930,7 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte | |||
925 | dib7000m_set_diversity_in(&state->demod, state->div_state); | 930 | dib7000m_set_diversity_in(&state->demod, state->div_state); |
926 | 931 | ||
927 | /* channel estimation fine configuration */ | 932 | /* channel estimation fine configuration */ |
928 | switch (ch->u.ofdm.constellation) { | 933 | switch (ch->modulation) { |
929 | case QAM_64: | 934 | case QAM_64: |
930 | est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ | 935 | est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ |
931 | est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ | 936 | est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ |
@@ -952,25 +957,26 @@ static void dib7000m_set_channel(struct dib7000m_state *state, struct dvb_fronte | |||
952 | dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD); | 957 | dib7000m_set_power_mode(state, DIB7000M_POWER_COR4_DINTLV_ICIRM_EQUAL_CFROD); |
953 | } | 958 | } |
954 | 959 | ||
955 | static int dib7000m_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 960 | static int dib7000m_autosearch_start(struct dvb_frontend *demod) |
956 | { | 961 | { |
962 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
957 | struct dib7000m_state *state = demod->demodulator_priv; | 963 | struct dib7000m_state *state = demod->demodulator_priv; |
958 | struct dvb_frontend_parameters schan; | 964 | struct dtv_frontend_properties schan; |
959 | int ret = 0; | 965 | int ret = 0; |
960 | u32 value, factor; | 966 | u32 value, factor; |
961 | 967 | ||
962 | schan = *ch; | 968 | schan = *ch; |
963 | 969 | ||
964 | schan.u.ofdm.constellation = QAM_64; | 970 | schan.modulation = QAM_64; |
965 | schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32; | 971 | schan.guard_interval = GUARD_INTERVAL_1_32; |
966 | schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; | 972 | schan.transmission_mode = TRANSMISSION_MODE_8K; |
967 | schan.u.ofdm.code_rate_HP = FEC_2_3; | 973 | schan.code_rate_HP = FEC_2_3; |
968 | schan.u.ofdm.code_rate_LP = FEC_3_4; | 974 | schan.code_rate_LP = FEC_3_4; |
969 | schan.u.ofdm.hierarchy_information = 0; | 975 | schan.hierarchy = 0; |
970 | 976 | ||
971 | dib7000m_set_channel(state, &schan, 7); | 977 | dib7000m_set_channel(state, &schan, 7); |
972 | 978 | ||
973 | factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth); | 979 | factor = BANDWIDTH_TO_KHZ(schan.bandwidth_hz); |
974 | if (factor >= 5000) | 980 | if (factor >= 5000) |
975 | factor = 1; | 981 | factor = 1; |
976 | else | 982 | else |
@@ -1027,8 +1033,9 @@ static int dib7000m_autosearch_is_irq(struct dvb_frontend *demod) | |||
1027 | return dib7000m_autosearch_irq(state, 537); | 1033 | return dib7000m_autosearch_irq(state, 537); |
1028 | } | 1034 | } |
1029 | 1035 | ||
1030 | static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 1036 | static int dib7000m_tune(struct dvb_frontend *demod) |
1031 | { | 1037 | { |
1038 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
1032 | struct dib7000m_state *state = demod->demodulator_priv; | 1039 | struct dib7000m_state *state = demod->demodulator_priv; |
1033 | int ret = 0; | 1040 | int ret = 0; |
1034 | u16 value; | 1041 | u16 value; |
@@ -1055,7 +1062,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1055 | //dump_reg(state); | 1062 | //dump_reg(state); |
1056 | /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ | 1063 | /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ |
1057 | value = (6 << 8) | 0x80; | 1064 | value = (6 << 8) | 0x80; |
1058 | switch (ch->u.ofdm.transmission_mode) { | 1065 | switch (ch->transmission_mode) { |
1059 | case TRANSMISSION_MODE_2K: value |= (7 << 12); break; | 1066 | case TRANSMISSION_MODE_2K: value |= (7 << 12); break; |
1060 | case TRANSMISSION_MODE_4K: value |= (8 << 12); break; | 1067 | case TRANSMISSION_MODE_4K: value |= (8 << 12); break; |
1061 | default: | 1068 | default: |
@@ -1065,7 +1072,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1065 | 1072 | ||
1066 | /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ | 1073 | /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ |
1067 | value = (0 << 4); | 1074 | value = (0 << 4); |
1068 | switch (ch->u.ofdm.transmission_mode) { | 1075 | switch (ch->transmission_mode) { |
1069 | case TRANSMISSION_MODE_2K: value |= 0x6; break; | 1076 | case TRANSMISSION_MODE_2K: value |= 0x6; break; |
1070 | case TRANSMISSION_MODE_4K: value |= 0x7; break; | 1077 | case TRANSMISSION_MODE_4K: value |= 0x7; break; |
1071 | default: | 1078 | default: |
@@ -1075,7 +1082,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1075 | 1082 | ||
1076 | /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ | 1083 | /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ |
1077 | value = (0 << 4); | 1084 | value = (0 << 4); |
1078 | switch (ch->u.ofdm.transmission_mode) { | 1085 | switch (ch->transmission_mode) { |
1079 | case TRANSMISSION_MODE_2K: value |= 0x6; break; | 1086 | case TRANSMISSION_MODE_2K: value |= 0x6; break; |
1080 | case TRANSMISSION_MODE_4K: value |= 0x7; break; | 1087 | case TRANSMISSION_MODE_4K: value |= 0x7; break; |
1081 | default: | 1088 | default: |
@@ -1087,7 +1094,7 @@ static int dib7000m_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1087 | if ((dib7000m_read_word(state, 535) >> 6) & 0x1) | 1094 | if ((dib7000m_read_word(state, 535) >> 6) & 0x1) |
1088 | dib7000m_update_timf(state); | 1095 | dib7000m_update_timf(state); |
1089 | 1096 | ||
1090 | dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); | 1097 | dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); |
1091 | return ret; | 1098 | return ret; |
1092 | } | 1099 | } |
1093 | 1100 | ||
@@ -1148,56 +1155,56 @@ static int dib7000m_identify(struct dib7000m_state *state) | |||
1148 | 1155 | ||
1149 | 1156 | ||
1150 | static int dib7000m_get_frontend(struct dvb_frontend* fe, | 1157 | static int dib7000m_get_frontend(struct dvb_frontend* fe, |
1151 | struct dvb_frontend_parameters *fep) | 1158 | struct dtv_frontend_properties *fep) |
1152 | { | 1159 | { |
1153 | struct dib7000m_state *state = fe->demodulator_priv; | 1160 | struct dib7000m_state *state = fe->demodulator_priv; |
1154 | u16 tps = dib7000m_read_word(state,480); | 1161 | u16 tps = dib7000m_read_word(state,480); |
1155 | 1162 | ||
1156 | fep->inversion = INVERSION_AUTO; | 1163 | fep->inversion = INVERSION_AUTO; |
1157 | 1164 | ||
1158 | fep->u.ofdm.bandwidth = state->current_bandwidth; | 1165 | fep->bandwidth_hz = BANDWIDTH_TO_HZ(state->current_bandwidth); |
1159 | 1166 | ||
1160 | switch ((tps >> 8) & 0x3) { | 1167 | switch ((tps >> 8) & 0x3) { |
1161 | case 0: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; break; | 1168 | case 0: fep->transmission_mode = TRANSMISSION_MODE_2K; break; |
1162 | case 1: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; break; | 1169 | case 1: fep->transmission_mode = TRANSMISSION_MODE_8K; break; |
1163 | /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */ | 1170 | /* case 2: fep->transmission_mode = TRANSMISSION_MODE_4K; break; */ |
1164 | } | 1171 | } |
1165 | 1172 | ||
1166 | switch (tps & 0x3) { | 1173 | switch (tps & 0x3) { |
1167 | case 0: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; break; | 1174 | case 0: fep->guard_interval = GUARD_INTERVAL_1_32; break; |
1168 | case 1: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; break; | 1175 | case 1: fep->guard_interval = GUARD_INTERVAL_1_16; break; |
1169 | case 2: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; break; | 1176 | case 2: fep->guard_interval = GUARD_INTERVAL_1_8; break; |
1170 | case 3: fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; break; | 1177 | case 3: fep->guard_interval = GUARD_INTERVAL_1_4; break; |
1171 | } | 1178 | } |
1172 | 1179 | ||
1173 | switch ((tps >> 14) & 0x3) { | 1180 | switch ((tps >> 14) & 0x3) { |
1174 | case 0: fep->u.ofdm.constellation = QPSK; break; | 1181 | case 0: fep->modulation = QPSK; break; |
1175 | case 1: fep->u.ofdm.constellation = QAM_16; break; | 1182 | case 1: fep->modulation = QAM_16; break; |
1176 | case 2: | 1183 | case 2: |
1177 | default: fep->u.ofdm.constellation = QAM_64; break; | 1184 | default: fep->modulation = QAM_64; break; |
1178 | } | 1185 | } |
1179 | 1186 | ||
1180 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ | 1187 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ |
1181 | /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */ | 1188 | /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */ |
1182 | 1189 | ||
1183 | fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; | 1190 | fep->hierarchy = HIERARCHY_NONE; |
1184 | switch ((tps >> 5) & 0x7) { | 1191 | switch ((tps >> 5) & 0x7) { |
1185 | case 1: fep->u.ofdm.code_rate_HP = FEC_1_2; break; | 1192 | case 1: fep->code_rate_HP = FEC_1_2; break; |
1186 | case 2: fep->u.ofdm.code_rate_HP = FEC_2_3; break; | 1193 | case 2: fep->code_rate_HP = FEC_2_3; break; |
1187 | case 3: fep->u.ofdm.code_rate_HP = FEC_3_4; break; | 1194 | case 3: fep->code_rate_HP = FEC_3_4; break; |
1188 | case 5: fep->u.ofdm.code_rate_HP = FEC_5_6; break; | 1195 | case 5: fep->code_rate_HP = FEC_5_6; break; |
1189 | case 7: | 1196 | case 7: |
1190 | default: fep->u.ofdm.code_rate_HP = FEC_7_8; break; | 1197 | default: fep->code_rate_HP = FEC_7_8; break; |
1191 | 1198 | ||
1192 | } | 1199 | } |
1193 | 1200 | ||
1194 | switch ((tps >> 2) & 0x7) { | 1201 | switch ((tps >> 2) & 0x7) { |
1195 | case 1: fep->u.ofdm.code_rate_LP = FEC_1_2; break; | 1202 | case 1: fep->code_rate_LP = FEC_1_2; break; |
1196 | case 2: fep->u.ofdm.code_rate_LP = FEC_2_3; break; | 1203 | case 2: fep->code_rate_LP = FEC_2_3; break; |
1197 | case 3: fep->u.ofdm.code_rate_LP = FEC_3_4; break; | 1204 | case 3: fep->code_rate_LP = FEC_3_4; break; |
1198 | case 5: fep->u.ofdm.code_rate_LP = FEC_5_6; break; | 1205 | case 5: fep->code_rate_LP = FEC_5_6; break; |
1199 | case 7: | 1206 | case 7: |
1200 | default: fep->u.ofdm.code_rate_LP = FEC_7_8; break; | 1207 | default: fep->code_rate_LP = FEC_7_8; break; |
1201 | } | 1208 | } |
1202 | 1209 | ||
1203 | /* native interleaver: (dib7000m_read_word(state, 481) >> 5) & 0x1 */ | 1210 | /* native interleaver: (dib7000m_read_word(state, 481) >> 5) & 0x1 */ |
@@ -1205,16 +1212,15 @@ static int dib7000m_get_frontend(struct dvb_frontend* fe, | |||
1205 | return 0; | 1212 | return 0; |
1206 | } | 1213 | } |
1207 | 1214 | ||
1208 | static int dib7000m_set_frontend(struct dvb_frontend* fe, | 1215 | static int dib7000m_set_frontend(struct dvb_frontend *fe) |
1209 | struct dvb_frontend_parameters *fep) | ||
1210 | { | 1216 | { |
1217 | struct dtv_frontend_properties *fep = &fe->dtv_property_cache, tmp; | ||
1211 | struct dib7000m_state *state = fe->demodulator_priv; | 1218 | struct dib7000m_state *state = fe->demodulator_priv; |
1212 | int time, ret; | 1219 | int time, ret; |
1213 | 1220 | ||
1214 | dib7000m_set_output_mode(state, OUTMODE_HIGH_Z); | 1221 | dib7000m_set_output_mode(state, OUTMODE_HIGH_Z); |
1215 | 1222 | ||
1216 | state->current_bandwidth = fep->u.ofdm.bandwidth; | 1223 | dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->bandwidth_hz)); |
1217 | dib7000m_set_bandwidth(state, BANDWIDTH_TO_KHZ(fep->u.ofdm.bandwidth)); | ||
1218 | 1224 | ||
1219 | if (fe->ops.tuner_ops.set_params) | 1225 | if (fe->ops.tuner_ops.set_params) |
1220 | fe->ops.tuner_ops.set_params(fe); | 1226 | fe->ops.tuner_ops.set_params(fe); |
@@ -1222,18 +1228,20 @@ static int dib7000m_set_frontend(struct dvb_frontend* fe, | |||
1222 | /* start up the AGC */ | 1228 | /* start up the AGC */ |
1223 | state->agc_state = 0; | 1229 | state->agc_state = 0; |
1224 | do { | 1230 | do { |
1225 | time = dib7000m_agc_startup(fe, fep); | 1231 | time = dib7000m_agc_startup(fe); |
1226 | if (time != -1) | 1232 | if (time != -1) |
1227 | msleep(time); | 1233 | msleep(time); |
1228 | } while (time != -1); | 1234 | } while (time != -1); |
1229 | 1235 | ||
1230 | if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || | 1236 | if (fep->transmission_mode == TRANSMISSION_MODE_AUTO || |
1231 | fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || | 1237 | fep->guard_interval == GUARD_INTERVAL_AUTO || |
1232 | fep->u.ofdm.constellation == QAM_AUTO || | 1238 | fep->modulation == QAM_AUTO || |
1233 | fep->u.ofdm.code_rate_HP == FEC_AUTO) { | 1239 | fep->code_rate_HP == FEC_AUTO) { |
1234 | int i = 800, found; | 1240 | int i = 800, found; |
1235 | 1241 | ||
1236 | dib7000m_autosearch_start(fe, fep); | 1242 | tmp = *fep; |
1243 | |||
1244 | dib7000m_autosearch_start(fe); | ||
1237 | do { | 1245 | do { |
1238 | msleep(1); | 1246 | msleep(1); |
1239 | found = dib7000m_autosearch_is_irq(fe); | 1247 | found = dib7000m_autosearch_is_irq(fe); |
@@ -1243,10 +1251,10 @@ static int dib7000m_set_frontend(struct dvb_frontend* fe, | |||
1243 | if (found == 0 || found == 1) | 1251 | if (found == 0 || found == 1) |
1244 | return 0; // no channel found | 1252 | return 0; // no channel found |
1245 | 1253 | ||
1246 | dib7000m_get_frontend(fe, fep); | 1254 | dib7000m_get_frontend(fe, &tmp); |
1247 | } | 1255 | } |
1248 | 1256 | ||
1249 | ret = dib7000m_tune(fe, fep); | 1257 | ret = dib7000m_tune(fe); |
1250 | 1258 | ||
1251 | /* make this a config parameter */ | 1259 | /* make this a config parameter */ |
1252 | dib7000m_set_output_mode(state, OUTMODE_MPEG2_FIFO); | 1260 | dib7000m_set_output_mode(state, OUTMODE_MPEG2_FIFO); |
@@ -1430,6 +1438,7 @@ error: | |||
1430 | EXPORT_SYMBOL(dib7000m_attach); | 1438 | EXPORT_SYMBOL(dib7000m_attach); |
1431 | 1439 | ||
1432 | static struct dvb_frontend_ops dib7000m_ops = { | 1440 | static struct dvb_frontend_ops dib7000m_ops = { |
1441 | .delsys = { SYS_DVBT }, | ||
1433 | .info = { | 1442 | .info = { |
1434 | .name = "DiBcom 7000MA/MB/PA/PB/MC", | 1443 | .name = "DiBcom 7000MA/MB/PA/PB/MC", |
1435 | .type = FE_OFDM, | 1444 | .type = FE_OFDM, |
@@ -1451,9 +1460,9 @@ static struct dvb_frontend_ops dib7000m_ops = { | |||
1451 | .init = dib7000m_wakeup, | 1460 | .init = dib7000m_wakeup, |
1452 | .sleep = dib7000m_sleep, | 1461 | .sleep = dib7000m_sleep, |
1453 | 1462 | ||
1454 | .set_frontend_legacy = dib7000m_set_frontend, | 1463 | .set_frontend = dib7000m_set_frontend, |
1455 | .get_tune_settings = dib7000m_fe_get_tune_settings, | 1464 | .get_tune_settings = dib7000m_fe_get_tune_settings, |
1456 | .get_frontend_legacy = dib7000m_get_frontend, | 1465 | .get_frontend = dib7000m_get_frontend, |
1457 | 1466 | ||
1458 | .read_status = dib7000m_read_status, | 1467 | .read_status = dib7000m_read_status, |
1459 | .read_ber = dib7000m_read_ber, | 1468 | .read_ber = dib7000m_read_ber, |
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c index feb82b025fd..c92c1a0d747 100644 --- a/drivers/media/dvb/frontends/dib7000p.c +++ b/drivers/media/dvb/frontends/dib7000p.c | |||
@@ -812,8 +812,9 @@ static void dib7000p_set_dds(struct dib7000p_state *state, s32 offset_khz) | |||
812 | } | 812 | } |
813 | } | 813 | } |
814 | 814 | ||
815 | static int dib7000p_agc_startup(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 815 | static int dib7000p_agc_startup(struct dvb_frontend *demod) |
816 | { | 816 | { |
817 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
817 | struct dib7000p_state *state = demod->demodulator_priv; | 818 | struct dib7000p_state *state = demod->demodulator_priv; |
818 | int ret = -1; | 819 | int ret = -1; |
819 | u8 *agc_state = &state->agc_state; | 820 | u8 *agc_state = &state->agc_state; |
@@ -936,15 +937,16 @@ u32 dib7000p_ctrl_timf(struct dvb_frontend *fe, u8 op, u32 timf) | |||
936 | } | 937 | } |
937 | EXPORT_SYMBOL(dib7000p_ctrl_timf); | 938 | EXPORT_SYMBOL(dib7000p_ctrl_timf); |
938 | 939 | ||
939 | static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_frontend_parameters *ch, u8 seq) | 940 | static void dib7000p_set_channel(struct dib7000p_state *state, |
941 | struct dtv_frontend_properties *ch, u8 seq) | ||
940 | { | 942 | { |
941 | u16 value, est[4]; | 943 | u16 value, est[4]; |
942 | 944 | ||
943 | dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); | 945 | dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); |
944 | 946 | ||
945 | /* nfft, guard, qam, alpha */ | 947 | /* nfft, guard, qam, alpha */ |
946 | value = 0; | 948 | value = 0; |
947 | switch (ch->u.ofdm.transmission_mode) { | 949 | switch (ch->transmission_mode) { |
948 | case TRANSMISSION_MODE_2K: | 950 | case TRANSMISSION_MODE_2K: |
949 | value |= (0 << 7); | 951 | value |= (0 << 7); |
950 | break; | 952 | break; |
@@ -956,7 +958,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
956 | value |= (1 << 7); | 958 | value |= (1 << 7); |
957 | break; | 959 | break; |
958 | } | 960 | } |
959 | switch (ch->u.ofdm.guard_interval) { | 961 | switch (ch->guard_interval) { |
960 | case GUARD_INTERVAL_1_32: | 962 | case GUARD_INTERVAL_1_32: |
961 | value |= (0 << 5); | 963 | value |= (0 << 5); |
962 | break; | 964 | break; |
@@ -971,7 +973,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
971 | value |= (2 << 5); | 973 | value |= (2 << 5); |
972 | break; | 974 | break; |
973 | } | 975 | } |
974 | switch (ch->u.ofdm.constellation) { | 976 | switch (ch->modulation) { |
975 | case QPSK: | 977 | case QPSK: |
976 | value |= (0 << 3); | 978 | value |= (0 << 3); |
977 | break; | 979 | break; |
@@ -1002,11 +1004,11 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
1002 | value = 0; | 1004 | value = 0; |
1003 | if (1 != 0) | 1005 | if (1 != 0) |
1004 | value |= (1 << 6); | 1006 | value |= (1 << 6); |
1005 | if (ch->u.ofdm.hierarchy_information == 1) | 1007 | if (ch->hierarchy == 1) |
1006 | value |= (1 << 4); | 1008 | value |= (1 << 4); |
1007 | if (1 == 1) | 1009 | if (1 == 1) |
1008 | value |= 1; | 1010 | value |= 1; |
1009 | switch ((ch->u.ofdm.hierarchy_information == 0 || 1 == 1) ? ch->u.ofdm.code_rate_HP : ch->u.ofdm.code_rate_LP) { | 1011 | switch ((ch->hierarchy == 0 || 1 == 1) ? ch->code_rate_HP : ch->code_rate_LP) { |
1010 | case FEC_2_3: | 1012 | case FEC_2_3: |
1011 | value |= (2 << 1); | 1013 | value |= (2 << 1); |
1012 | break; | 1014 | break; |
@@ -1033,7 +1035,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
1033 | dib7000p_write_word(state, 33, 0x0005); | 1035 | dib7000p_write_word(state, 33, 0x0005); |
1034 | 1036 | ||
1035 | /* P_dvsy_sync_wait */ | 1037 | /* P_dvsy_sync_wait */ |
1036 | switch (ch->u.ofdm.transmission_mode) { | 1038 | switch (ch->transmission_mode) { |
1037 | case TRANSMISSION_MODE_8K: | 1039 | case TRANSMISSION_MODE_8K: |
1038 | value = 256; | 1040 | value = 256; |
1039 | break; | 1041 | break; |
@@ -1045,7 +1047,7 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
1045 | value = 64; | 1047 | value = 64; |
1046 | break; | 1048 | break; |
1047 | } | 1049 | } |
1048 | switch (ch->u.ofdm.guard_interval) { | 1050 | switch (ch->guard_interval) { |
1049 | case GUARD_INTERVAL_1_16: | 1051 | case GUARD_INTERVAL_1_16: |
1050 | value *= 2; | 1052 | value *= 2; |
1051 | break; | 1053 | break; |
@@ -1066,11 +1068,11 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
1066 | state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; | 1068 | state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; |
1067 | 1069 | ||
1068 | /* deactive the possibility of diversity reception if extended interleaver */ | 1070 | /* deactive the possibility of diversity reception if extended interleaver */ |
1069 | state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K; | 1071 | state->div_force_off = !1 && ch->transmission_mode != TRANSMISSION_MODE_8K; |
1070 | dib7000p_set_diversity_in(&state->demod, state->div_state); | 1072 | dib7000p_set_diversity_in(&state->demod, state->div_state); |
1071 | 1073 | ||
1072 | /* channel estimation fine configuration */ | 1074 | /* channel estimation fine configuration */ |
1073 | switch (ch->u.ofdm.constellation) { | 1075 | switch (ch->modulation) { |
1074 | case QAM_64: | 1076 | case QAM_64: |
1075 | est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ | 1077 | est[0] = 0x0148; /* P_adp_regul_cnt 0.04 */ |
1076 | est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ | 1078 | est[1] = 0xfff0; /* P_adp_noise_cnt -0.002 */ |
@@ -1094,24 +1096,25 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte | |||
1094 | dib7000p_write_word(state, 187 + value, est[value]); | 1096 | dib7000p_write_word(state, 187 + value, est[value]); |
1095 | } | 1097 | } |
1096 | 1098 | ||
1097 | static int dib7000p_autosearch_start(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 1099 | static int dib7000p_autosearch_start(struct dvb_frontend *demod) |
1098 | { | 1100 | { |
1101 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
1099 | struct dib7000p_state *state = demod->demodulator_priv; | 1102 | struct dib7000p_state *state = demod->demodulator_priv; |
1100 | struct dvb_frontend_parameters schan; | 1103 | struct dtv_frontend_properties schan; |
1101 | u32 value, factor; | 1104 | u32 value, factor; |
1102 | u32 internal = dib7000p_get_internal_freq(state); | 1105 | u32 internal = dib7000p_get_internal_freq(state); |
1103 | 1106 | ||
1104 | schan = *ch; | 1107 | schan = *ch; |
1105 | schan.u.ofdm.constellation = QAM_64; | 1108 | schan.modulation = QAM_64; |
1106 | schan.u.ofdm.guard_interval = GUARD_INTERVAL_1_32; | 1109 | schan.guard_interval = GUARD_INTERVAL_1_32; |
1107 | schan.u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; | 1110 | schan.transmission_mode = TRANSMISSION_MODE_8K; |
1108 | schan.u.ofdm.code_rate_HP = FEC_2_3; | 1111 | schan.code_rate_HP = FEC_2_3; |
1109 | schan.u.ofdm.code_rate_LP = FEC_3_4; | 1112 | schan.code_rate_LP = FEC_3_4; |
1110 | schan.u.ofdm.hierarchy_information = 0; | 1113 | schan.hierarchy = 0; |
1111 | 1114 | ||
1112 | dib7000p_set_channel(state, &schan, 7); | 1115 | dib7000p_set_channel(state, &schan, 7); |
1113 | 1116 | ||
1114 | factor = BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth); | 1117 | factor = BANDWIDTH_TO_KHZ(ch->bandwidth_hz); |
1115 | if (factor >= 5000) { | 1118 | if (factor >= 5000) { |
1116 | if (state->version == SOC7090) | 1119 | if (state->version == SOC7090) |
1117 | factor = 2; | 1120 | factor = 2; |
@@ -1240,8 +1243,9 @@ static void dib7000p_spur_protect(struct dib7000p_state *state, u32 rf_khz, u32 | |||
1240 | dib7000p_write_word(state, 143, 0); | 1243 | dib7000p_write_word(state, 143, 0); |
1241 | } | 1244 | } |
1242 | 1245 | ||
1243 | static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_parameters *ch) | 1246 | static int dib7000p_tune(struct dvb_frontend *demod) |
1244 | { | 1247 | { |
1248 | struct dtv_frontend_properties *ch = &demod->dtv_property_cache; | ||
1245 | struct dib7000p_state *state = demod->demodulator_priv; | 1249 | struct dib7000p_state *state = demod->demodulator_priv; |
1246 | u16 tmp = 0; | 1250 | u16 tmp = 0; |
1247 | 1251 | ||
@@ -1274,7 +1278,7 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1274 | 1278 | ||
1275 | /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ | 1279 | /* P_timf_alpha, P_corm_alpha=6, P_corm_thres=0x80 */ |
1276 | tmp = (6 << 8) | 0x80; | 1280 | tmp = (6 << 8) | 0x80; |
1277 | switch (ch->u.ofdm.transmission_mode) { | 1281 | switch (ch->transmission_mode) { |
1278 | case TRANSMISSION_MODE_2K: | 1282 | case TRANSMISSION_MODE_2K: |
1279 | tmp |= (2 << 12); | 1283 | tmp |= (2 << 12); |
1280 | break; | 1284 | break; |
@@ -1290,7 +1294,7 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1290 | 1294 | ||
1291 | /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ | 1295 | /* P_ctrl_freeze_pha_shift=0, P_ctrl_pha_off_max */ |
1292 | tmp = (0 << 4); | 1296 | tmp = (0 << 4); |
1293 | switch (ch->u.ofdm.transmission_mode) { | 1297 | switch (ch->transmission_mode) { |
1294 | case TRANSMISSION_MODE_2K: | 1298 | case TRANSMISSION_MODE_2K: |
1295 | tmp |= 0x6; | 1299 | tmp |= 0x6; |
1296 | break; | 1300 | break; |
@@ -1306,7 +1310,7 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1306 | 1310 | ||
1307 | /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ | 1311 | /* P_ctrl_sfreq_inh=0, P_ctrl_sfreq_step */ |
1308 | tmp = (0 << 4); | 1312 | tmp = (0 << 4); |
1309 | switch (ch->u.ofdm.transmission_mode) { | 1313 | switch (ch->transmission_mode) { |
1310 | case TRANSMISSION_MODE_2K: | 1314 | case TRANSMISSION_MODE_2K: |
1311 | tmp |= 0x6; | 1315 | tmp |= 0x6; |
1312 | break; | 1316 | break; |
@@ -1338,9 +1342,9 @@ static int dib7000p_tune(struct dvb_frontend *demod, struct dvb_frontend_paramet | |||
1338 | } | 1342 | } |
1339 | 1343 | ||
1340 | if (state->cfg.spur_protect) | 1344 | if (state->cfg.spur_protect) |
1341 | dib7000p_spur_protect(state, ch->frequency / 1000, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); | 1345 | dib7000p_spur_protect(state, ch->frequency / 1000, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); |
1342 | 1346 | ||
1343 | dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->u.ofdm.bandwidth)); | 1347 | dib7000p_set_bandwidth(state, BANDWIDTH_TO_KHZ(ch->bandwidth_hz)); |
1344 | return 0; | 1348 | return 0; |
1345 | } | 1349 | } |
1346 | 1350 | ||
@@ -1380,93 +1384,94 @@ static int dib7000p_identify(struct dib7000p_state *st) | |||
1380 | return 0; | 1384 | return 0; |
1381 | } | 1385 | } |
1382 | 1386 | ||
1383 | static int dib7000p_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) | 1387 | static int dib7000p_get_frontend(struct dvb_frontend *fe, |
1388 | struct dtv_frontend_properties *fep) | ||
1384 | { | 1389 | { |
1385 | struct dib7000p_state *state = fe->demodulator_priv; | 1390 | struct dib7000p_state *state = fe->demodulator_priv; |
1386 | u16 tps = dib7000p_read_word(state, 463); | 1391 | u16 tps = dib7000p_read_word(state, 463); |
1387 | 1392 | ||
1388 | fep->inversion = INVERSION_AUTO; | 1393 | fep->inversion = INVERSION_AUTO; |
1389 | 1394 | ||
1390 | fep->u.ofdm.bandwidth = BANDWIDTH_TO_INDEX(state->current_bandwidth); | 1395 | fep->bandwidth_hz = BANDWIDTH_TO_HZ(state->current_bandwidth); |
1391 | 1396 | ||
1392 | switch ((tps >> 8) & 0x3) { | 1397 | switch ((tps >> 8) & 0x3) { |
1393 | case 0: | 1398 | case 0: |
1394 | fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K; | 1399 | fep->transmission_mode = TRANSMISSION_MODE_2K; |
1395 | break; | 1400 | break; |
1396 | case 1: | 1401 | case 1: |
1397 | fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K; | 1402 | fep->transmission_mode = TRANSMISSION_MODE_8K; |
1398 | break; | 1403 | break; |
1399 | /* case 2: fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_4K; break; */ | 1404 | /* case 2: fep->transmission_mode = TRANSMISSION_MODE_4K; break; */ |
1400 | } | 1405 | } |
1401 | 1406 | ||
1402 | switch (tps & 0x3) { | 1407 | switch (tps & 0x3) { |
1403 | case 0: | 1408 | case 0: |
1404 | fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32; | 1409 | fep->guard_interval = GUARD_INTERVAL_1_32; |
1405 | break; | 1410 | break; |
1406 | case 1: | 1411 | case 1: |
1407 | fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16; | 1412 | fep->guard_interval = GUARD_INTERVAL_1_16; |
1408 | break; | 1413 | break; |
1409 | case 2: | 1414 | case 2: |
1410 | fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8; | 1415 | fep->guard_interval = GUARD_INTERVAL_1_8; |
1411 | break; | 1416 | break; |
1412 | case 3: | 1417 | case 3: |
1413 | fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4; | 1418 | fep->guard_interval = GUARD_INTERVAL_1_4; |
1414 | break; | 1419 | break; |
1415 | } | 1420 | } |
1416 | 1421 | ||
1417 | switch ((tps >> 14) & 0x3) { | 1422 | switch ((tps >> 14) & 0x3) { |
1418 | case 0: | 1423 | case 0: |
1419 | fep->u.ofdm.constellation = QPSK; | 1424 | fep->modulation = QPSK; |
1420 | break; | 1425 | break; |
1421 | case 1: | 1426 | case 1: |
1422 | fep->u.ofdm.constellation = QAM_16; | 1427 | fep->modulation = QAM_16; |
1423 | break; | 1428 | break; |
1424 | case 2: | 1429 | case 2: |
1425 | default: | 1430 | default: |
1426 | fep->u.ofdm.constellation = QAM_64; | 1431 | fep->modulation = QAM_64; |
1427 | break; | 1432 | break; |
1428 | } | 1433 | } |
1429 | 1434 | ||
1430 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ | 1435 | /* as long as the frontend_param structure is fixed for hierarchical transmission I refuse to use it */ |
1431 | /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */ | 1436 | /* (tps >> 13) & 0x1 == hrch is used, (tps >> 10) & 0x7 == alpha */ |
1432 | 1437 | ||
1433 | fep->u.ofdm.hierarchy_information = HIERARCHY_NONE; | 1438 | fep->hierarchy = HIERARCHY_NONE; |
1434 | switch ((tps >> 5) & 0x7) { | 1439 | switch ((tps >> 5) & 0x7) { |
1435 | case 1: | 1440 | case 1: |
1436 | fep->u.ofdm.code_rate_HP = FEC_1_2; | 1441 | fep->code_rate_HP = FEC_1_2; |
1437 | break; | 1442 | break; |
1438 | case 2: | 1443 | case 2: |
1439 | fep->u.ofdm.code_rate_HP = FEC_2_3; | 1444 | fep->code_rate_HP = FEC_2_3; |
1440 | break; | 1445 | break; |
1441 | case 3: | 1446 | case 3: |
1442 | fep->u.ofdm.code_rate_HP = FEC_3_4; | 1447 | fep->code_rate_HP = FEC_3_4; |
1443 | break; | 1448 | break; |
1444 | case 5: | 1449 | case 5: |
1445 | fep->u.ofdm.code_rate_HP = FEC_5_6; | 1450 | fep->code_rate_HP = FEC_5_6; |
1446 | break; | 1451 | break; |
1447 | case 7: | 1452 | case 7: |
1448 | default: | 1453 | default: |
1449 | fep->u.ofdm.code_rate_HP = FEC_7_8; | 1454 | fep->code_rate_HP = FEC_7_8; |
1450 | break; | 1455 | break; |
1451 | 1456 | ||
1452 | } | 1457 | } |
1453 | 1458 | ||
1454 | switch ((tps >> 2) & 0x7) { | 1459 | switch ((tps >> 2) & 0x7) { |
1455 | case 1: | 1460 | case 1: |
1456 | fep->u.ofdm.code_rate_LP = FEC_1_2; | 1461 | fep->code_rate_LP = FEC_1_2; |
1457 | break; | 1462 | break; |
1458 | case 2: | 1463 | case 2: |
1459 | fep->u.ofdm.code_rate_LP = FEC_2_3; | 1464 | fep->code_rate_LP = FEC_2_3; |
1460 | break; | 1465 | break; |
1461 | case 3: | 1466 | case 3: |
1462 | fep->u.ofdm.code_rate_LP = FEC_3_4; | 1467 | fep->code_rate_LP = FEC_3_4; |
1463 | break; | 1468 | break; |
1464 | case 5: | 1469 | case 5: |
1465 | fep->u.ofdm.code_rate_LP = FEC_5_6; | 1470 | fep->code_rate_LP = FEC_5_6; |
1466 | break; | 1471 | break; |
1467 | case 7: | 1472 | case 7: |
1468 | default: | 1473 | default: |
1469 | fep->u.ofdm.code_rate_LP = FEC_7_8; | 1474 | fep->code_rate_LP = FEC_7_8; |
1470 | break; | 1475 | break; |
1471 | } | 1476 | } |
1472 | 1477 | ||
@@ -1475,8 +1480,9 @@ static int dib7000p_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_pa | |||
1475 | return 0; | 1480 | return 0; |
1476 | } | 1481 | } |
1477 | 1482 | ||
1478 | static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *fep) | 1483 | static int dib7000p_set_frontend(struct dvb_frontend *fe) |
1479 | { | 1484 | { |
1485 | struct dtv_frontend_properties *fep = &fe->dtv_property_cache, tmp; | ||
1480 | struct dib7000p_state *state = fe->demodulator_priv; | 1486 | struct dib7000p_state *state = fe->demodulator_priv; |
1481 | int time, ret; | 1487 | int time, ret; |
1482 | 1488 | ||
@@ -1494,16 +1500,17 @@ static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_pa | |||
1494 | /* start up the AGC */ | 1500 | /* start up the AGC */ |
1495 | state->agc_state = 0; | 1501 | state->agc_state = 0; |
1496 | do { | 1502 | do { |
1497 | time = dib7000p_agc_startup(fe, fep); | 1503 | time = dib7000p_agc_startup(fe); |
1498 | if (time != -1) | 1504 | if (time != -1) |
1499 | msleep(time); | 1505 | msleep(time); |
1500 | } while (time != -1); | 1506 | } while (time != -1); |
1501 | 1507 | ||
1502 | if (fep->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO || | 1508 | if (fep->transmission_mode == TRANSMISSION_MODE_AUTO || |
1503 | fep->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO || fep->u.ofdm.constellation == QAM_AUTO || fep->u.ofdm.code_rate_HP == FEC_AUTO) { | 1509 | fep->guard_interval == GUARD_INTERVAL_AUTO || fep->modulation == QAM_AUTO || fep->code_rate_HP == FEC_AUTO) { |
1504 | int i = 800, found; | 1510 | int i = 800, found; |
1505 | 1511 | ||
1506 | dib7000p_autosearch_start(fe, fep); | 1512 | tmp = *fep; |
1513 | dib7000p_autosearch_start(fe); | ||
1507 | do { | 1514 | do { |
1508 | msleep(1); | 1515 | msleep(1); |
1509 | found = dib7000p_autosearch_is_irq(fe); | 1516 | found = dib7000p_autosearch_is_irq(fe); |
@@ -1513,10 +1520,10 @@ static int dib7000p_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_pa | |||
1513 | if (found == 0 || found == 1) | 1520 | if (found == 0 || found == 1) |
1514 | return 0; | 1521 | return 0; |
1515 | 1522 | ||
1516 | dib7000p_get_frontend(fe, fep); | 1523 | dib7000p_get_frontend(fe, &tmp); |
1517 | } | 1524 | } |
1518 | 1525 | ||
1519 | ret = dib7000p_tune(fe, fep); | 1526 | ret = dib7000p_tune(fe); |
1520 | 1527 | ||
1521 | /* make this a config parameter */ | 1528 | /* make this a config parameter */ |
1522 | if (state->version == SOC7090) { | 1529 | if (state->version == SOC7090) { |
@@ -2421,6 +2428,7 @@ error: | |||
2421 | EXPORT_SYMBOL(dib7000p_attach); | 2428 | EXPORT_SYMBOL(dib7000p_attach); |
2422 | 2429 | ||
2423 | static struct dvb_frontend_ops dib7000p_ops = { | 2430 | static struct dvb_frontend_ops dib7000p_ops = { |
2431 | .delsys = { SYS_DVBT }, | ||
2424 | .info = { | 2432 | .info = { |
2425 | .name = "DiBcom 7000PC", | 2433 | .name = "DiBcom 7000PC", |
2426 | .type = FE_OFDM, | 2434 | .type = FE_OFDM, |
@@ -2439,9 +2447,9 @@ static struct dvb_frontend_ops dib7000p_ops = { | |||
2439 | .init = dib7000p_wakeup, | 2447 | .init = dib7000p_wakeup, |
2440 | .sleep = dib7000p_sleep, | 2448 | .sleep = dib7000p_sleep, |
2441 | 2449 | ||
2442 | .set_frontend_legacy = dib7000p_set_frontend, | 2450 | .set_frontend = dib7000p_set_frontend, |
2443 | .get_tune_settings = dib7000p_fe_get_tune_settings, | 2451 | .get_tune_settings = dib7000p_fe_get_tune_settings, |
2444 | .get_frontend_legacy = dib7000p_get_frontend, | 2452 | .get_frontend = dib7000p_get_frontend, |
2445 | 2453 | ||
2446 | .read_status = dib7000p_read_status, | 2454 | .read_status = dib7000p_read_status, |
2447 | .read_ber = dib7000p_read_ber, | 2455 | .read_ber = dib7000p_read_ber, |
diff --git a/drivers/media/dvb/frontends/dibx000_common.h b/drivers/media/dvb/frontends/dibx000_common.h index 02e6431e735..5f484881d7b 100644 --- a/drivers/media/dvb/frontends/dibx000_common.h +++ b/drivers/media/dvb/frontends/dibx000_common.h | |||
@@ -146,14 +146,8 @@ enum dibx000_adc_states { | |||
146 | DIBX000_VBG_DISABLE, | 146 | DIBX000_VBG_DISABLE, |
147 | }; | 147 | }; |
148 | 148 | ||
149 | #define BANDWIDTH_TO_KHZ(v) ((v) == BANDWIDTH_8_MHZ ? 8000 : \ | 149 | #define BANDWIDTH_TO_KHZ(v) ((v) / 1000) |
150 | (v) == BANDWIDTH_7_MHZ ? 7000 : \ | 150 | #define BANDWIDTH_TO_HZ(v) ((v) * 1000) |
151 | (v) == BANDWIDTH_6_MHZ ? 6000 : 8000) | ||
152 | |||
153 | #define BANDWIDTH_TO_INDEX(v) ( \ | ||
154 | (v) == 8000 ? BANDWIDTH_8_MHZ : \ | ||
155 | (v) == 7000 ? BANDWIDTH_7_MHZ : \ | ||
156 | (v) == 6000 ? BANDWIDTH_6_MHZ : BANDWIDTH_8_MHZ ) | ||
157 | 151 | ||
158 | /* Chip output mode. */ | 152 | /* Chip output mode. */ |
159 | #define OUTMODE_HIGH_Z 0 | 153 | #define OUTMODE_HIGH_Z 0 |