diff options
| author | Rafał Miłecki <zajec5@gmail.com> | 2011-07-16 12:43:36 -0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-07-19 17:03:08 -0400 |
| commit | bb932ad9805029af18232ffe5603fbc68e1c1fb6 (patch) | |
| tree | 617b1abbfb00f517aa749b157cca642f30a6c433 | |
| parent | 2729df25550f041940f23c11ee8252094a6bd44b (diff) | |
bcma: move define of BCMA_CLKCTLST register
Recent experiments have shown many cores share 0x1E0 register used for
clock management.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
| -rw-r--r-- | include/linux/bcma/bcma_driver_chipcommon.h | 10 | ||||
| -rw-r--r-- | include/linux/bcma/bcma_regs.h | 19 |
2 files changed, 20 insertions, 9 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h index 68c3d941a21..a0f684615ae 100644 --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h | |||
| @@ -179,15 +179,7 @@ | |||
| 179 | #define BCMA_CC_PROG_WAITCNT 0x0124 | 179 | #define BCMA_CC_PROG_WAITCNT 0x0124 |
| 180 | #define BCMA_CC_FLASH_CFG 0x0128 | 180 | #define BCMA_CC_FLASH_CFG 0x0128 |
| 181 | #define BCMA_CC_FLASH_WAITCNT 0x012C | 181 | #define BCMA_CC_FLASH_WAITCNT 0x012C |
| 182 | #define BCMA_CC_CLKCTLST 0x01E0 /* Clock control and status (rev >= 20) */ | 182 | /* 0x1E0 is defined as shared BCMA_CLKCTLST */ |
| 183 | #define BCMA_CC_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */ | ||
| 184 | #define BCMA_CC_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */ | ||
| 185 | #define BCMA_CC_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */ | ||
| 186 | #define BCMA_CC_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */ | ||
| 187 | #define BCMA_CC_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */ | ||
| 188 | #define BCMA_CC_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */ | ||
| 189 | #define BCMA_CC_CLKCTLST_HAVEHT 0x00010000 /* HT available */ | ||
| 190 | #define BCMA_CC_CLKCTLST_HAVEALP 0x00020000 /* APL available */ | ||
| 191 | #define BCMA_CC_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */ | 183 | #define BCMA_CC_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */ |
| 192 | #define BCMA_CC_UART0_DATA 0x0300 | 184 | #define BCMA_CC_UART0_DATA 0x0300 |
| 193 | #define BCMA_CC_UART0_IMR 0x0304 | 185 | #define BCMA_CC_UART0_IMR 0x0304 |
diff --git a/include/linux/bcma/bcma_regs.h b/include/linux/bcma/bcma_regs.h index 889219535a8..9faae2ae02e 100644 --- a/include/linux/bcma/bcma_regs.h +++ b/include/linux/bcma/bcma_regs.h | |||
| @@ -1,6 +1,25 @@ | |||
| 1 | #ifndef LINUX_BCMA_REGS_H_ | 1 | #ifndef LINUX_BCMA_REGS_H_ |
| 2 | #define LINUX_BCMA_REGS_H_ | 2 | #define LINUX_BCMA_REGS_H_ |
| 3 | 3 | ||
| 4 | /* Some single registers are shared between many cores */ | ||
| 5 | /* BCMA_CLKCTLST: ChipCommon (rev >= 20), PCIe, 80211 */ | ||
| 6 | #define BCMA_CLKCTLST 0x01E0 /* Clock control and status */ | ||
| 7 | #define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */ | ||
| 8 | #define BCMA_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */ | ||
| 9 | #define BCMA_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */ | ||
| 10 | #define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */ | ||
| 11 | #define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */ | ||
| 12 | #define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */ | ||
| 13 | #define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */ | ||
| 14 | #define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */ | ||
| 15 | #define BCMA_CLKCTLST_HAVEHT 0x00020000 /* HT available */ | ||
| 16 | #define BCMA_CLKCTLST_BP_ON_ALP 0x00040000 /* RO: running on ALP clock */ | ||
| 17 | #define BCMA_CLKCTLST_BP_ON_HT 0x00080000 /* RO: running on HT clock */ | ||
| 18 | #define BCMA_CLKCTLST_EXTRESST 0x07000000 /* Mask of external resource status */ | ||
| 19 | /* Is there any BCM4328 on BCMA bus? */ | ||
| 20 | #define BCMA_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */ | ||
| 21 | #define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */ | ||
| 22 | |||
| 4 | /* Agent registers (common for every core) */ | 23 | /* Agent registers (common for every core) */ |
| 5 | #define BCMA_IOCTL 0x0408 /* IO control */ | 24 | #define BCMA_IOCTL 0x0408 /* IO control */ |
| 6 | #define BCMA_IOCTL_CLK 0x0001 | 25 | #define BCMA_IOCTL_CLK 0x0001 |