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author | Krzysztof Hałasa <khc@pm.waw.pl> | 2012-09-01 18:50:39 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2012-11-21 22:36:38 -0500 |
commit | b7b23db72f9a79e6ed0bcfb75d73b29f8e03fe62 (patch) | |
tree | e521da8384bf4afdbd23e78dd8b3778e2b17c05f | |
parent | f0cdb153292635203b3a0921c901dacf85d4ef1b (diff) |
IXP4xx: map CPU config registers within VMALLOC region.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
-rw-r--r-- | arch/arm/mach-ixp4xx/common.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/debug-macro.S | 4 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | 47 |
3 files changed, 21 insertions, 38 deletions
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index acc0584377f..8c0c0e2d072 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -73,14 +73,6 @@ static struct map_desc ixp4xx_io_desc[] __initdata = { | |||
73 | .length = IXP4XX_QMGR_REGION_SIZE, | 73 | .length = IXP4XX_QMGR_REGION_SIZE, |
74 | .type = MT_DEVICE | 74 | .type = MT_DEVICE |
75 | }, | 75 | }, |
76 | #ifdef CONFIG_DEBUG_LL | ||
77 | { /* Debug UART mapping */ | ||
78 | .virtual = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT, | ||
79 | .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS), | ||
80 | .length = IXP4XX_DEBUG_UART_REGION_SIZE, | ||
81 | .type = MT_DEVICE | ||
82 | } | ||
83 | #endif | ||
84 | }; | 76 | }; |
85 | 77 | ||
86 | void __init ixp4xx_map_io(void) | 78 | void __init ixp4xx_map_io(void) |
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S index 8c9f8d56449..ff686cbc5df 100644 --- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S | |||
@@ -17,8 +17,8 @@ | |||
17 | #else | 17 | #else |
18 | mov \rp, #0 | 18 | mov \rp, #0 |
19 | #endif | 19 | #endif |
20 | orr \rv, \rp, #0xff000000 @ virtual | 20 | orr \rv, \rp, #0xfe000000 @ virtual |
21 | orr \rv, \rv, #0x00b00000 | 21 | orr \rv, \rv, #0x00f00000 |
22 | orr \rp, \rp, #0xc8000000 @ physical | 22 | orr \rp, \rp, #0xc8000000 @ physical |
23 | .endm | 23 | .endm |
24 | 24 | ||
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h index a24a8fe7660..c5bae9c035d 100644 --- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h +++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | |||
@@ -30,52 +30,43 @@ | |||
30 | * | 30 | * |
31 | * 0x50000000 0x10000000 ioremap'd EXP BUS | 31 | * 0x50000000 0x10000000 ioremap'd EXP BUS |
32 | * | 32 | * |
33 | * 0x60000000 0x00004000 0xffbe7000 QMgr | 33 | * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals |
34 | * | 34 | * |
35 | * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals | 35 | * 0xC0000000 0x00001000 0xFEF13000 PCI CFG |
36 | * | 36 | * |
37 | * 0xC4000000 0x00001000 0xffbfe000 EXP CFG | 37 | * 0xC4000000 0x00001000 0xFEF14000 EXP CFG |
38 | * | 38 | * |
39 | * 0xC0000000 0x00001000 0xffbff000 PCI CFG | 39 | * 0x60000000 0x00004000 0xFEF15000 QMgr |
40 | */ | 40 | */ |
41 | 41 | ||
42 | /* | 42 | /* |
43 | * Queue Manager | 43 | * Queue Manager |
44 | */ | 44 | */ |
45 | #define IXP4XX_QMGR_BASE_PHYS (0x60000000) | 45 | #define IXP4XX_QMGR_BASE_PHYS 0x60000000 |
46 | #define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFFBE7000) | 46 | #define IXP4XX_QMGR_BASE_VIRT IOMEM(0xFEF15000) |
47 | #define IXP4XX_QMGR_REGION_SIZE (0x00004000) | 47 | #define IXP4XX_QMGR_REGION_SIZE 0x00004000 |
48 | 48 | ||
49 | /* | 49 | /* |
50 | * Expansion BUS Configuration registers | 50 | * Peripheral space, including debug UART. Must be section-aligned so that |
51 | * it can be used with the low-level debug code. | ||
51 | */ | 52 | */ |
52 | #define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) | 53 | #define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000 |
53 | #define IXP4XX_EXP_CFG_BASE_VIRT IOMEM(0xFFBFE000) | 54 | #define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000) |
54 | #define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) | 55 | #define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000 |
55 | 56 | ||
56 | /* | 57 | /* |
57 | * PCI Config registers | 58 | * PCI Config registers |
58 | */ | 59 | */ |
59 | #define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) | 60 | #define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000 |
60 | #define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFFBFF000) | 61 | #define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000) |
61 | #define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) | 62 | #define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000 |
62 | |||
63 | /* | ||
64 | * Peripheral space | ||
65 | */ | ||
66 | #define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) | ||
67 | #define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFFBEB000) | ||
68 | #define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) | ||
69 | 63 | ||
70 | /* | 64 | /* |
71 | * Debug UART | 65 | * Expansion BUS Configuration registers |
72 | * | ||
73 | * This is basically a remap of UART1 into a region that is section | ||
74 | * aligned so that it * can be used with the low-level debug code. | ||
75 | */ | 66 | */ |
76 | #define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) | 67 | #define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000 |
77 | #define IXP4XX_DEBUG_UART_BASE_VIRT IOMEM(0xffb00000) | 68 | #define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000 |
78 | #define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) | 69 | #define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000 |
79 | 70 | ||
80 | #define IXP4XX_EXP_CS0_OFFSET 0x00 | 71 | #define IXP4XX_EXP_CS0_OFFSET 0x00 |
81 | #define IXP4XX_EXP_CS1_OFFSET 0x04 | 72 | #define IXP4XX_EXP_CS1_OFFSET 0x04 |