spi/pl022: add PrimeCell generic DMA support

This extends the PL022 SSP/SPI driver with generic DMA engine
support using the PrimeCell DMA engine interface. Also fix up the
test code for the U300 platform.

Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

2 files changed, 434 insertions, 88 deletions

diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c
index 8cdddc97325..db0c67908d2 100644
--- a/drivers/spi/amba-pl022.c
+++ b/drivers/spi/amba-pl022.c
@@ -27,7 +27,6 @@
 /*
  * TODO:
  * - add timeout on polled transfers
- * - add generic DMA framework support
  */
 
 #include <linux/init.h>
@@ -45,6 +44,9 @@
 #include <linux/amba/pl022.h>
 #include <linux/io.h>
 #include <linux/slab.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/scatterlist.h>
 
 /*
  * This macro is used to define some register default values.
@@ -381,6 +383,14 @@ struct pl022 {
         enum ssp_reading                read;
         enum ssp_writing                write;
         u32                             exp_fifo_level;
+        /* DMA settings */
+#ifdef CONFIG_DMA_ENGINE
+        struct dma_chan                 *dma_rx_channel;
+        struct dma_chan                 *dma_tx_channel;
+        struct sg_table                 sgt_rx;
+        struct sg_table                 sgt_tx;
+        char                            *dummypage;
+#endif
 };
 
 /**
@@ -406,7 +416,7 @@ struct chip_data {
         u16 dmacr;
         u16 cpsr;
         u8 n_bytes;
-        u8 enable_dma:1;
+        bool enable_dma;
         enum ssp_reading read;
         enum ssp_writing write;
         void (*cs_control) (u32 command);
@@ -763,6 +773,371 @@ static void *next_transfer(struct pl022 *pl022)
         }
         return STATE_DONE;
 }
+
+/*
+ * This DMA functionality is only compiled in if we have
+ * access to the generic DMA devices/DMA engine.
+ */
+#ifdef CONFIG_DMA_ENGINE
+static void unmap_free_dma_scatter(struct pl022 *pl022)
+{
+        /* Unmap and free the SG tables */
+        dma_unmap_sg(&pl022->adev->dev, pl022->sgt_tx.sgl,
+                     pl022->sgt_tx.nents, DMA_TO_DEVICE);
+        dma_unmap_sg(&pl022->adev->dev, pl022->sgt_rx.sgl,
+                     pl022->sgt_rx.nents, DMA_FROM_DEVICE);
+        sg_free_table(&pl022->sgt_rx);
+        sg_free_table(&pl022->sgt_tx);
+}
+
+static void dma_callback(void *data)
+{
+        struct pl022 *pl022 = data;
+        struct spi_message *msg = pl022->cur_msg;
+
+        BUG_ON(!pl022->sgt_rx.sgl);
+
+#ifdef VERBOSE_DEBUG
+        /*
+         * Optionally dump out buffers to inspect contents, this is
+         * good if you want to convince yourself that the loopback
+         * read/write contents are the same, when adopting to a new
+         * DMA engine.
+         */
+        {
+                struct scatterlist *sg;
+                unsigned int i;
+
+                dma_sync_sg_for_cpu(&pl022->adev->dev,
+                                    pl022->sgt_rx.sgl,
+                                    pl022->sgt_rx.nents,
+                                    DMA_FROM_DEVICE);
+
+                for_each_sg(pl022->sgt_rx.sgl, sg, pl022->sgt_rx.nents, i) {
+                        dev_dbg(&pl022->adev->dev, "SPI RX SG ENTRY: %d", i);
+                        print_hex_dump(KERN_ERR, "SPI RX: ",
+                                       DUMP_PREFIX_OFFSET,
+                                       16,
+                                       1,
+                                       sg_virt(sg),
+                                       sg_dma_len(sg),
+                                       1);
+                }
+                for_each_sg(pl022->sgt_tx.sgl, sg, pl022->sgt_tx.nents, i) {
+                        dev_dbg(&pl022->adev->dev, "SPI TX SG ENTRY: %d", i);
+                        print_hex_dump(KERN_ERR, "SPI TX: ",
+                                       DUMP_PREFIX_OFFSET,
+                                       16,
+                                       1,
+                                       sg_virt(sg),
+                                       sg_dma_len(sg),
+                                       1);
+                }
+        }
+#endif
+
+        unmap_free_dma_scatter(pl022);
+
+        /* Update total bytes transfered */
+        msg->actual_length += pl022->cur_transfer->len;
+        if (pl022->cur_transfer->cs_change)
+                pl022->cur_chip->
+                        cs_control(SSP_CHIP_DESELECT);
+
+        /* Move to next transfer */
+        msg->state = next_transfer(pl022);
+        tasklet_schedule(&pl022->pump_transfers);
+}
+
+static void setup_dma_scatter(struct pl022 *pl022,
+                              void *buffer,
+                              unsigned int length,
+                              struct sg_table *sgtab)
+{
+        struct scatterlist *sg;
+        int bytesleft = length;
+        void *bufp = buffer;
+        int mapbytes;
+        int i;
+
+        if (buffer) {
+                for_each_sg(sgtab->sgl, sg, sgtab->nents, i) {
+                        /*
+                         * If there are less bytes left than what fits
+                         * in the current page (plus page alignment offset)
+                         * we just feed in this, else we stuff in as much
+                         * as we can.
+                         */
+                        if (bytesleft < (PAGE_SIZE - offset_in_page(bufp)))
+                                mapbytes = bytesleft;
+                        else
+                                mapbytes = PAGE_SIZE - offset_in_page(bufp);
+                        sg_set_page(sg, virt_to_page(bufp),
+                                    mapbytes, offset_in_page(bufp));
+                        bufp += mapbytes;
+                        bytesleft -= mapbytes;
+                        dev_dbg(&pl022->adev->dev,
+                                "set RX/TX target page @ %p, %d bytes, %d left\n",
+                                bufp, mapbytes, bytesleft);
+                }
+        } else {
+                /* Map the dummy buffer on every page */
+                for_each_sg(sgtab->sgl, sg, sgtab->nents, i) {
+                        if (bytesleft < PAGE_SIZE)
+                                mapbytes = bytesleft;
+                        else
+                                mapbytes = PAGE_SIZE;
+                        sg_set_page(sg, virt_to_page(pl022->dummypage),
+                                    mapbytes, 0);
+                        bytesleft -= mapbytes;
+                        dev_dbg(&pl022->adev->dev,
+                                "set RX/TX to dummy page %d bytes, %d left\n",
+                                mapbytes, bytesleft);
+
+                }
+        }
+        BUG_ON(bytesleft);
+}
+
+/**
+ * configure_dma - configures the channels for the next transfer
+ * @pl022: SSP driver's private data structure
+ */
+static int configure_dma(struct pl022 *pl022)
+{
+        struct dma_slave_config rx_conf = {
+                .src_addr = SSP_DR(pl022->phybase),
+                .direction = DMA_FROM_DEVICE,
+                .src_maxburst = pl022->vendor->fifodepth >> 1,
+        };
+        struct dma_slave_config tx_conf = {
+                .dst_addr = SSP_DR(pl022->phybase),
+                .direction = DMA_TO_DEVICE,
+                .dst_maxburst = pl022->vendor->fifodepth >> 1,
+        };
+        unsigned int pages;
+        int ret;
+        int sglen;
+        struct dma_chan *rxchan = pl022->dma_rx_channel;
+        struct dma_chan *txchan = pl022->dma_tx_channel;
+        struct dma_async_tx_descriptor *rxdesc;
+        struct dma_async_tx_descriptor *txdesc;
+        dma_cookie_t cookie;
+
+        /* Check that the channels are available */
+        if (!rxchan || !txchan)
+                return -ENODEV;
+