diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2011-11-04 10:09:41 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-11-11 09:15:37 -0500 |
| commit | a4c9e2eed17457b30e17235158657801ec686a14 (patch) | |
| tree | aa1cfeb1691d1b7d7a96df84ddc741f38d8bd144 | |
| parent | 10b391b946c459a39b631aaf81880f94dcfbff46 (diff) | |
drm/radeon/kms/pm: add a proper pm profile init function for fusion
The new power tables need to be handled differently when setting
up the profiles.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 51 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 58 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 18 |
6 files changed, 94 insertions, 39 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 2e30160687c..1d603a3335d 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -157,6 +157,57 @@ int sumo_get_temp(struct radeon_device *rdev) | |||
| 157 | return actual_temp * 1000; | 157 | return actual_temp * 1000; |
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | void sumo_pm_init_profile(struct radeon_device *rdev) | ||
| 161 | { | ||
| 162 | int idx; | ||
| 163 | |||
| 164 | /* default */ | ||
| 165 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; | ||
| 166 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | ||
| 167 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; | ||
| 168 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; | ||
| 169 | |||
| 170 | /* low,mid sh/mh */ | ||
| 171 | if (rdev->flags & RADEON_IS_MOBILITY) | ||
| 172 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | ||
| 173 | else | ||
| 174 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 175 | |||
| 176 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = idx; | ||
| 177 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = idx; | ||
| 178 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | ||
| 179 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | ||
| 180 | |||
| 181 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = idx; | ||
| 182 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = idx; | ||
| 183 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | ||
| 184 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | ||
| 185 | |||
| 186 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = idx; | ||
| 187 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = idx; | ||
| 188 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
| 189 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
| 190 | |||
| 191 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = idx; | ||
| 192 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = idx; | ||
| 193 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
| 194 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
| 195 | |||
| 196 | /* high sh/mh */ | ||
| 197 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 198 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = idx; | ||
| 199 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = idx; | ||
| 200 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; | ||
| 201 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = | ||
| 202 | rdev->pm.power_state[idx].num_clock_modes - 1; | ||
| 203 | |||
| 204 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = idx; | ||
| 205 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = idx; | ||
| 206 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; | ||
| 207 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = | ||
| 208 | rdev->pm.power_state[idx].num_clock_modes - 1; | ||
| 209 | } | ||
| 210 | |||
| 160 | void evergreen_pm_misc(struct radeon_device *rdev) | 211 | void evergreen_pm_misc(struct radeon_device *rdev) |
| 161 | { | 212 | { |
| 162 | int req_ps_idx = rdev->pm.requested_power_state_index; | 213 | int req_ps_idx = rdev->pm.requested_power_state_index; |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 19afc43ad17..dc162dd970d 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -288,24 +288,6 @@ void r600_pm_get_dynpm_state(struct radeon_device *rdev) | |||
| 288 | pcie_lanes); | 288 | pcie_lanes); |
| 289 | } | 289 | } |
| 290 | 290 | ||
| 291 | static int r600_pm_get_type_index(struct radeon_device *rdev, | ||
| 292 | enum radeon_pm_state_type ps_type, | ||
| 293 | int instance) | ||
| 294 | { | ||
| 295 | int i; | ||
| 296 | int found_instance = -1; | ||
| 297 | |||
| 298 | for (i = 0; i < rdev->pm.num_power_states; i++) { | ||
| 299 | if (rdev->pm.power_state[i].type == ps_type) { | ||
| 300 | found_instance++; | ||
| 301 | if (found_instance == instance) | ||
| 302 | return i; | ||
| 303 | } | ||
| 304 | } | ||
| 305 | /* return default if no match */ | ||
| 306 | return rdev->pm.default_power_state_index; | ||
| 307 | } | ||
| 308 | |||
| 309 | void rs780_pm_init_profile(struct radeon_device *rdev) | 291 | void rs780_pm_init_profile(struct radeon_device *rdev) |
| 310 | { | 292 | { |
| 311 | if (rdev->pm.num_power_states == 2) { | 293 | if (rdev->pm.num_power_states == 2) { |
| @@ -504,79 +486,79 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
| 504 | /* low sh */ | 486 | /* low sh */ |
| 505 | if (rdev->flags & RADEON_IS_MOBILITY) { | 487 | if (rdev->flags & RADEON_IS_MOBILITY) { |
| 506 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = | 488 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = |
| 507 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 489 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); |
| 508 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = | 490 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = |
| 509 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 491 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); |
| 510 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 492 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
| 511 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 493 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
| 512 | } else { | 494 | } else { |
| 513 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = | 495 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = |
| 514 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 496 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 515 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = | 497 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = |
| 516 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 498 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 517 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 499 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
| 518 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 500 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
| 519 | } | 501 | } |
| 520 | /* mid sh */ | 502 | /* mid sh */ |
| 521 | if (rdev->flags & RADEON_IS_MOBILITY) { | 503 | if (rdev->flags & RADEON_IS_MOBILITY) { |
| 522 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = | 504 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = |
| 523 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 505 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); |
| 524 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = | 506 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = |
| 525 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 507 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); |
| 526 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | 508 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; |
| 527 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; | 509 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; |
| 528 | } else { | 510 | } else { |
| 529 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = | 511 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = |
| 530 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 512 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 531 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = | 513 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = |
| 532 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 514 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 533 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | 515 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; |
| 534 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; | 516 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; |
| 535 | } | 517 | } |
| 536 | /* high sh */ | 518 | /* high sh */ |
| 537 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = | 519 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = |
| 538 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 520 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 539 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = | 521 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = |
| 540 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 522 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 541 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; | 523 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; |
| 542 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2; | 524 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2; |
| 543 | /* low mh */ | 525 | /* low mh */ |
| 544 | if (rdev->flags & RADEON_IS_MOBILITY) { | 526 | if (rdev->flags & RADEON_IS_MOBILITY) { |
| 545 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = | 527 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = |
| 546 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 528 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); |
| 547 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = | 529 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = |
| 548 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 530 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); |
| 549 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 531 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
| 550 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 532 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
| 551 | } else { | 533 | } else { |
| 552 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = | 534 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = |
| 553 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 535 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 554 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = | 536 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = |
| 555 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 537 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 556 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 538 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
| 557 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 539 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
| 558 | } | 540 | } |
| 559 | /* mid mh */ | 541 | /* mid mh */ |
| 560 | if (rdev->flags & RADEON_IS_MOBILITY) { | 542 | if (rdev->flags & RADEON_IS_MOBILITY) { |
| 561 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = | 543 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = |
| 562 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 544 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); |
| 563 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = | 545 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = |
| 564 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 546 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); |
| 565 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | 547 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; |
| 566 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; | 548 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; |
| 567 | } else { | 549 | } else { |
| 568 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = | 550 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = |
| 569 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 551 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 570 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = | 552 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = |
| 571 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 553 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 572 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | 554 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; |
| 573 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; | 555 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; |
| 574 | } | 556 | } |
| 575 | /* high mh */ | 557 | /* high mh */ |
| 576 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = | 558 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = |
| 577 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 559 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 578 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = | 560 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = |
| 579 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 561 | radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 580 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; | 562 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; |
| 581 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2; | 563 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2; |
| 582 | } | 564 | } |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 85ef693850e..41f7cd26515 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -855,6 +855,9 @@ struct radeon_pm { | |||
| 855 | struct device *int_hwmon_dev; | 855 | struct device *int_hwmon_dev; |
| 856 | }; | 856 | }; |
| 857 | 857 | ||
| 858 | int radeon_pm_get_type_index(struct radeon_device *rdev, | ||
| 859 | enum radeon_pm_state_type ps_type, | ||
| 860 | int instance); | ||
| 858 | 861 | ||
| 859 | /* | 862 | /* |
| 860 | * Benchmarking | 863 | * Benchmarking |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index e2944566ffe..a2e1eae114e 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
| @@ -834,7 +834,7 @@ static struct radeon_asic sumo_asic = { | |||
| 834 | .pm_misc = &evergreen_pm_misc, | 834 | .pm_misc = &evergreen_pm_misc, |
| 835 | .pm_prepare = &evergreen_pm_prepare, | 835 | .pm_prepare = &evergreen_pm_prepare, |
| 836 | .pm_finish = &evergreen_pm_finish, | 836 | .pm_finish = &evergreen_pm_finish, |
| 837 | .pm_init_profile = &rs780_pm_init_profile, | 837 | .pm_init_profile = &sumo_pm_init_profile, |
| 838 | .pm_get_dynpm_state = &r600_pm_get_dynpm_state, | 838 | .pm_get_dynpm_state = &r600_pm_get_dynpm_state, |
| 839 | .pre_page_flip = &evergreen_pre_page_flip, | 839 | .pre_page_flip = &evergreen_pre_page_flip, |
| 840 | .page_flip = &evergreen_page_flip, | 840 | .page_flip = &evergreen_page_flip, |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 85f14f0337e..59914842a72 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
| @@ -413,6 +413,7 @@ extern int evergreen_cs_parse(struct radeon_cs_parser *p); | |||
| 413 | extern void evergreen_pm_misc(struct radeon_device *rdev); | 413 | extern void evergreen_pm_misc(struct radeon_device *rdev); |
| 414 | extern void evergreen_pm_prepare(struct radeon_device *rdev); | 414 | extern void evergreen_pm_prepare(struct radeon_device *rdev); |
| 415 | extern void evergreen_pm_finish(struct radeon_device *rdev); | 415 | extern void evergreen_pm_finish(struct radeon_device *rdev); |
| 416 | extern void sumo_pm_init_profile(struct radeon_device *rdev); | ||
| 416 | extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); | 417 | extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); |
| 417 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); | 418 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
| 418 | extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); | 419 | extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 6fabe89fa6a..78a665bd951 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
| @@ -53,6 +53,24 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev); | |||
| 53 | 53 | ||
| 54 | #define ACPI_AC_CLASS "ac_adapter" | 54 | #define ACPI_AC_CLASS "ac_adapter" |
| 55 | 55 | ||
| 56 | int radeon_pm_get_type_index(struct radeon_device *rdev, | ||
| 57 | enum radeon_pm_state_type ps_type, | ||
| 58 | int instance) | ||
| 59 | { | ||
| 60 | int i; | ||
| 61 | int found_instance = -1; | ||
| 62 | |||
| 63 | for (i = 0; i < rdev->pm.num_power_states; i++) { | ||
| 64 | if (rdev->pm.power_state[i].type == ps_type) { | ||
| 65 | found_instance++; | ||
| 66 | if (found_instance == instance) | ||
| 67 | return i; | ||
| 68 | } | ||
| 69 | } | ||
| 70 | /* return default if no match */ | ||
| 71 | return rdev->pm.default_power_state_index; | ||
| 72 | } | ||
| 73 | |||
| 56 | #ifdef CONFIG_ACPI | 74 | #ifdef CONFIG_ACPI |
| 57 | static int radeon_acpi_event(struct notifier_block *nb, | 75 | static int radeon_acpi_event(struct notifier_block *nb, |
| 58 | unsigned long val, | 76 | unsigned long val, |
