diff options
author | Paul Walmsley <paul@pwsan.com> | 2012-04-19 15:33:57 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2012-04-19 15:33:57 -0400 |
commit | a0b5d81356c35504213fc58f8e8f8403138b6585 (patch) | |
tree | 2dac32be5d5ac1c8a46a2ecb775787475cbc12ab | |
parent | 9a817bc815c86322386c457ae670c73390776a2d (diff) |
ARM: OMAP4: hwmod data: add System Control Module
Add the System Control Module hwmod and associated interconnect data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: BenoƮt Cousson <b-cousson@ti.com>
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 134 |
1 files changed, 130 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 6b29f8d6d94..8e915d309c1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -294,10 +294,6 @@ static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = { | |||
294 | * | 294 | * |
295 | * cm_core | 295 | * cm_core |
296 | * cm_core_aon | 296 | * cm_core_aon |
297 | * ctrl_module_core | ||
298 | * ctrl_module_pad_core | ||
299 | * ctrl_module_pad_wkup | ||
300 | * ctrl_module_wkup | ||
301 | * debugss | 297 | * debugss |
302 | * efuse_ctrl_cust | 298 | * efuse_ctrl_cust |
303 | * efuse_ctrl_std | 299 | * efuse_ctrl_std |
@@ -434,6 +430,60 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { | |||
434 | }; | 430 | }; |
435 | 431 | ||
436 | /* | 432 | /* |
433 | * 'ctrl_module' class | ||
434 | * attila core control module + core pad control module + wkup pad control | ||
435 | * module + attila wkup control module | ||
436 | */ | ||
437 | |||
438 | static struct omap_hwmod_class_sysconfig omap44xx_ctrl_module_sysc = { | ||
439 | .rev_offs = 0x0000, | ||
440 | .sysc_offs = 0x0010, | ||
441 | .sysc_flags = SYSC_HAS_SIDLEMODE, | ||
442 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
443 | SIDLE_SMART_WKUP), | ||
444 | .sysc_fields = &omap_hwmod_sysc_type2, | ||
445 | }; | ||
446 | |||
447 | static struct omap_hwmod_class omap44xx_ctrl_module_hwmod_class = { | ||
448 | .name = "ctrl_module", | ||
449 | .sysc = &omap44xx_ctrl_module_sysc, | ||
450 | }; | ||
451 | |||
452 | /* ctrl_module_core */ | ||
453 | static struct omap_hwmod_irq_info omap44xx_ctrl_module_core_irqs[] = { | ||
454 | { .irq = 8 + OMAP44XX_IRQ_GIC_START }, | ||
455 | { .irq = -1 } | ||
456 | }; | ||
457 | |||
458 | static struct omap_hwmod omap44xx_ctrl_module_core_hwmod = { | ||
459 | .name = "ctrl_module_core", | ||
460 | .class = &omap44xx_ctrl_module_hwmod_class, | ||
461 | .clkdm_name = "l4_cfg_clkdm", | ||
462 | .mpu_irqs = omap44xx_ctrl_module_core_irqs, | ||
463 | }; | ||
464 | |||
465 | /* ctrl_module_pad_core */ | ||
466 | static struct omap_hwmod omap44xx_ctrl_module_pad_core_hwmod = { | ||
467 | .name = "ctrl_module_pad_core", | ||
468 | .class = &omap44xx_ctrl_module_hwmod_class, | ||
469 | .clkdm_name = "l4_cfg_clkdm", | ||
470 | }; | ||
471 | |||
472 | /* ctrl_module_wkup */ | ||
473 | static struct omap_hwmod omap44xx_ctrl_module_wkup_hwmod = { | ||
474 | .name = "ctrl_module_wkup", | ||
475 | .class = &omap44xx_ctrl_module_hwmod_class, | ||
476 | .clkdm_name = "l4_wkup_clkdm", | ||
477 | }; | ||
478 | |||
479 | /* ctrl_module_pad_wkup */ | ||
480 | static struct omap_hwmod omap44xx_ctrl_module_pad_wkup_hwmod = { | ||
481 | .name = "ctrl_module_pad_wkup", | ||
482 | .class = &omap44xx_ctrl_module_hwmod_class, | ||
483 | .clkdm_name = "l4_wkup_clkdm", | ||
484 | }; | ||
485 | |||
486 | /* | ||
437 | * 'dma' class | 487 | * 'dma' class |
438 | * dma controller for data exchange between memory to memory (i.e. internal or | 488 | * dma controller for data exchange between memory to memory (i.e. internal or |
439 | * external memory) and gp peripherals to memory or memory to gp peripherals | 489 | * external memory) and gp peripherals to memory or memory to gp peripherals |
@@ -3922,6 +3972,78 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { | |||
3922 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 3972 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
3923 | }; | 3973 | }; |
3924 | 3974 | ||
3975 | static struct omap_hwmod_addr_space omap44xx_ctrl_module_core_addrs[] = { | ||
3976 | { | ||
3977 | .pa_start = 0x4a002000, | ||
3978 | .pa_end = 0x4a0027ff, | ||
3979 | .flags = ADDR_TYPE_RT | ||
3980 | }, | ||
3981 | { } | ||
3982 | }; | ||
3983 | |||
3984 | /* l4_cfg -> ctrl_module_core */ | ||
3985 | static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = { | ||
3986 | .master = &omap44xx_l4_cfg_hwmod, | ||
3987 | .slave = &omap44xx_ctrl_module_core_hwmod, | ||
3988 | .clk = "l4_div_ck", | ||
3989 | .addr = omap44xx_ctrl_module_core_addrs, | ||
3990 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
3991 | }; | ||
3992 | |||
3993 | static struct omap_hwmod_addr_space omap44xx_ctrl_module_pad_core_addrs[] = { | ||
3994 | { | ||
3995 | .pa_start = 0x4a100000, | ||
3996 | .pa_end = 0x4a1007ff, | ||
3997 | .flags = ADDR_TYPE_RT | ||
3998 | }, | ||
3999 | { } | ||
4000 | }; | ||
4001 | |||
4002 | /* l4_cfg -> ctrl_module_pad_core */ | ||
4003 | static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_pad_core = { | ||
4004 | .master = &omap44xx_l4_cfg_hwmod, | ||
4005 | .slave = &omap44xx_ctrl_module_pad_core_hwmod, | ||
4006 | .clk = "l4_div_ck", | ||
4007 | .addr = omap44xx_ctrl_module_pad_core_addrs, | ||
4008 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
4009 | }; | ||
4010 | |||
4011 | static struct omap_hwmod_addr_space omap44xx_ctrl_module_wkup_addrs[] = { | ||
4012 | { | ||
4013 | .pa_start = 0x4a30c000, | ||
4014 | .pa_end = 0x4a30c7ff, | ||
4015 | .flags = ADDR_TYPE_RT | ||
4016 | }, | ||
4017 | { } | ||
4018 | }; | ||
4019 | |||
4020 | /* l4_wkup -> ctrl_module_wkup */ | ||
4021 | static struct omap_hwmod_ocp_if omap44xx_l4_wkup__ctrl_module_wkup = { | ||
4022 | .master = &omap44xx_l4_wkup_hwmod, | ||
4023 | .slave = &omap44xx_ctrl_module_wkup_hwmod, | ||
4024 | .clk = "l4_wkup_clk_mux_ck", | ||
4025 | .addr = omap44xx_ctrl_module_wkup_addrs, | ||
4026 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
4027 | }; | ||
4028 | |||
4029 | static struct omap_hwmod_addr_space omap44xx_ctrl_module_pad_wkup_addrs[] = { | ||
4030 | { | ||
4031 | .pa_start = 0x4a31e000, | ||
4032 | .pa_end = 0x4a31e7ff, | ||
4033 | .flags = ADDR_TYPE_RT | ||
4034 | }, | ||
4035 | { } | ||
4036 | }; | ||
4037 | |||
4038 | /* l4_wkup -> ctrl_module_pad_wkup */ | ||
4039 | static struct omap_hwmod_ocp_if omap44xx_l4_wkup__ctrl_module_pad_wkup = { | ||
4040 | .master = &omap44xx_l4_wkup_hwmod, | ||
4041 | .slave = &omap44xx_ctrl_module_pad_wkup_hwmod, | ||
4042 | .clk = "l4_wkup_clk_mux_ck", | ||
4043 | .addr = omap44xx_ctrl_module_pad_wkup_addrs, | ||
4044 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
4045 | }; | ||
4046 | |||
3925 | static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { | 4047 | static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { |
3926 | { | 4048 | { |
3927 | .pa_start = 0x4a056000, | 4049 | .pa_start = 0x4a056000, |
@@ -5709,6 +5831,10 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { | |||
5709 | &omap44xx_l4_abe__aess_dma, | 5831 | &omap44xx_l4_abe__aess_dma, |
5710 | &omap44xx_l3_main_2__c2c, | 5832 | &omap44xx_l3_main_2__c2c, |
5711 | &omap44xx_l4_wkup__counter_32k, | 5833 | &omap44xx_l4_wkup__counter_32k, |
5834 | &omap44xx_l4_cfg__ctrl_module_core, | ||
5835 | &omap44xx_l4_cfg__ctrl_module_pad_core, | ||
5836 | &omap44xx_l4_wkup__ctrl_module_wkup, | ||
5837 | &omap44xx_l4_wkup__ctrl_module_pad_wkup, | ||
5712 | &omap44xx_l4_cfg__dma_system, | 5838 | &omap44xx_l4_cfg__dma_system, |
5713 | &omap44xx_l4_abe__dmic, | 5839 | &omap44xx_l4_abe__dmic, |
5714 | &omap44xx_l4_abe__dmic_dma, | 5840 | &omap44xx_l4_abe__dmic_dma, |