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authorAnatolij Gustschin <agust@denx.de>2010-07-22 23:50:18 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-08-01 19:06:44 -0400
commit9e2089cbed7441a21d72a510897f0336afb06492 (patch)
tree04c89a0a7130ab03d281a698bfc39b169a926b36
parent12fb0eb4c963452f727752aae03bbef192abed40 (diff)
powerpc/512x: add clock structure for Video-IN (VIU) unit
Allows using clk_get()/clk_enable()/clk_disable() for VIU clock in the v4l2 video driver. Signed-off-by: Hongjun Chen <hong-jun.chen@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r--arch/powerpc/platforms/512x/clock.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
index 4c42246b86a..e1c5cd6650b 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -292,6 +292,15 @@ static void diu_clk_calc(struct clk *clk)
292 clk->rate = rate; 292 clk->rate = rate;
293} 293}
294 294
295static void viu_clk_calc(struct clk *clk)
296{
297 unsigned long rate;
298
299 rate = sys_clk.rate;
300 rate /= 2;
301 clk->rate = rate;
302}
303
295static void half_clk_calc(struct clk *clk) 304static void half_clk_calc(struct clk *clk)
296{ 305{
297 clk->rate = clk->parent->rate / 2; 306 clk->rate = clk->parent->rate / 2;
@@ -412,6 +421,14 @@ static struct clk diu_clk = {
412 .calc = diu_clk_calc, 421 .calc = diu_clk_calc,
413}; 422};
414 423
424static struct clk viu_clk = {
425 .name = "viu_clk",
426 .flags = CLK_HAS_CTRL,
427 .reg = 1,
428 .bit = 18,
429 .calc = viu_clk_calc,
430};
431
415static struct clk axe_clk = { 432static struct clk axe_clk = {
416 .name = "axe_clk", 433 .name = "axe_clk",
417 .flags = CLK_HAS_CTRL, 434 .flags = CLK_HAS_CTRL,
@@ -535,6 +552,7 @@ struct clk *rate_clks[] = {
535 &ref_clk, 552 &ref_clk,
536 &sys_clk, 553 &sys_clk,
537 &diu_clk, 554 &diu_clk,
555 &viu_clk,
538 &csb_clk, 556 &csb_clk,
539 &e300_clk, 557 &e300_clk,
540 &ips_clk, 558 &ips_clk,